[PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[Huibin Hong]

Add spi node and spi pinctrl for rk322x

Signed-off-by: Huibin Hong <huibin.hong-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

Changes in v2:
- Remove the changeid, and add commit for this patch

 arch/arm/boot/dts/rk322x.dtsi | 50 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 678daf7..b47f58e 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -54,6 +54,7 @@
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
+		spi0 = &spi0;
 	};
 
 	cpus {
@@ -401,6 +402,19 @@
 		status = "disabled";
 	};
 
+	spi0: spi@11090000 {
+		compatible = "rockchip,rk3228-spi";
+		reg = <0x11090000 0x1000>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		status = "disabled";
+	};
+
 	wdt: watchdog@110a0000 {
 		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";
 		reg = <0x110a0000 0x100>;
@@ -1058,6 +1072,42 @@
 			};
 		};
 
+		spi-0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_tx: spi0-tx {
+				rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_rx: spi0-rx {
+				rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>;
+			};
+		};
+
+		spi-1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_rx: spi1-rx {
+				rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_tx: spi1-tx {
+				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>;
+			};
+		};
+
 		i2s1 {
 			i2s1_bus: i2s1-bus {
 				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
-- 
1.9.1


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[PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[Huibin Hong]

Add spi node and spi pinctrl for rk322x

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---

Changes in v2:
- Remove the changeid, and add commit for this patch

 arch/arm/boot/dts/rk322x.dtsi | 50 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 678daf7..b47f58e 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -54,6 +54,7 @@
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
+		spi0 = &spi0;
 	};
 
 	cpus {
@@ -401,6 +402,19 @@
 		status = "disabled";
 	};
 
+	spi0: spi at 11090000 {
+		compatible = "rockchip,rk3228-spi";
+		reg = <0x11090000 0x1000>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		status = "disabled";
+	};
+
 	wdt: watchdog at 110a0000 {
 		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";
 		reg = <0x110a0000 0x100>;
@@ -1058,6 +1072,42 @@
 			};
 		};
 
+		spi-0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_tx: spi0-tx {
+				rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_rx: spi0-rx {
+				rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>;
+			};
+		};
+
+		spi-1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_rx: spi1-rx {
+				rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_tx: spi1-tx {
+				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>;
+			};
+		};
+
 		i2s1 {
 			i2s1_bus: i2s1-bus {
 				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
-- 
1.9.1

[PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[Huibin Hong]

Add spi node and spi pinctrl for rk322x

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---

Changes in v2:
- Remove the changeid, and add commit for this patch

 arch/arm/boot/dts/rk322x.dtsi | 50 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 678daf7..b47f58e 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -54,6 +54,7 @@
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
+		spi0 = &spi0;
 	};
 
 	cpus {
@@ -401,6 +402,19 @@
 		status = "disabled";
 	};
 
+	spi0: spi@11090000 {
+		compatible = "rockchip,rk3228-spi";
+		reg = <0x11090000 0x1000>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		status = "disabled";
+	};
+
 	wdt: watchdog@110a0000 {
 		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";
 		reg = <0x110a0000 0x100>;
@@ -1058,6 +1072,42 @@
 			};
 		};
 
+		spi-0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_tx: spi0-tx {
+				rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_rx: spi0-rx {
+				rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>;
+			};
+		};
+
+		spi-1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_rx: spi1-rx {
+				rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_tx: spi1-tx {
+				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>;
+			};
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>;
+			};
+		};
+
 		i2s1 {
 			i2s1_bus: i2s1-bus {
 				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
-- 
1.9.1

Re: [PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[Heiko Stuebner]

Hi,

Am Donnerstag, 3. August 2017, 10:36:49 CEST schrieb Huibin Hong:
> Add spi node and spi pinctrl for rk322x
> 
> Signed-off-by: Huibin Hong <huibin.hong-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

[...]


> +	};
> +
>  	wdt: watchdog@110a0000 {
>  		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";

Please make sure a patch actually applies against the mainline tree,
as here the the compatible for the watchdog looks slightly different.

In any case I've fixed that and applied it for 4.14


Heiko
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[PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[Heiko Stuebner]

Hi,

Am Donnerstag, 3. August 2017, 10:36:49 CEST schrieb Huibin Hong:
> Add spi node and spi pinctrl for rk322x
> 
> Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>

[...]


> +	};
> +
>  	wdt: watchdog at 110a0000 {
>  		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";

Please make sure a patch actually applies against the mainline tree,
as here the the compatible for the watchdog looks slightly different.

In any case I've fixed that and applied it for 4.14


Heiko

Re: [PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[Heiko Stuebner]

Hi,

Am Donnerstag, 3. August 2017, 10:36:49 CEST schrieb Huibin Hong:
> Add spi node and spi pinctrl for rk322x
> 
> Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>

[...]


> +	};
> +
>  	wdt: watchdog@110a0000 {
>  		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";

Please make sure a patch actually applies against the mainline tree,
as here the the compatible for the watchdog looks slightly different.

In any case I've fixed that and applied it for 4.14


Heiko

Re: Re: [PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrl

[hhb]

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Hi Heiko    I have rebased the latest mainline tree, and sent a new patch. Thanks a lot.



hhb
祝工作愉快！

洪慧斌 honghuibin

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 From: Heiko StuebnerDate: 2017-08-06 18:38To: Huibin HongCC: sofia-kernel.list; huangtao; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; Russell King; linux-arm-kernel; linux-rockchip; devicetree; linux-kernelSubject: Re: [PATCH v2] ARM: dts: rockchip: rk322x: add spi node and spi pinctrlHi,
 
Am Donnerstag, 3. August 2017, 10:36:49 CEST schrieb Huibin Hong:
> Add spi node and spi pinctrl for rk322x
> 
> Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
 
[...]
 
 
> +	};
> +
>  	wdt: watchdog@110a0000 {
>  		compatible = "rockchip,rk322x-wdt", "snps,dw-wdt";
 
Please make sure a patch actually applies against the mainline tree,
as here the the compatible for the watchdog looks slightly different.
 
In any case I've fixed that and applied it for 4.14
 
 
Heiko
 
 

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