Re: next-20240219: arm64: boot failed - gic_of_init

From: Marc Zyngier <maz@kernel.org>
To: Zenghui Yu <yuzenghui@huawei.com>
Cc: Naresh Kamboju <naresh.kamboju@linaro.org>,
	open list <linux-kernel@vger.kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	lkft-triage@lists.linaro.org,
	Linux Regressions <regressions@lists.linux.dev>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Dan Carpenter <dan.carpenter@linaro.org>,
	Anders Roxell <anders.roxell@linaro.org>
Subject: Re: next-20240219: arm64: boot failed - gic_of_init
Date: Mon, 19 Feb 2024 15:02:07 +0000	[thread overview]
Message-ID: <20adfff58d44d09d0e968f5c502f28ce@kernel.org> (raw)
In-Reply-To: <a7d8e529-9a44-3f88-50ef-d87b80515c36@huawei.com>

On 2024-02-19 14:46, Zenghui Yu wrote:
> On 2024/2/19 19:32, Marc Zyngier wrote:
>> For what it is worth, I've just tested both defconfig and my own
>> configuration with both 4k (kvmtool, QEMU+KVM and on SynQuacer) and
>> 16k (kvmtool), without any obvious problem.
> 
> I had a quick test on top of next-20240219 with defconfig.  I can
> reproduce it with QEMU parameter '-cpu max -accel tcg', but things are
> fine with '-cpu max,lpa2=off -accel tcg'.
> 
> Bisection shows that the problem happens when we start putting the
> latest arm64 and kvmarm changes together.  The following hack fixes the
> problem for me (but I **only** write it for kernel built with defconfig
> with ARM64_4K_PAGES=y atm).
> 
> I can investigate it further tomorrow (as it's too late now ;-) ).  Or
> maybe Marc or Catalin can help fix it with a proper approach.
> 
> diff --git a/arch/arm64/kernel/cpufeature.c 
> b/arch/arm64/kernel/cpufeature.c
> index 4f7662008ede..babdc3f4721b 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2798,6 +2798,7 @@ static const struct arm64_cpu_capabilities
> arm64_features[] = {
> | 		.sign = FTR_SIGNED,
> | 		.field_pos = ID_AA64MMFR0_EL1_TGRAN4_SHIFT,
> | 		.min_field_value = ID_AA64MMFR0_EL1_TGRAN4_52_BIT,
> |+		.max_field_value = BIT(ID_AA64MMFR0_EL1_TGRAN4_WIDTH - 1) - 1,
> | #else
> | 		.sign = FTR_UNSIGNED,
> | 		.field_pos = ID_AA64MMFR0_EL1_TGRAN16_SHIFT,

Yup, got to that point too.

Working on a slightly more elaborate fix.

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...