From: Frederic Barrat <fbarrat@linux.ibm.com>
To: "Alastair D'Silva" <alastair@au1.ibm.com>, linuxppc-dev@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
mikey@neuling.org, vaibhav@linux.vnet.ibm.com,
aneesh.kumar@linux.vnet.ibm.com, malat@debian.org,
felix@linux.vnet.ibm.com, pombredanne@nexb.com,
sukadev@linux.vnet.ibm.com, npiggin@gmail.com,
gregkh@linuxfoundation.org, arnd@arndb.de,
andrew.donnellan@au1.ibm.com, fbarrat@linux.vnet.ibm.com,
corbet@lwn.net, "Alastair D'Silva" <alastair@d-silva.org>
Subject: Re: [PATCH v5 1/7] powerpc: Add TIDR CPU feature for POWER9
Date: Fri, 11 May 2018 10:38:59 +0200 [thread overview]
Message-ID: <215f7aba-4e24-bc09-e164-1618693be072@linux.ibm.com> (raw)
In-Reply-To: <20180511061303.10728-2-alastair@au1.ibm.com>
Le 11/05/2018 à 08:12, Alastair D'Silva a écrit :
> From: Alastair D'Silva <alastair@d-silva.org>
>
> This patch adds a CPU feature bit to show whether the CPU has
> the TIDR register available, enabling as_notify/wait in userspace.
>
> Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
> ---
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> arch/powerpc/include/asm/cputable.h | 3 ++-
> arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
> index 66fcab13c8b4..9c0a3083571b 100644
> --- a/arch/powerpc/include/asm/cputable.h
> +++ b/arch/powerpc/include/asm/cputable.h
> @@ -215,6 +215,7 @@ static inline void cpu_feature_keys_init(void) { }
> #define CPU_FTR_P9_TM_HV_ASSIST LONG_ASM_CONST(0x0000100000000000)
> #define CPU_FTR_P9_TM_XER_SO_BUG LONG_ASM_CONST(0x0000200000000000)
> #define CPU_FTR_P9_TLBIE_BUG LONG_ASM_CONST(0x0000400000000000)
> +#define CPU_FTR_P9_TIDR LONG_ASM_CONST(0x0000800000000000)
>
> #ifndef __ASSEMBLY__
>
> @@ -462,7 +463,7 @@ static inline void cpu_feature_keys_init(void) { }
> CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
> CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
> CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
> - CPU_FTR_P9_TLBIE_BUG)
> + CPU_FTR_P9_TLBIE_BUG | CPU_FTR_P9_TIDR)
> #define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
> (~CPU_FTR_SAO))
> #define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
> index 8ab51f6ca03a..415555e5b69f 100644
> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> @@ -716,6 +716,7 @@ static __init void cpufeatures_cpu_quirks(void)
> if ((version & 0xffff0000) == 0x004e0000) {
> cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
> cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
> + cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
> }
>
> /*
>
--
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WARNING: multiple messages have this Message-ID (diff)
From: Frederic Barrat <fbarrat@linux.ibm.com>
To: "Alastair D'Silva" <alastair@au1.ibm.com>, linuxppc-dev@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
mikey@neuling.org, vaibhav@linux.vnet.ibm.com,
aneesh.kumar@linux.vnet.ibm.com, malat@debian.org,
felix@linux.vnet.ibm.com, pombredanne@nexb.com,
sukadev@linux.vnet.ibm.com, npiggin@gmail.com,
gregkh@linuxfoundation.org, arnd@arndb.de,
andrew.donnellan@au1.ibm.com, fbarrat@linux.vnet.ibm.com,
corbet@lwn.net, "Alastair D'Silva" <alastair@d-silva.org>
Subject: Re: [PATCH v5 1/7] powerpc: Add TIDR CPU feature for POWER9
Date: Fri, 11 May 2018 10:38:59 +0200 [thread overview]
Message-ID: <215f7aba-4e24-bc09-e164-1618693be072@linux.ibm.com> (raw)
In-Reply-To: <20180511061303.10728-2-alastair@au1.ibm.com>
Le 11/05/2018 à 08:12, Alastair D'Silva a écrit :
> From: Alastair D'Silva <alastair@d-silva.org>
>
> This patch adds a CPU feature bit to show whether the CPU has
> the TIDR register available, enabling as_notify/wait in userspace.
>
> Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
> ---
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
> arch/powerpc/include/asm/cputable.h | 3 ++-
> arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
> index 66fcab13c8b4..9c0a3083571b 100644
> --- a/arch/powerpc/include/asm/cputable.h
> +++ b/arch/powerpc/include/asm/cputable.h
> @@ -215,6 +215,7 @@ static inline void cpu_feature_keys_init(void) { }
> #define CPU_FTR_P9_TM_HV_ASSIST LONG_ASM_CONST(0x0000100000000000)
> #define CPU_FTR_P9_TM_XER_SO_BUG LONG_ASM_CONST(0x0000200000000000)
> #define CPU_FTR_P9_TLBIE_BUG LONG_ASM_CONST(0x0000400000000000)
> +#define CPU_FTR_P9_TIDR LONG_ASM_CONST(0x0000800000000000)
>
> #ifndef __ASSEMBLY__
>
> @@ -462,7 +463,7 @@ static inline void cpu_feature_keys_init(void) { }
> CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
> CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
> CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
> - CPU_FTR_P9_TLBIE_BUG)
> + CPU_FTR_P9_TLBIE_BUG | CPU_FTR_P9_TIDR)
> #define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
> (~CPU_FTR_SAO))
> #define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
> index 8ab51f6ca03a..415555e5b69f 100644
> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> @@ -716,6 +716,7 @@ static __init void cpufeatures_cpu_quirks(void)
> if ((version & 0xffff0000) == 0x004e0000) {
> cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
> cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
> + cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
> }
>
> /*
>
next prev parent reply other threads:[~2018-05-11 8:39 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 6:12 [PATCH v5 0/7] ocxl: Implement Power9 as_notify/wait for OpenCAPI Alastair D'Silva
2018-05-11 6:12 ` Alastair D'Silva
2018-05-11 6:12 ` [PATCH v5 1/7] powerpc: Add TIDR CPU feature for POWER9 Alastair D'Silva
2018-05-11 6:12 ` Alastair D'Silva
2018-05-11 8:38 ` Frederic Barrat [this message]
2018-05-11 8:38 ` Frederic Barrat
2018-05-31 4:19 ` Andrew Donnellan
2018-05-31 4:19 ` Andrew Donnellan
2018-06-04 14:10 ` [v5,1/7] " Michael Ellerman
2018-06-04 14:10 ` Michael Ellerman
2018-05-11 6:12 ` [PATCH v5 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation Alastair D'Silva
2018-05-11 6:12 ` Alastair D'Silva
2018-05-11 8:46 ` Frederic Barrat
2018-05-11 8:46 ` Frederic Barrat
2018-05-31 4:20 ` Andrew Donnellan
2018-05-31 4:20 ` Andrew Donnellan
2018-05-11 6:12 ` [PATCH v5 3/7] powerpc: use task_pid_nr() for TID allocation Alastair D'Silva
2018-05-11 6:12 ` Alastair D'Silva
2018-05-11 8:48 ` Frederic Barrat
2018-05-11 8:48 ` Frederic Barrat
2018-05-31 4:29 ` Andrew Donnellan
2018-05-31 4:29 ` Andrew Donnellan
2018-05-11 6:13 ` [PATCH v5 4/7] ocxl: Rename pnv_ocxl_spa_remove_pe to clarify it's action Alastair D'Silva
2018-05-11 6:13 ` Alastair D'Silva
2018-05-11 8:49 ` Frederic Barrat
2018-05-11 8:49 ` Frederic Barrat
2018-05-31 4:32 ` Andrew Donnellan
2018-05-31 4:32 ` Andrew Donnellan
2018-05-11 6:13 ` [PATCH v5 5/7] ocxl: Expose the thread_id needed for wait on POWER9 Alastair D'Silva
2018-05-11 6:13 ` Alastair D'Silva
2018-05-11 9:25 ` Frederic Barrat
2018-05-11 9:25 ` Frederic Barrat
2018-05-11 10:06 ` Alastair D'Silva
2018-05-11 10:06 ` Alastair D'Silva
2018-05-11 10:06 ` Alastair D'Silva
2018-05-11 11:03 ` Frederic Barrat
2018-05-11 11:03 ` Frederic Barrat
2018-05-31 4:42 ` Andrew Donnellan
2018-05-31 4:42 ` Andrew Donnellan
2018-05-11 6:13 ` [PATCH v5 6/7] ocxl: Add an IOCTL so userspace knows what OCXL features are available Alastair D'Silva
2018-05-11 6:13 ` Alastair D'Silva
2018-05-11 9:27 ` Frederic Barrat
2018-05-11 9:27 ` Frederic Barrat
2018-05-31 4:46 ` Andrew Donnellan
2018-05-31 4:46 ` Andrew Donnellan
2018-05-11 6:13 ` [PATCH v5 7/7] ocxl: Document new OCXL IOCTLs Alastair D'Silva
2018-05-11 6:13 ` Alastair D'Silva
2018-05-11 9:28 ` Frederic Barrat
2018-05-11 9:28 ` Frederic Barrat
2018-05-31 4:48 ` Andrew Donnellan
2018-05-31 4:48 ` Andrew Donnellan
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