From: Heiko Stuebner <heiko@sntech.de>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Anup Patel <apatel@ventanamicro.com>
Cc: Atish Patra <atishp@atishpatra.org>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Andrew Jones <ajones@ventanamicro.com>,
kernel test robot <lkp@intel.com>,
Anup Patel <apatel@ventanamicro.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v4 1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM
Date: Wed, 19 Oct 2022 15:55:10 +0200 [thread overview]
Message-ID: <2257562.ElGaqSPkdT@phil> (raw)
In-Reply-To: <20221019131128.237026-2-apatel@ventanamicro.com>
Am Mittwoch, 19. Oktober 2022, 15:11:25 CEST schrieb Anup Patel:
> From: Andrew Jones <ajones@ventanamicro.com>
>
> riscv_cbom_block_size and riscv_init_cbom_blocksize() should always
> be available and riscv_init_cbom_blocksize() should always be
> invoked, even when compiling without RISCV_ISA_ZICBOM enabled. This
> is because disabling RISCV_ISA_ZICBOM means "don't use zicbom
> instructions in the kernel" not "pretend there isn't zicbom, even
> when there is". When zicbom is available, whether the kernel enables
> its use with RISCV_ISA_ZICBOM or not, KVM will offer it to guests.
> Ensure we can build KVM and that the block size is initialized even
> when compiling without RISCV_ISA_ZICBOM.
>
> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
[on qemu+zicbom and t-head d1]
Tested-by: Heiko Stuebner <heiko@sntech.de>
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http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Anup Patel <apatel@ventanamicro.com>
Cc: Atish Patra <atishp@atishpatra.org>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Andrew Jones <ajones@ventanamicro.com>,
kernel test robot <lkp@intel.com>,
Anup Patel <apatel@ventanamicro.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v4 1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM
Date: Wed, 19 Oct 2022 15:55:10 +0200 [thread overview]
Message-ID: <2257562.ElGaqSPkdT@phil> (raw)
In-Reply-To: <20221019131128.237026-2-apatel@ventanamicro.com>
Am Mittwoch, 19. Oktober 2022, 15:11:25 CEST schrieb Anup Patel:
> From: Andrew Jones <ajones@ventanamicro.com>
>
> riscv_cbom_block_size and riscv_init_cbom_blocksize() should always
> be available and riscv_init_cbom_blocksize() should always be
> invoked, even when compiling without RISCV_ISA_ZICBOM enabled. This
> is because disabling RISCV_ISA_ZICBOM means "don't use zicbom
> instructions in the kernel" not "pretend there isn't zicbom, even
> when there is". When zicbom is available, whether the kernel enables
> its use with RISCV_ISA_ZICBOM or not, KVM will offer it to guests.
> Ensure we can build KVM and that the block size is initialized even
> when compiling without RISCV_ISA_ZICBOM.
>
> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
[on qemu+zicbom and t-head d1]
Tested-by: Heiko Stuebner <heiko@sntech.de>
next prev parent reply other threads:[~2022-10-19 13:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 13:11 [PATCH v4 0/4] Add PMEM support for RISC-V Anup Patel
2022-10-19 13:11 ` Anup Patel
2022-10-19 13:11 ` [PATCH v4 1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM Anup Patel
2022-10-19 13:11 ` Anup Patel
2022-10-19 13:55 ` Heiko Stuebner [this message]
2022-10-19 13:55 ` Heiko Stuebner
2022-10-19 13:11 ` [PATCH v4 2/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt Anup Patel
2022-10-19 13:11 ` Anup Patel
2022-10-19 14:19 ` Heiko Stuebner
2022-10-19 14:19 ` Heiko Stuebner
2022-10-19 16:10 ` Anup Patel
2022-10-19 16:10 ` Anup Patel
2022-10-19 20:50 ` Arnd Bergmann
2022-10-19 20:50 ` Arnd Bergmann
2022-10-20 7:38 ` Anup Patel
2022-10-20 7:38 ` Anup Patel
2022-10-19 13:11 ` [PATCH v4 3/4] RISC-V: Implement arch specific PMEM APIs Anup Patel
2022-10-19 13:11 ` Anup Patel
2022-10-19 13:11 ` [PATCH v4 4/4] RISC-V: Enable PMEM drivers Anup Patel
2022-10-19 13:11 ` Anup Patel
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