From: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: Enric Balletbo i Serra
<enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
Brian Norris
<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
William wu <wulf-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
hl-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
kernel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org
Subject: Re: [PATCH v3 6/6] drm/rockchip: cdn-dp: remove the DP phy switch
Date: Sat, 17 Feb 2018 01:10:45 +0100 [thread overview]
Message-ID: <2266673.GVnnbKjrrE@phil> (raw)
In-Reply-To: <20180216120956.19034-6-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
Am Freitag, 16. Februar 2018, 13:09:56 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence
> only one PHY can connect to DP controller at one time, the other should
> be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,
> set this bit means enable PHY 1, clear this bit means enable PHY 0.
>
> If the board has 2 Type-C ports, the DP driver get the phy id from
> devm_of_phy_get_by_index, and then control this switch according to
> this id. But some others board only has one Type-C port, it may be PHY 0
> or PHY 1. The dts node id can not tell us the correct PHY id. Hence move
> this switch to PHY driver, the PHY driver can distinguish between PHY 0
> and PHY 1, and then write the correct register bit.
>
> Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
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WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/6] drm/rockchip: cdn-dp: remove the DP phy switch
Date: Sat, 17 Feb 2018 01:10:45 +0100 [thread overview]
Message-ID: <2266673.GVnnbKjrrE@phil> (raw)
In-Reply-To: <20180216120956.19034-6-enric.balletbo@collabora.com>
Am Freitag, 16. Februar 2018, 13:09:56 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw@rock-chips.com>
>
> There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence
> only one PHY can connect to DP controller at one time, the other should
> be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,
> set this bit means enable PHY 1, clear this bit means enable PHY 0.
>
> If the board has 2 Type-C ports, the DP driver get the phy id from
> devm_of_phy_get_by_index, and then control this switch according to
> this id. But some others board only has one Type-C port, it may be PHY 0
> or PHY 1. The dts node id can not tell us the correct PHY id. Hence move
> this switch to PHY driver, the PHY driver can distinguish between PHY 0
> and PHY 1, and then write the correct register bit.
>
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Brian Norris <briannorris@chromium.org>,
dianders@chromium.org, Chris Zhong <zyw@rock-chips.com>,
William wu <wulf@rock-chips.com>,
hl@rock-chips.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: Re: [PATCH v3 6/6] drm/rockchip: cdn-dp: remove the DP phy switch
Date: Sat, 17 Feb 2018 01:10:45 +0100 [thread overview]
Message-ID: <2266673.GVnnbKjrrE@phil> (raw)
In-Reply-To: <20180216120956.19034-6-enric.balletbo@collabora.com>
Am Freitag, 16. Februar 2018, 13:09:56 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw@rock-chips.com>
>
> There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence
> only one PHY can connect to DP controller at one time, the other should
> be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,
> set this bit means enable PHY 1, clear this bit means enable PHY 0.
>
> If the board has 2 Type-C ports, the DP driver get the phy id from
> devm_of_phy_get_by_index, and then control this switch according to
> this id. But some others board only has one Type-C port, it may be PHY 0
> or PHY 1. The dts node id can not tell us the correct PHY id. Hence move
> this switch to PHY driver, the PHY driver can distinguish between PHY 0
> and PHY 1, and then write the correct register bit.
>
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
next prev parent reply other threads:[~2018-02-17 0:10 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-16 12:09 [PATCH v3 1/6] phy: rockchip-typec: deprecate some DT properties for various register fields Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
2018-02-16 12:09 ` [PATCH v3 2/6] dt-bindings: phy-rockchip-typec: deprecate some register properties Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
2018-02-17 0:07 ` Heiko Stuebner
2018-02-17 0:07 ` Heiko Stuebner
2018-02-19 20:02 ` Rob Herring
2018-02-19 20:02 ` Rob Herring
2018-02-19 20:02 ` Rob Herring
2018-02-16 12:09 ` [PATCH v3 3/6] phy: rockchip-typec: enable usb3 host during usb3 phy power on Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
[not found] ` <20180216120956.19034-3-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-02-17 0:08 ` Heiko Stuebner
2018-02-17 0:08 ` Heiko Stuebner
2018-02-17 0:08 ` Heiko Stuebner
2018-02-16 12:09 ` [PATCH v3 4/6] phy: rockchip-typec: force to USB2 if DP at 4 lanes mode Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
[not found] ` <20180216120956.19034-4-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-02-17 0:09 ` Heiko Stuebner
2018-02-17 0:09 ` Heiko Stuebner
2018-02-17 0:09 ` Heiko Stuebner
2018-02-16 12:09 ` [PATCH v3 5/6] phy: rockchip-typec: support DP phy switch Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
[not found] ` <20180216120956.19034-5-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-02-17 0:10 ` Heiko Stuebner
2018-02-17 0:10 ` Heiko Stuebner
2018-02-17 0:10 ` Heiko Stuebner
2018-02-16 12:09 ` [PATCH v3 6/6] drm/rockchip: cdn-dp: remove the " Enric Balletbo i Serra
2018-02-16 12:09 ` Enric Balletbo i Serra
[not found] ` <20180216120956.19034-6-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-02-17 0:10 ` Heiko Stuebner [this message]
2018-02-17 0:10 ` Heiko Stuebner
2018-02-17 0:10 ` Heiko Stuebner
2018-03-16 11:02 ` Heiko Stuebner
2018-03-16 11:02 ` Heiko Stuebner
2018-02-17 0:06 ` [PATCH v3 1/6] phy: rockchip-typec: deprecate some DT properties for various register fields Heiko Stuebner
2018-02-17 0:06 ` Heiko Stuebner
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