Re: Part 2: Re: 2.5.31 boot failure on pdc20267

Re: Part 2: Re: 2.5.31 boot failure on pdc20267

[Petr Vandrovec]

On 16 Aug 02 at 3:23, Andre Hedrick wrote:
> Try reading the entire document first before commenting and showing why
> people should not believe you.
> 
> The author went through great lengths to explain and capture what
> SFF-8038i defined.  The object is to show the difference.
> 
> Now carefully look and see that BAR4 in d1510 is not the same as 
> BAR 4 for SFF-8038i.

Chapter 5 describes IDE class devices, PCI class 0101. If this chapter 
is not normative definition, then it should be clearly stated in the
document, besides that it has no bussiness being there if it is just
for comparsion - just replace whole chapter with reference to the SFF-8038i.

Chapter 3, ATA Host Adapters, and also document name, ATA Host Adapters
Standards, makes strong impression to me that document is normative
for all host adapters. If you'll write chapter 5 in same style
chapter 4 is written (few lines, no registers description), and you'll
change document name, nobody will use it as normative document for
non-ADMA devices. But with current wording it is just normative
document for both PCI IDE DMA and ADMA hosts, even if T13 intentions
were different - document language matters, not intentions.

And amendment you pointed me to strongly signals that also Intel
believe[sd] that document is (in future) normative for PCI IDE DMA host 
adapters, not only for ADMA ones.

I was also impression (from the T13 meeting notes in Feb 20-22 2001
(meetings/e01114r0.pdf, 12.6)) that d1510 is successor of SFF8038.
If it adopts PCI DMA, it should document it (as it does now). If
it obsolete this interface, it should not document it...
                                        Petr Vandrovec
                                        vandrove@vc.cvut.cz

Re: Part 2: Re: 2.5.31 boot failure on pdc20267

[Andre Hedrick]

Petr,

I know exactly what the document started out as and the intentions and the
transformations to what it is now.

The intent was to describe a new HOST protocol.
Something like FP-DMA which is similar to what SBP-2 maps.

Now the document I pointed to as an ammendment had a pre-release only
handed out in paper.  There are no e-copies, and it was the intent of the
second author to preserve the original definition and terms used by 8038i.

Next T13 has no business defining HOST standards it is DISK committee.
Go fish :-/

Now if the lastest evolution of the d1510 has an error well it needs to be
fixed.  Since I know what it is to do and how it does and the intent, I do
not used them for references.

But for the record you are required to have the EOT set if you are using
8038i protocols.

Cheers,

Andre Hedrick
LAD Storage Consulting Group

On Fri, 16 Aug 2002, Petr Vandrovec wrote:

> On 16 Aug 02 at 3:23, Andre Hedrick wrote:
> > Try reading the entire document first before commenting and showing why
> > people should not believe you.
> > 
> > The author went through great lengths to explain and capture what
> > SFF-8038i defined.  The object is to show the difference.
> > 
> > Now carefully look and see that BAR4 in d1510 is not the same as 
> > BAR 4 for SFF-8038i.
> 
> Chapter 5 describes IDE class devices, PCI class 0101. If this chapter 
> is not normative definition, then it should be clearly stated in the
> document, besides that it has no bussiness being there if it is just
> for comparsion - just replace whole chapter with reference to the SFF-8038i.
> 
> Chapter 3, ATA Host Adapters, and also document name, ATA Host Adapters
> Standards, makes strong impression to me that document is normative
> for all host adapters. If you'll write chapter 5 in same style
> chapter 4 is written (few lines, no registers description), and you'll
> change document name, nobody will use it as normative document for
> non-ADMA devices. But with current wording it is just normative
> document for both PCI IDE DMA and ADMA hosts, even if T13 intentions
> were different - document language matters, not intentions.
> 
> And amendment you pointed me to strongly signals that also Intel
> believe[sd] that document is (in future) normative for PCI IDE DMA host 
> adapters, not only for ADMA ones.
> 
> I was also impression (from the T13 meeting notes in Feb 20-22 2001
> (meetings/e01114r0.pdf, 12.6)) that d1510 is successor of SFF8038.
> If it adopts PCI DMA, it should document it (as it does now). If
> it obsolete this interface, it should not document it...
>                                         Petr Vandrovec
>                                         vandrove@vc.cvut.cz
> 
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
> 

Re: Part 2: Re: 2.5.31 boot failure on pdc20267

[Andre Hedrick]

On Fri, 16 Aug 2002, Petr Vandrovec wrote:

> On 16 Aug 02 at 3:23, Andre Hedrick wrote:
> > Try reading the entire document first before commenting and showing why
> > people should not believe you.
> > 
> > The author went through great lengths to explain and capture what
> > SFF-8038i defined.  The object is to show the difference.
> > 
> > Now carefully look and see that BAR4 in d1510 is not the same as 
> > BAR 4 for SFF-8038i.
> 
> Chapter 5 describes IDE class devices, PCI class 0101. If this chapter 
> 
> Chapter 3, ATA Host Adapters, and also document name, ATA Host Adapters

ATA class devices, PCI class 0105.

This what you missed, this what we are debating.  :-/

Cheers,


Andre Hedrick
LAD Storage Consulting Group

Re: 2.5.31 boot failure on pdc20267

[Petr Vandrovec]

On 16 Aug 02 at 2:27, Andre Hedrick wrote:
> On Fri, 16 Aug 2002, Petr Vandrovec wrote:
> 
> > Yes. If you'll look at d1510r0c.pdf from ATA guys, you'll find that
> 
> BUZZIT!
> 
> That is an totally new transport protocol and if you research the pci
> device class you would know that it has nothing to do with the problem.
> If you guys are playing with ADMA on DMA Hosts, oh my!

No. It just reveals that you have no idea what you are talking about.
It was proven when you talked about EDD, and now it is proven again.
Table 3 of rev 0f, page 11:


Byte offset         Description              Attribute     Value
09h            Programming Interface Code  | See Table 4 | Defined in table 1
0Ah            Subclass code                 Read-only     01h - IDE
0Bh            Base class code               Read-only     01h - Mass Storage

and to your surprise, my IDE interface is:
00:1f.1 Class 0101: 8086:244b (rev 05) (prog-if 80 [Master])
so if this device should not have Class 0101, then there is certainly
some problem somewhere.
 
> The context of what is the EOT between the two HOST protocols has no
> meaning.

Yes? Then please tell me what chapter 6, PCI Compatibility and Native
Bus Master Adapters, pages 22-28 of rev 0c, talks about...

In rev 0f it is chapter 5, same name, PDF pages 19-26, document pages 10-17.
EOT is back here in this revision, so actually current standard is OK,
and Intel is misbehaving (or maybe just "extending" standard?).

And if you insist that this chapter does not describe UDMA busmastering
programming interface, then please point me to the correct document.
There is no other document with simillar name on the T13 web.
                                                Petr Vandrovec
                                                vandrove@vc.cvut.cz
                                                

Part 2: Re: 2.5.31 boot failure on pdc20267

[Andre Hedrick]

Petr,

Try reading the entire document first before commenting and showing why
people should not believe you.

The author went through great lengths to explain and capture what
SFF-8038i defined.  The object is to show the difference.

Now carefully look and see that BAR4 in d1510 is not the same as 
BAR 4 for SFF-8038i.

Regards,

Andre Hedrick
LAD Storage Consulting Group

On Fri, 16 Aug 2002, Petr Vandrovec wrote:

> On 16 Aug 02 at 2:27, Andre Hedrick wrote:
> > On Fri, 16 Aug 2002, Petr Vandrovec wrote:
> > 
> > > Yes. If you'll look at d1510r0c.pdf from ATA guys, you'll find that
> > 
> > BUZZIT!
> > 
> > That is an totally new transport protocol and if you research the pci
> > device class you would know that it has nothing to do with the problem.
> > If you guys are playing with ADMA on DMA Hosts, oh my!
> 
> No. It just reveals that you have no idea what you are talking about.
> It was proven when you talked about EDD, and now it is proven again.
> Table 3 of rev 0f, page 11:
> 
> 
> Byte offset         Description              Attribute     Value
> 09h            Programming Interface Code  | See Table 4 | Defined in table 1
> 0Ah            Subclass code                 Read-only     01h - IDE
> 0Bh            Base class code               Read-only     01h - Mass Storage
> 
> and to your surprise, my IDE interface is:
> 00:1f.1 Class 0101: 8086:244b (rev 05) (prog-if 80 [Master])
> so if this device should not have Class 0101, then there is certainly
> some problem somewhere.
>  
> > The context of what is the EOT between the two HOST protocols has no
> > meaning.
> 
> Yes? Then please tell me what chapter 6, PCI Compatibility and Native
> Bus Master Adapters, pages 22-28 of rev 0c, talks about...
> 
> In rev 0f it is chapter 5, same name, PDF pages 19-26, document pages 10-17.
> EOT is back here in this revision, so actually current standard is OK,
> and Intel is misbehaving (or maybe just "extending" standard?).
> 
> And if you insist that this chapter does not describe UDMA busmastering
> programming interface, then please point me to the correct document.
> There is no other document with simillar name on the T13 web.
>                                                 Petr Vandrovec
>                                                 vandrove@vc.cvut.cz
>                                                 
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