[GIT PULL] Rockchip clock changes for 6.16 #1

[Heiko Stuebner <heiko@sntech.de>]

Hi Mike, Stephen,

please find below a pull-request with Rockchip clock change for 6.16


Please pull.

Thanks
Heiko


The following changes since commit 0af2f6be1b4281385b618cb86ad946eded089ac8:

  Linux 6.15-rc1 (2025-04-06 13:11:33 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.16-rockchip-clk1

for you to fetch changes up to 276036283716b9135525b195675ea42801bde204:

  clk: rockchip: rk3528: add slab.h header include (2025-05-15 14:49:05 +0200)

----------------------------------------------------------------
Ability to handle different "General Register Files" syscons, not just
a single system-one, plus ability to model individual gates found there.

For whatever reason Rockchip also moved the mmc-phase-clocks from the
clock-unit for the GRF on some newer socs like the rk3528 (before moving
them fully to the mmc controller itself on the rk3576), so add a new
clock-variant for the phases, reusing the new GRF handling.

Additionally the old rk3036 got real handling of the usb480m mux and
some PLL rates were added.

----------------------------------------------------------------
Alexander Shiyan (1):
      clk: rockchip: rk3588: Add PLL rate for 1500 MHz

Heiko Stuebner (9):
      Merge branch 'v6.16-shared/clkids' into v6.16-clk/next
      Merge branch 'v6.16-shared/clkids' into v6.16-clk/next
      dt-bindings: clock: rk3036: add SCLK_USB480M clock-id
      clk: rockchip: rk3036: fix implementation of usb480m clock mux
      clk: rockchip: rk3036: mark ddrphy as critical
      clk: rockchip: rename branch_muxgrf to branch_grf_mux
      clk: rockchip: rename gate-grf clk file
      clk: rockchip: rk3576: add missing slab.h include
      clk: rockchip: rk3528: add slab.h header include

Nicolas Frattaroli (4):
      dt-bindings: clock: rk3576: add IOC gated clocks
      clk: rockchip: introduce auxiliary GRFs
      clk: rockchip: introduce GRF gates
      clk: rockchip: add GATE_GRFs for SAI MCLKOUT to rk3576

Vasily Khoruzhick (1):
      clk: rockchip: rk3568: Add PLL rate for 33.3MHz

Yao Zi (5):
      clk: rockchip: Drop empty init callback for rk3588 PLL type
      dt-bindings: clock: Add GRF clock definition for RK3528
      clk: rockchip: Support MMC clocks in GRF region
      clk: rockchip: rk3528: Add SD/SDIO tuning clocks in GRF region
      clk: rockchip: Pass NULL as reg pointer when registering GRF MMC clocks

 drivers/clk/rockchip/Makefile                   |   1 +
 drivers/clk/rockchip/clk-gate-grf.c             | 105 ++++++++++++++++++++++++
 drivers/clk/rockchip/clk-mmc-phase.c            |  24 +++++-
 drivers/clk/rockchip/clk-pll.c                  |  11 ---
 drivers/clk/rockchip/clk-rk3036.c               |  11 ++-
 drivers/clk/rockchip/clk-rk3288.c               |   2 +-
 drivers/clk/rockchip/clk-rk3328.c               |   6 +-
 drivers/clk/rockchip/clk-rk3528.c               |  83 +++++++++++++++++--
 drivers/clk/rockchip/clk-rk3568.c               |   3 +-
 drivers/clk/rockchip/clk-rk3576.c               |  60 +++++++++++---
 drivers/clk/rockchip/clk-rk3588.c               |   1 +
 drivers/clk/rockchip/clk-rv1126.c               |   2 +-
 drivers/clk/rockchip/clk.c                      |  38 ++++++++-
 drivers/clk/rockchip/clk.h                      |  75 ++++++++++++++++-
 include/dt-bindings/clock/rk3036-cru.h          |   1 +
 include/dt-bindings/clock/rockchip,rk3528-cru.h |   6 ++
 include/dt-bindings/clock/rockchip,rk3576-cru.h |  10 +++
 17 files changed, 390 insertions(+), 49 deletions(-)
 create mode 100644 drivers/clk/rockchip/clk-gate-grf.c