* [PATCH] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up'
@ 2023-12-19 7:37 Srinivasan Shanmugam
2023-12-21 16:53 ` Rodrigo Siqueira Jordao
2023-12-21 17:13 ` [PATCH v2] " Srinivasan Shanmugam
0 siblings, 2 replies; 4+ messages in thread
From: Srinivasan Shanmugam @ 2023-12-19 7:37 UTC (permalink / raw)
To: Aurabindo Pillai, Rodrigo Siqueira, Alex Deucher
Cc: Charlene Liu, Muhammad Ahmed, Srinivasan Shanmugam, amd-gfx,
Hamza Mahfooz, Srinath Rao
Fixes the following gcc with W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c:1124: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
Cc: Charlene Liu <charlene.liu@amd.com>
Cc: Muhammad Ahmed <ahmed.ahmed@amd.com>
Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Srinath Rao <srinath.rao@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 66 +++++++++++--------
1 file changed, 39 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index ad710b4036de..782c26faf276 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -1120,21 +1120,27 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
update_state->pg_res_update[PG_HPO] = true;
}
+
/**
- * power down sequence
- * ONO Region 3, DCPG 25: hpo - SKIPPED
- * ONO Region 4, DCPG 0: dchubp0, dpp0
- * ONO Region 6, DCPG 1: dchubp1, dpp1
- * ONO Region 8, DCPG 2: dchubp2, dpp2
- * ONO Region 10, DCPG 3: dchubp3, dpp3
- * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
- * ONO Region 5, DCPG 16: dsc0
- * ONO Region 7, DCPG 17: dsc1
- * ONO Region 9, DCPG 18: dsc2
- * ONO Region 11, DCPG 19: dsc3
- * ONO Region 2, DCPG 24: mpc opp optc dwb
- * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
-*/
+ * dcn35_hw_block_power_down() - power down sequence
+ * ONO Region 3, DCPG 25: hpo - SKIPPED
+ * ONO Region 4, DCPG 0: dchubp0, dpp0
+ * ONO Region 6, DCPG 1: dchubp1, dpp1
+ * ONO Region 8, DCPG 2: dchubp2, dpp2
+ * ONO Region 10, DCPG 3: dchubp3, dpp3
+ * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
+ * ONO Region 5, DCPG 16: dsc0
+ * ONO Region 7, DCPG 17: dsc1
+ * ONO Region 9, DCPG 18: dsc2
+ * ONO Region 11, DCPG 19: dsc3
+ * ONO Region 2, DCPG 24: mpc opp optc dwb
+ * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
+ *
+ * @dc: Current DC state
+ * @update_state: update PG sequence states for HW block
+ *
+ * Return: void.
+ */
void dcn35_hw_block_power_down(struct dc *dc,
struct pg_block_update *update_state)
{
@@ -1172,20 +1178,26 @@ void dcn35_hw_block_power_down(struct dc *dc,
//domain22, 23, 25 currently always on.
}
+
/**
- * power up sequence
- * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
- * ONO Region 2, DCPG 24: mpc opp optc dwb
- * ONO Region 5, DCPG 16: dsc0
- * ONO Region 7, DCPG 17: dsc1
- * ONO Region 9, DCPG 18: dsc2
- * ONO Region 11, DCPG 19: dsc3
- * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
- * ONO Region 4, DCPG 0: dchubp0, dpp0
- * ONO Region 6, DCPG 1: dchubp1, dpp1
- * ONO Region 8, DCPG 2: dchubp2, dpp2
- * ONO Region 10, DCPG 3: dchubp3, dpp3
- * ONO Region 3, DCPG 25: hpo - SKIPPED
+ * dcn35_hw_block_power_up - power up sequence
+ * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
+ * ONO Region 2, DCPG 24: mpc opp optc dwb
+ * ONO Region 5, DCPG 16: dsc0
+ * ONO Region 7, DCPG 17: dsc1
+ * ONO Region 9, DCPG 18: dsc2
+ * ONO Region 11, DCPG 19: dsc3
+ * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
+ * ONO Region 4, DCPG 0: dchubp0, dpp0
+ * ONO Region 6, DCPG 1: dchubp1, dpp1
+ * ONO Region 8, DCPG 2: dchubp2, dpp2
+ * ONO Region 10, DCPG 3: dchubp3, dpp3
+ * ONO Region 3, DCPG 25: hpo - SKIPPED
+ *
+ * @dc: Current DC state
+ * @update_state: update PG sequence states for HW block
+ *
+ * Return: void.
*/
void dcn35_hw_block_power_up(struct dc *dc,
struct pg_block_update *update_state)
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up'
2023-12-19 7:37 [PATCH] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up' Srinivasan Shanmugam
@ 2023-12-21 16:53 ` Rodrigo Siqueira Jordao
2023-12-21 17:13 ` [PATCH v2] " Srinivasan Shanmugam
1 sibling, 0 replies; 4+ messages in thread
From: Rodrigo Siqueira Jordao @ 2023-12-21 16:53 UTC (permalink / raw)
To: Srinivasan Shanmugam, Aurabindo Pillai, Alex Deucher
Cc: Charlene Liu, Muhammad Ahmed, Hamza Mahfooz, amd-gfx, Srinath Rao
On 12/19/23 00:37, Srinivasan Shanmugam wrote:
> Fixes the following gcc with W=1:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c:1124: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>
> Cc: Charlene Liu <charlene.liu@amd.com>
> Cc: Muhammad Ahmed <ahmed.ahmed@amd.com>
> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Srinath Rao <srinath.rao@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
> .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 66 +++++++++++--------
> 1 file changed, 39 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> index ad710b4036de..782c26faf276 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> @@ -1120,21 +1120,27 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
> update_state->pg_res_update[PG_HPO] = true;
>
> }
> +
> /**
> - * power down sequence
> - * ONO Region 3, DCPG 25: hpo - SKIPPED
> - * ONO Region 4, DCPG 0: dchubp0, dpp0
> - * ONO Region 6, DCPG 1: dchubp1, dpp1
> - * ONO Region 8, DCPG 2: dchubp2, dpp2
> - * ONO Region 10, DCPG 3: dchubp3, dpp3
> - * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
> - * ONO Region 5, DCPG 16: dsc0
> - * ONO Region 7, DCPG 17: dsc1
> - * ONO Region 9, DCPG 18: dsc2
> - * ONO Region 11, DCPG 19: dsc3
> - * ONO Region 2, DCPG 24: mpc opp optc dwb
> - * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
> -*/
> + * dcn35_hw_block_power_down() - power down sequence
Maybe add a simple explanation phrase like this:
The following sequence describes the ON-OFF (ONO) sequence:
Also, could you create another patch that adds ONO in our display
glossary at `Documentation/gpu/amdgpu/display/dc-glossary.rst`?
> + * ONO Region 3, DCPG 25: hpo - SKIPPED
> + * ONO Region 4, DCPG 0: dchubp0, dpp0
> + * ONO Region 6, DCPG 1: dchubp1, dpp1
> + * ONO Region 8, DCPG 2: dchubp2, dpp2
> + * ONO Region 10, DCPG 3: dchubp3, dpp3
> + * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
> + * ONO Region 5, DCPG 16: dsc0
> + * ONO Region 7, DCPG 17: dsc1
> + * ONO Region 9, DCPG 18: dsc2
> + * ONO Region 11, DCPG 19: dsc3
> + * ONO Region 2, DCPG 24: mpc opp optc dwb
> + * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
> + *
> + * @dc: Current DC state
> + * @update_state: update PG sequence states for HW block
> + *
> + * Return: void.
I don't think you need to document return void.
Thanks
Siqueira
> + */
> void dcn35_hw_block_power_down(struct dc *dc,
> struct pg_block_update *update_state)
> {
> @@ -1172,20 +1178,26 @@ void dcn35_hw_block_power_down(struct dc *dc,
> //domain22, 23, 25 currently always on.
>
> }
> +
> /**
> - * power up sequence
> - * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
> - * ONO Region 2, DCPG 24: mpc opp optc dwb
> - * ONO Region 5, DCPG 16: dsc0
> - * ONO Region 7, DCPG 17: dsc1
> - * ONO Region 9, DCPG 18: dsc2
> - * ONO Region 11, DCPG 19: dsc3
> - * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
> - * ONO Region 4, DCPG 0: dchubp0, dpp0
> - * ONO Region 6, DCPG 1: dchubp1, dpp1
> - * ONO Region 8, DCPG 2: dchubp2, dpp2
> - * ONO Region 10, DCPG 3: dchubp3, dpp3
> - * ONO Region 3, DCPG 25: hpo - SKIPPED
> + * dcn35_hw_block_power_up - power up sequence
> + * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
> + * ONO Region 2, DCPG 24: mpc opp optc dwb
> + * ONO Region 5, DCPG 16: dsc0
> + * ONO Region 7, DCPG 17: dsc1
> + * ONO Region 9, DCPG 18: dsc2
> + * ONO Region 11, DCPG 19: dsc3
> + * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
> + * ONO Region 4, DCPG 0: dchubp0, dpp0
> + * ONO Region 6, DCPG 1: dchubp1, dpp1
> + * ONO Region 8, DCPG 2: dchubp2, dpp2
> + * ONO Region 10, DCPG 3: dchubp3, dpp3
> + * ONO Region 3, DCPG 25: hpo - SKIPPED
> + *
> + * @dc: Current DC state
> + * @update_state: update PG sequence states for HW block
> + *
> + * Return: void.
> */
> void dcn35_hw_block_power_up(struct dc *dc,
> struct pg_block_update *update_state)
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up'
2023-12-19 7:37 [PATCH] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up' Srinivasan Shanmugam
2023-12-21 16:53 ` Rodrigo Siqueira Jordao
@ 2023-12-21 17:13 ` Srinivasan Shanmugam
2023-12-21 17:35 ` Rodrigo Siqueira Jordao
1 sibling, 1 reply; 4+ messages in thread
From: Srinivasan Shanmugam @ 2023-12-21 17:13 UTC (permalink / raw)
To: Aurabindo Pillai, Rodrigo Siqueira
Cc: Charlene Liu, Muhammad Ahmed, Srinivasan Shanmugam, amd-gfx,
Hamza Mahfooz, Alex Deucher, Srinath Rao
Fixes the following gcc with W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c:1124: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
Cc: Charlene Liu <charlene.liu@amd.com>
Cc: Muhammad Ahmed <ahmed.ahmed@amd.com>
Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Srinath Rao <srinath.rao@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
v2:
- Added explaination for power down & power up sequence (Rodrigo)
- Removed documenting return void. (Rodrigo)
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 68 +++++++++++--------
1 file changed, 41 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index ad710b4036de..1cb61c46d911 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -1120,21 +1120,28 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
update_state->pg_res_update[PG_HPO] = true;
}
+
/**
- * power down sequence
- * ONO Region 3, DCPG 25: hpo - SKIPPED
- * ONO Region 4, DCPG 0: dchubp0, dpp0
- * ONO Region 6, DCPG 1: dchubp1, dpp1
- * ONO Region 8, DCPG 2: dchubp2, dpp2
- * ONO Region 10, DCPG 3: dchubp3, dpp3
- * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
- * ONO Region 5, DCPG 16: dsc0
- * ONO Region 7, DCPG 17: dsc1
- * ONO Region 9, DCPG 18: dsc2
- * ONO Region 11, DCPG 19: dsc3
- * ONO Region 2, DCPG 24: mpc opp optc dwb
- * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
-*/
+ * dcn35_hw_block_power_down() - power down sequence
+ *
+ * The following sequence describes the ON-OFF (ONO) for power down:
+ *
+ * ONO Region 3, DCPG 25: hpo - SKIPPED
+ * ONO Region 4, DCPG 0: dchubp0, dpp0
+ * ONO Region 6, DCPG 1: dchubp1, dpp1
+ * ONO Region 8, DCPG 2: dchubp2, dpp2
+ * ONO Region 10, DCPG 3: dchubp3, dpp3
+ * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
+ * ONO Region 5, DCPG 16: dsc0
+ * ONO Region 7, DCPG 17: dsc1
+ * ONO Region 9, DCPG 18: dsc2
+ * ONO Region 11, DCPG 19: dsc3
+ * ONO Region 2, DCPG 24: mpc opp optc dwb
+ * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
+ *
+ * @dc: Current DC state
+ * @update_state: update PG sequence states for HW block
+ */
void dcn35_hw_block_power_down(struct dc *dc,
struct pg_block_update *update_state)
{
@@ -1172,20 +1179,27 @@ void dcn35_hw_block_power_down(struct dc *dc,
//domain22, 23, 25 currently always on.
}
+
/**
- * power up sequence
- * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
- * ONO Region 2, DCPG 24: mpc opp optc dwb
- * ONO Region 5, DCPG 16: dsc0
- * ONO Region 7, DCPG 17: dsc1
- * ONO Region 9, DCPG 18: dsc2
- * ONO Region 11, DCPG 19: dsc3
- * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
- * ONO Region 4, DCPG 0: dchubp0, dpp0
- * ONO Region 6, DCPG 1: dchubp1, dpp1
- * ONO Region 8, DCPG 2: dchubp2, dpp2
- * ONO Region 10, DCPG 3: dchubp3, dpp3
- * ONO Region 3, DCPG 25: hpo - SKIPPED
+ * dcn35_hw_block_power_up() - power up sequence
+ *
+ * The following sequence describes the ON-OFF (ONO) for power up:
+ *
+ * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
+ * ONO Region 2, DCPG 24: mpc opp optc dwb
+ * ONO Region 5, DCPG 16: dsc0
+ * ONO Region 7, DCPG 17: dsc1
+ * ONO Region 9, DCPG 18: dsc2
+ * ONO Region 11, DCPG 19: dsc3
+ * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
+ * ONO Region 4, DCPG 0: dchubp0, dpp0
+ * ONO Region 6, DCPG 1: dchubp1, dpp1
+ * ONO Region 8, DCPG 2: dchubp2, dpp2
+ * ONO Region 10, DCPG 3: dchubp3, dpp3
+ * ONO Region 3, DCPG 25: hpo - SKIPPED
+ *
+ * @dc: Current DC state
+ * @update_state: update PG sequence states for HW block
*/
void dcn35_hw_block_power_up(struct dc *dc,
struct pg_block_update *update_state)
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up'
2023-12-21 17:13 ` [PATCH v2] " Srinivasan Shanmugam
@ 2023-12-21 17:35 ` Rodrigo Siqueira Jordao
0 siblings, 0 replies; 4+ messages in thread
From: Rodrigo Siqueira Jordao @ 2023-12-21 17:35 UTC (permalink / raw)
To: Srinivasan Shanmugam, Aurabindo Pillai
Cc: Charlene Liu, Muhammad Ahmed, amd-gfx, Hamza Mahfooz,
Alex Deucher, Srinath Rao
On 12/21/23 10:13, Srinivasan Shanmugam wrote:
> Fixes the following gcc with W=1:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c:1124: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>
> Cc: Charlene Liu <charlene.liu@amd.com>
> Cc: Muhammad Ahmed <ahmed.ahmed@amd.com>
> Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Srinath Rao <srinath.rao@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>
> v2:
> - Added explaination for power down & power up sequence (Rodrigo)
> - Removed documenting return void. (Rodrigo)
>
> .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 68 +++++++++++--------
> 1 file changed, 41 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> index ad710b4036de..1cb61c46d911 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
> @@ -1120,21 +1120,28 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
> update_state->pg_res_update[PG_HPO] = true;
>
> }
> +
> /**
> - * power down sequence
> - * ONO Region 3, DCPG 25: hpo - SKIPPED
> - * ONO Region 4, DCPG 0: dchubp0, dpp0
> - * ONO Region 6, DCPG 1: dchubp1, dpp1
> - * ONO Region 8, DCPG 2: dchubp2, dpp2
> - * ONO Region 10, DCPG 3: dchubp3, dpp3
> - * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
> - * ONO Region 5, DCPG 16: dsc0
> - * ONO Region 7, DCPG 17: dsc1
> - * ONO Region 9, DCPG 18: dsc2
> - * ONO Region 11, DCPG 19: dsc3
> - * ONO Region 2, DCPG 24: mpc opp optc dwb
> - * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
> -*/
> + * dcn35_hw_block_power_down() - power down sequence
> + *
> + * The following sequence describes the ON-OFF (ONO) for power down:
> + *
> + * ONO Region 3, DCPG 25: hpo - SKIPPED
> + * ONO Region 4, DCPG 0: dchubp0, dpp0
> + * ONO Region 6, DCPG 1: dchubp1, dpp1
> + * ONO Region 8, DCPG 2: dchubp2, dpp2
> + * ONO Region 10, DCPG 3: dchubp3, dpp3
> + * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
> + * ONO Region 5, DCPG 16: dsc0
> + * ONO Region 7, DCPG 17: dsc1
> + * ONO Region 9, DCPG 18: dsc2
> + * ONO Region 11, DCPG 19: dsc3
> + * ONO Region 2, DCPG 24: mpc opp optc dwb
> + * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
> + *
> + * @dc: Current DC state
> + * @update_state: update PG sequence states for HW block
> + */
> void dcn35_hw_block_power_down(struct dc *dc,
> struct pg_block_update *update_state)
> {
> @@ -1172,20 +1179,27 @@ void dcn35_hw_block_power_down(struct dc *dc,
> //domain22, 23, 25 currently always on.
>
> }
> +
> /**
> - * power up sequence
> - * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
> - * ONO Region 2, DCPG 24: mpc opp optc dwb
> - * ONO Region 5, DCPG 16: dsc0
> - * ONO Region 7, DCPG 17: dsc1
> - * ONO Region 9, DCPG 18: dsc2
> - * ONO Region 11, DCPG 19: dsc3
> - * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
> - * ONO Region 4, DCPG 0: dchubp0, dpp0
> - * ONO Region 6, DCPG 1: dchubp1, dpp1
> - * ONO Region 8, DCPG 2: dchubp2, dpp2
> - * ONO Region 10, DCPG 3: dchubp3, dpp3
> - * ONO Region 3, DCPG 25: hpo - SKIPPED
> + * dcn35_hw_block_power_up() - power up sequence
> + *
> + * The following sequence describes the ON-OFF (ONO) for power up:
> + *
> + * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
> + * ONO Region 2, DCPG 24: mpc opp optc dwb
> + * ONO Region 5, DCPG 16: dsc0
> + * ONO Region 7, DCPG 17: dsc1
> + * ONO Region 9, DCPG 18: dsc2
> + * ONO Region 11, DCPG 19: dsc3
> + * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
> + * ONO Region 4, DCPG 0: dchubp0, dpp0
> + * ONO Region 6, DCPG 1: dchubp1, dpp1
> + * ONO Region 8, DCPG 2: dchubp2, dpp2
> + * ONO Region 10, DCPG 3: dchubp3, dpp3
> + * ONO Region 3, DCPG 25: hpo - SKIPPED
> + *
> + * @dc: Current DC state
> + * @update_state: update PG sequence states for HW block
> */
> void dcn35_hw_block_power_up(struct dc *dc,
> struct pg_block_update *update_state)
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-12-21 17:35 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2023-12-19 7:37 [PATCH] drm/amd/display: Adjust kdoc for 'dcn35_hw_block_power_down' & 'dcn35_hw_block_power_up' Srinivasan Shanmugam
2023-12-21 16:53 ` Rodrigo Siqueira Jordao
2023-12-21 17:13 ` [PATCH v2] " Srinivasan Shanmugam
2023-12-21 17:35 ` Rodrigo Siqueira Jordao
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