* [PATCH v1 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576
@ 2025-06-16 21:22 ` John Clark
0 siblings, 0 replies; 12+ messages in thread
From: John Clark @ 2025-06-16 21:22 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
This series adds device tree support for the FriendlyElec NanoPi M5 board,
powered by the Rockchip RK3576 SoC (4x Cortex-A72, 4x Cortex-A53, Mali-G52
MC3 GPU, 6 TOPS NPU). The patches enable basic booting and connectivity,
including dual 1Gbps Ethernet, USB 3.2, microSD, M.2 PCIe NVMe, and HDMI.
Patch 1 updates the DT bindings in rockchip.yaml.
Patch 2 adds the NanoPi M5 device tree and Makefile entry.
No MAINTAINERS update is needed, as the new file is covered by the existing
ARM/Rockchip SoC entry.
Tested on NanoPi M5 with successful boot and feature validation.
Signed-off-by: John Clark <inindev@gmail.com>
---
John Clark (2):
dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
.../devicetree/bindings/arm/rockchip.yaml | 6 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3576-nanopi-m5.dts | 969 ++++++++++++++++++
3 files changed, 976 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
--
2.39.5
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576
@ 2025-06-16 21:22 ` John Clark
0 siblings, 0 replies; 12+ messages in thread
From: John Clark @ 2025-06-16 21:22 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
This series adds device tree support for the FriendlyElec NanoPi M5 board,
powered by the Rockchip RK3576 SoC (4x Cortex-A72, 4x Cortex-A53, Mali-G52
MC3 GPU, 6 TOPS NPU). The patches enable basic booting and connectivity,
including dual 1Gbps Ethernet, USB 3.2, microSD, M.2 PCIe NVMe, and HDMI.
Patch 1 updates the DT bindings in rockchip.yaml.
Patch 2 adds the NanoPi M5 device tree and Makefile entry.
No MAINTAINERS update is needed, as the new file is covered by the existing
ARM/Rockchip SoC entry.
Tested on NanoPi M5 with successful boot and feature validation.
Signed-off-by: John Clark <inindev@gmail.com>
---
John Clark (2):
dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
.../devicetree/bindings/arm/rockchip.yaml | 6 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3576-nanopi-m5.dts | 969 ++++++++++++++++++
3 files changed, 976 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
--
2.39.5
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 1/2] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
2025-06-16 21:22 ` John Clark
@ 2025-06-16 21:22 ` John Clark
-1 siblings, 0 replies; 12+ messages in thread
From: John Clark @ 2025-06-16 21:22 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
Add device tree documentation for rk3576-nanopi-m5
Signed-off-by: John Clark <inindev@gmail.com>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 59b69c4741c5..10de9b7bdfcc 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -295,6 +295,12 @@ properties:
- friendlyarm,nanopi-r4s-enterprise
- const: rockchip,rk3399
+ - description: FriendlyElec NanoPi M5 series boards
+ items:
+ - enum:
+ - friendlyarm,nanopi-m5
+ - const: rockchip,rk3576
+
- description: FriendlyElec NanoPi R5 series boards
items:
- enum:
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 1/2] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
@ 2025-06-16 21:22 ` John Clark
0 siblings, 0 replies; 12+ messages in thread
From: John Clark @ 2025-06-16 21:22 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
Add device tree documentation for rk3576-nanopi-m5
Signed-off-by: John Clark <inindev@gmail.com>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 59b69c4741c5..10de9b7bdfcc 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -295,6 +295,12 @@ properties:
- friendlyarm,nanopi-r4s-enterprise
- const: rockchip,rk3399
+ - description: FriendlyElec NanoPi M5 series boards
+ items:
+ - enum:
+ - friendlyarm,nanopi-m5
+ - const: rockchip,rk3576
+
- description: FriendlyElec NanoPi R5 series boards
items:
- enum:
--
2.39.5
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
2025-06-16 21:22 ` John Clark
@ 2025-06-16 21:22 ` John Clark
-1 siblings, 0 replies; 12+ messages in thread
From: John Clark @ 2025-06-16 21:22 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
(4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
basic booting and connectivity.
Supported features:
- RK3576 SoC
- 4GB/8GB/16GB LPDDR4X/LPDDR5 RAM
- 16MB SPI Nor Flash
- 2x 1Gbps Ethernet
- 2x USB 3.2 Gen 1 Type-A ports
- microSD UHS-I
- M.2 M-Key PCIe 2.1 x1 NVMe support
- HDMI 1.4/2.0 (up to 4096x2304@60Hz)
- 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO)
- Debug UART
- RTC with HYM8563TS
- Power via USB-C (PD, 6V~20V)
Signed-off-by: John Clark <inindev@gmail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3576-nanopi-m5.dts | 969 ++++++++++++++++++
2 files changed, 970 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b813866ba283..2c731890d18b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
new file mode 100644
index 000000000000..373c1237b41b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
@@ -0,0 +1,969 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2025 John Clark <inindev@gmail.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+#include "rk3576.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi M5";
+ compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ gpio_keys: gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key1_pin>;
+
+ button@1 {
+ debounce-interval = <50>;
+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "K1";
+ linux,code = <BTN_1>;
+ wakeup-source;
+ };
+ };
+
+ gpio_leds: gpio-leds {
+ compatible = "gpio-leds";
+
+ sys_led: led-0 {
+ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
+ label = "sys_led";
+ linux,default-trigger = "heartbeat";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sys_led_pin>;
+ };
+
+ lan_led: led-1 {
+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
+ label = "lan_led";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lan_led_pin>;
+ };
+
+ wan_led: led-2 {
+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "wan_led";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wan_led_pin>;
+ };
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ hdmi-pwr-supply = <&vcc_5v0_hdmi>;
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "realtek,rt5616-codec";
+
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "IN1P", "Microphone Jack";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Microphone", "Microphone Jack";
+
+ simple-audio-card,codec {
+ sound-dai = <&rt5616>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ };
+ };
+
+ vcc_12v_dcin: regulator-vcc-12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-name = "vcc_12v_dcin";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vcc_1v1_nldo_s3";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-name = "vcc_2v0_pldo_s3";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_m2_keym: regulator-vcc-3v3-m2_keym {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_m2_pwren>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_m2_keym";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_s0_pwren>;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc_3v3_sd_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_5v0_device: regulator-vcc-5v0-device {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_device";
+ vin-supply = <&vcc_12v_dcin>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_5v0_hdmi: regulator-vcc-5v0-hdmi {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_con_en>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_hdmi";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_5v0_host: regulator-vcc-5v0-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwren>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_host";
+ vin-supply = <&vcc_5v0_device>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_5v0_otg: regulator-vcc-5v0-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg0_pwren>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_otg";
+ vin-supply = <&vcc_5v0_device>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_5v0_sys: regulator-vcc-5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_sys";
+ vin-supply = <&vcc_12v_dcin>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&fspi1m1_pins {
+ rockchip,pins =
+ /* clk, d0~4 */
+ <1 RK_PD5 3 &pcfg_pull_none>,
+ <1 RK_PC4 3 &pcfg_pull_none>,
+ <1 RK_PC5 3 &pcfg_pull_none>,
+ <1 RK_PC6 3 &pcfg_pull_none>,
+ <1 RK_PC7 3 &pcfg_pull_none>;
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð0m0_miim
+ ð0m0_tx_bus2
+ ð0m0_rx_bus2
+ ð0m0_rgmii_clk
+ ð0m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1m0_miim
+ ð1m0_tx_bus2
+ ð1m0_rx_bus2
+ ð1m0_rgmii_clk
+ ð1m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdptxphy {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ pmic@23 {
+ compatible = "rockchip,rk806";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-parent = <&gpio0>;
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc_5v0_sys>;
+ vcc2-supply = <&vcc_5v0_sys>;
+ vcc3-supply = <&vcc_5v0_sys>;
+ vcc4-supply = <&vcc_5v0_sys>;
+ vcc5-supply = <&vcc_5v0_sys>;
+ vcc6-supply = <&vcc_5v0_sys>;
+ vcc7-supply = <&vcc_5v0_sys>;
+ vcc8-supply = <&vcc_5v0_sys>;
+ vcc9-supply = <&vcc_5v0_sys>;
+ vcc10-supply = <&vcc_5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc_5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc_5v0_sys>;
+
+ rk806_dvs1_null: rk806_dvs1_null {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs1_slp: rk806_dvs1_slp {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs1_rst: rk806_dvs1_rst {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_null: rk806_dvs2_null {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_slp: rk806_dvs2_slp {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs2_rst: rk806_dvs2_rst {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_dvs: rk806_dvs2_dvs {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs2_gpio: rk806_dvs2_gpio {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun5";
+ };
+
+ rk806_dvs3_null: rk806_dvs3_null {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_slp: rk806_dvs3_slp {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs3_rst: rk806_dvs3_rst {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs3_dvs: rk806_dvs3_dvs {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs3_gpio: rk806_dvs3_gpio {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun5";
+ };
+
+ regulators {
+ vdd_cpu_big_s0: dcdc-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_big_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_npu_s0: dcdc-reg2 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_npu_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd_gpu_s0: dcdc-reg5 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_logic_s0: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <800000>;
+ regulator-name = "vdd_logic_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdd_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo2_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo6_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v75_hdmi_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <837500>;
+ regulator-max-microvolt = <837500>;
+ regulator-name = "vdda0v75_hdmi_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdda_0v75_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "hym8563";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
+&i2c5 {
+ clock-frequency = <200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5m3_xfer>;
+ status = "okay";
+
+ rt5616: audio-codec@1b {
+ compatible = "realtek,rt5616";
+ reg = <0x1b>;
+ assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru CLK_SAI2_MCLKOUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ clocks = <&cru REFCLKO25M_GMAC0_OUT>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_int>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ clocks = <&cru REFCLKO25M_GMAC1_OUT>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_int>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_m2_reset>;
+ reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3_m2_keym>;
+ status = "okay";
+};
+
+&pinctrl {
+ gpio-key {
+ key1_pin: key1-pin {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gpio-leds {
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gmac {
+ gmac0_int: gmac0-int {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ gmac0_rst: gmac0-rst {
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ gmac1_int: gmac1-int {
+ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ gmac1_rst: gmac1-rst {
+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hdmi {
+ hdmi_con_en: hdmi-con-en {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pcie {
+ pcie_m2_pwren: pcie-m2-pwren {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ pcie_m2_reset: pcie-m2-reset {
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sd_s0_pwren: sd-s0-pwren {
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ usb_host_pwren: usb-host-pwren {
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ usb_otg0_pwren: usb-otg0-pwren {
+ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&rng {
+ status = "okay";
+};
+
+&sai2 {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcca_1v8_s0>;
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ no-mmc;
+ no-sdio;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc_3v3_sd_s0>;
+ status = "okay";
+};
+
+&sfc1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspi1m1_csn0 &fspi1m1_pins>;
+ status = "okay";
+
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ m25p,fast-read;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ vcc-supply = <&vcc_1v8_s3>;
+ };
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ phy-supply = <&vcc_5v0_otg>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc_5v0_host>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usbdp_phy {
+ status = "okay";
+};
+
+&usb_drd0_dwc3 {
+ dr_mode = "otg";
+ extcon = <&u2phy0>;
+ status = "okay";
+};
+
+&usb_drd1_dwc3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
+
+&wdt {
+ status= "okay";
+};
--
2.39.5
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
@ 2025-06-16 21:22 ` John Clark
0 siblings, 0 replies; 12+ messages in thread
From: John Clark @ 2025-06-16 21:22 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
(4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
basic booting and connectivity.
Supported features:
- RK3576 SoC
- 4GB/8GB/16GB LPDDR4X/LPDDR5 RAM
- 16MB SPI Nor Flash
- 2x 1Gbps Ethernet
- 2x USB 3.2 Gen 1 Type-A ports
- microSD UHS-I
- M.2 M-Key PCIe 2.1 x1 NVMe support
- HDMI 1.4/2.0 (up to 4096x2304@60Hz)
- 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO)
- Debug UART
- RTC with HYM8563TS
- Power via USB-C (PD, 6V~20V)
Signed-off-by: John Clark <inindev@gmail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3576-nanopi-m5.dts | 969 ++++++++++++++++++
2 files changed, 970 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b813866ba283..2c731890d18b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
new file mode 100644
index 000000000000..373c1237b41b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
@@ -0,0 +1,969 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2025 John Clark <inindev@gmail.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+#include "rk3576.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi M5";
+ compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ gpio_keys: gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key1_pin>;
+
+ button@1 {
+ debounce-interval = <50>;
+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "K1";
+ linux,code = <BTN_1>;
+ wakeup-source;
+ };
+ };
+
+ gpio_leds: gpio-leds {
+ compatible = "gpio-leds";
+
+ sys_led: led-0 {
+ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
+ label = "sys_led";
+ linux,default-trigger = "heartbeat";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sys_led_pin>;
+ };
+
+ lan_led: led-1 {
+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
+ label = "lan_led";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lan_led_pin>;
+ };
+
+ wan_led: led-2 {
+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "wan_led";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wan_led_pin>;
+ };
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ hdmi-pwr-supply = <&vcc_5v0_hdmi>;
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "realtek,rt5616-codec";
+
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "IN1P", "Microphone Jack";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Microphone", "Microphone Jack";
+
+ simple-audio-card,codec {
+ sound-dai = <&rt5616>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ };
+ };
+
+ vcc_12v_dcin: regulator-vcc-12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-name = "vcc_12v_dcin";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vcc_1v1_nldo_s3";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-name = "vcc_2v0_pldo_s3";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_m2_keym: regulator-vcc-3v3-m2_keym {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_m2_pwren>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_m2_keym";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_s0_pwren>;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc_3v3_sd_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_5v0_device: regulator-vcc-5v0-device {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_device";
+ vin-supply = <&vcc_12v_dcin>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_5v0_hdmi: regulator-vcc-5v0-hdmi {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_con_en>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_hdmi";
+ vin-supply = <&vcc_5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_5v0_host: regulator-vcc-5v0-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwren>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_host";
+ vin-supply = <&vcc_5v0_device>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_5v0_otg: regulator-vcc-5v0-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg0_pwren>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_otg";
+ vin-supply = <&vcc_5v0_device>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_5v0_sys: regulator-vcc-5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-name = "vcc_5v0_sys";
+ vin-supply = <&vcc_12v_dcin>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&fspi1m1_pins {
+ rockchip,pins =
+ /* clk, d0~4 */
+ <1 RK_PD5 3 &pcfg_pull_none>,
+ <1 RK_PC4 3 &pcfg_pull_none>,
+ <1 RK_PC5 3 &pcfg_pull_none>,
+ <1 RK_PC6 3 &pcfg_pull_none>,
+ <1 RK_PC7 3 &pcfg_pull_none>;
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð0m0_miim
+ ð0m0_tx_bus2
+ ð0m0_rx_bus2
+ ð0m0_rgmii_clk
+ ð0m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1m0_miim
+ ð1m0_tx_bus2
+ ð1m0_rx_bus2
+ ð1m0_rgmii_clk
+ ð1m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdptxphy {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ pmic@23 {
+ compatible = "rockchip,rk806";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-parent = <&gpio0>;
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc_5v0_sys>;
+ vcc2-supply = <&vcc_5v0_sys>;
+ vcc3-supply = <&vcc_5v0_sys>;
+ vcc4-supply = <&vcc_5v0_sys>;
+ vcc5-supply = <&vcc_5v0_sys>;
+ vcc6-supply = <&vcc_5v0_sys>;
+ vcc7-supply = <&vcc_5v0_sys>;
+ vcc8-supply = <&vcc_5v0_sys>;
+ vcc9-supply = <&vcc_5v0_sys>;
+ vcc10-supply = <&vcc_5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc_5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc_5v0_sys>;
+
+ rk806_dvs1_null: rk806_dvs1_null {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs1_slp: rk806_dvs1_slp {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs1_rst: rk806_dvs1_rst {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_null: rk806_dvs2_null {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_slp: rk806_dvs2_slp {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs2_rst: rk806_dvs2_rst {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_dvs: rk806_dvs2_dvs {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs2_gpio: rk806_dvs2_gpio {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun5";
+ };
+
+ rk806_dvs3_null: rk806_dvs3_null {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_slp: rk806_dvs3_slp {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs3_rst: rk806_dvs3_rst {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs3_dvs: rk806_dvs3_dvs {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs3_gpio: rk806_dvs3_gpio {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun5";
+ };
+
+ regulators {
+ vdd_cpu_big_s0: dcdc-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_big_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_npu_s0: dcdc-reg2 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_npu_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd_gpu_s0: dcdc-reg5 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_logic_s0: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <800000>;
+ regulator-name = "vdd_logic_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdd_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo2_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo6_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v75_hdmi_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <837500>;
+ regulator-max-microvolt = <837500>;
+ regulator-name = "vdda0v75_hdmi_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdda_0v75_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "hym8563";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
+&i2c5 {
+ clock-frequency = <200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5m3_xfer>;
+ status = "okay";
+
+ rt5616: audio-codec@1b {
+ compatible = "realtek,rt5616";
+ reg = <0x1b>;
+ assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ clocks = <&cru CLK_SAI2_MCLKOUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ clocks = <&cru REFCLKO25M_GMAC0_OUT>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_int>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ clocks = <&cru REFCLKO25M_GMAC1_OUT>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1_int>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_m2_reset>;
+ reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3_m2_keym>;
+ status = "okay";
+};
+
+&pinctrl {
+ gpio-key {
+ key1_pin: key1-pin {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gpio-leds {
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gmac {
+ gmac0_int: gmac0-int {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ gmac0_rst: gmac0-rst {
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ gmac1_int: gmac1-int {
+ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ gmac1_rst: gmac1-rst {
+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hdmi {
+ hdmi_con_en: hdmi-con-en {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pcie {
+ pcie_m2_pwren: pcie-m2-pwren {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ pcie_m2_reset: pcie-m2-reset {
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sd_s0_pwren: sd-s0-pwren {
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ usb_host_pwren: usb-host-pwren {
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ usb_otg0_pwren: usb-otg0-pwren {
+ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&rng {
+ status = "okay";
+};
+
+&sai2 {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcca_1v8_s0>;
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ no-mmc;
+ no-sdio;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc_3v3_sd_s0>;
+ status = "okay";
+};
+
+&sfc1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspi1m1_csn0 &fspi1m1_pins>;
+ status = "okay";
+
+ spi-nor@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ m25p,fast-read;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ vcc-supply = <&vcc_1v8_s3>;
+ };
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ phy-supply = <&vcc_5v0_otg>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc_5v0_host>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usbdp_phy {
+ status = "okay";
+};
+
+&usb_drd0_dwc3 {
+ dr_mode = "otg";
+ extcon = <&u2phy0>;
+ status = "okay";
+};
+
+&usb_drd1_dwc3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
+
+&wdt {
+ status= "okay";
+};
--
2.39.5
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
2025-06-16 21:22 ` John Clark
@ 2025-06-20 9:12 ` Heiko Stuebner
-1 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2025-06-20 9:12 UTC (permalink / raw)
To: John Clark
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
Hi,
Am Montag, 16. Juni 2025, 23:22:14 Mitteleuropäische Sommerzeit schrieb John Clark:
> Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
> (4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
> basic booting and connectivity.
>
> Supported features:
> - RK3576 SoC
> - 4GB/8GB/16GB LPDDR4X/LPDDR5 RAM
> - 16MB SPI Nor Flash
> - 2x 1Gbps Ethernet
> - 2x USB 3.2 Gen 1 Type-A ports
> - microSD UHS-I
> - M.2 M-Key PCIe 2.1 x1 NVMe support
> - HDMI 1.4/2.0 (up to 4096x2304@60Hz)
> - 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO)
> - Debug UART
> - RTC with HYM8563TS
> - Power via USB-C (PD, 6V~20V)
>
> Signed-off-by: John Clark <inindev@gmail.com>
> ---
apart from the schema problems, Rob's bot found, I saw some additional
nitpicks below.
[...]
> + sound {
[...]
> + };
> +
> + vcc_12v_dcin: regulator-vcc-12v-dcin {
nodes without addresses should get sorted by nodename
aka regulator-* before sound.
Phandles count into the sorting only below in the
&phandle {}; parts
> + compatible = "regulator-fixed";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + regulator-name = "vcc_12v_dcin";
blank lines between properties and subnodes please.
same for other regulators below and also the pmic.
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> +&fspi1m1_pins {
> + rockchip,pins =
> + /* clk, d0~4 */
comment could state a tiny bit more what is changed compared to
the "original" pin settings
> + <1 RK_PD5 3 &pcfg_pull_none>,
> + <1 RK_PC4 3 &pcfg_pull_none>,
> + <1 RK_PC5 3 &pcfg_pull_none>,
> + <1 RK_PC6 3 &pcfg_pull_none>,
> + <1 RK_PC7 3 &pcfg_pull_none>;
> +};
> +&saradc {
> + status = "okay";
> + vref-supply = <&vcca_1v8_s0>;
status is the last property
> +};
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
@ 2025-06-20 9:12 ` Heiko Stuebner
0 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2025-06-20 9:12 UTC (permalink / raw)
To: John Clark
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, John Clark
Hi,
Am Montag, 16. Juni 2025, 23:22:14 Mitteleuropäische Sommerzeit schrieb John Clark:
> Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
> (4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
> basic booting and connectivity.
>
> Supported features:
> - RK3576 SoC
> - 4GB/8GB/16GB LPDDR4X/LPDDR5 RAM
> - 16MB SPI Nor Flash
> - 2x 1Gbps Ethernet
> - 2x USB 3.2 Gen 1 Type-A ports
> - microSD UHS-I
> - M.2 M-Key PCIe 2.1 x1 NVMe support
> - HDMI 1.4/2.0 (up to 4096x2304@60Hz)
> - 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO)
> - Debug UART
> - RTC with HYM8563TS
> - Power via USB-C (PD, 6V~20V)
>
> Signed-off-by: John Clark <inindev@gmail.com>
> ---
apart from the schema problems, Rob's bot found, I saw some additional
nitpicks below.
[...]
> + sound {
[...]
> + };
> +
> + vcc_12v_dcin: regulator-vcc-12v-dcin {
nodes without addresses should get sorted by nodename
aka regulator-* before sound.
Phandles count into the sorting only below in the
&phandle {}; parts
> + compatible = "regulator-fixed";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + regulator-name = "vcc_12v_dcin";
blank lines between properties and subnodes please.
same for other regulators below and also the pmic.
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> +&fspi1m1_pins {
> + rockchip,pins =
> + /* clk, d0~4 */
comment could state a tiny bit more what is changed compared to
the "original" pin settings
> + <1 RK_PD5 3 &pcfg_pull_none>,
> + <1 RK_PC4 3 &pcfg_pull_none>,
> + <1 RK_PC5 3 &pcfg_pull_none>,
> + <1 RK_PC6 3 &pcfg_pull_none>,
> + <1 RK_PC7 3 &pcfg_pull_none>;
> +};
> +&saradc {
> + status = "okay";
> + vref-supply = <&vcca_1v8_s0>;
status is the last property
> +};
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576
2025-06-16 21:22 ` John Clark
@ 2025-06-17 14:20 ` Rob Herring (Arm)
-1 siblings, 0 replies; 12+ messages in thread
From: Rob Herring (Arm) @ 2025-06-17 14:20 UTC (permalink / raw)
To: John Clark
Cc: linux-rockchip, heiko, conor+dt, krzk+dt, linux-arm-kernel,
linux-kernel, devicetree
On Mon, 16 Jun 2025 17:22:12 -0400, John Clark wrote:
> This series adds device tree support for the FriendlyElec NanoPi M5 board,
> powered by the Rockchip RK3576 SoC (4x Cortex-A72, 4x Cortex-A53, Mali-G52
> MC3 GPU, 6 TOPS NPU). The patches enable basic booting and connectivity,
> including dual 1Gbps Ethernet, USB 3.2, microSD, M.2 PCIe NVMe, and HDMI.
>
> Patch 1 updates the DT bindings in rockchip.yaml.
> Patch 2 adds the NanoPi M5 device tree and Makefile entry.
>
> No MAINTAINERS update is needed, as the new file is covered by the existing
> ARM/Rockchip SoC entry.
>
> Tested on NanoPi M5 with successful boot and feature validation.
>
> Signed-off-by: John Clark <inindev@gmail.com>
> ---
> John Clark (2):
> dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
> arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
>
> .../devicetree/bindings/arm/rockchip.yaml | 6 +
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3576-nanopi-m5.dts | 969 ++++++++++++++++++
> 3 files changed, 976 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
>
> --
> 2.39.5
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: attempting to guess base-commit...
Base: tags/v6.16-rc1-19-gd7ad90d22abe (exact match)
If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/rockchip/' for 20250616212214.139585-1-inindev@gmail.com:
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: spi-nor@0 (jedec,spi-nor): $nodename:0: 'spi-nor@0' does not match '^(flash|.*sram|nand)(@.*)?$'
from schema $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: pmic@23 (rockchip,rk806): Unevaluated properties are not allowed ('rk806_dvs1_null', 'rk806_dvs1_pwrdn', 'rk806_dvs1_rst', 'rk806_dvs1_slp', 'rk806_dvs2_dvs', 'rk806_dvs2_gpio', 'rk806_dvs2_null', 'rk806_dvs2_pwrdn', 'rk806_dvs2_rst', 'rk806_dvs2_slp', 'rk806_dvs3_dvs', 'rk806_dvs3_gpio', 'rk806_dvs3_null', 'rk806_dvs3_pwrdn', 'rk806_dvs3_rst', 'rk806_dvs3_slp' were unexpected)
from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk806.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: hym8563@51 (haoyu,hym8563): $nodename:0: 'hym8563@51' does not match '^rtc(@.*|-([0-9]|[1-9][0-9]+))?$'
from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: hym8563@51 (haoyu,hym8563): Unevaluated properties are not allowed ('clock-frequency' was unexpected)
from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: gpio-keys (gpio-keys): 'button@1' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576
@ 2025-06-17 14:20 ` Rob Herring (Arm)
0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring (Arm) @ 2025-06-17 14:20 UTC (permalink / raw)
To: John Clark
Cc: linux-rockchip, heiko, conor+dt, krzk+dt, linux-arm-kernel,
linux-kernel, devicetree
On Mon, 16 Jun 2025 17:22:12 -0400, John Clark wrote:
> This series adds device tree support for the FriendlyElec NanoPi M5 board,
> powered by the Rockchip RK3576 SoC (4x Cortex-A72, 4x Cortex-A53, Mali-G52
> MC3 GPU, 6 TOPS NPU). The patches enable basic booting and connectivity,
> including dual 1Gbps Ethernet, USB 3.2, microSD, M.2 PCIe NVMe, and HDMI.
>
> Patch 1 updates the DT bindings in rockchip.yaml.
> Patch 2 adds the NanoPi M5 device tree and Makefile entry.
>
> No MAINTAINERS update is needed, as the new file is covered by the existing
> ARM/Rockchip SoC entry.
>
> Tested on NanoPi M5 with successful boot and feature validation.
>
> Signed-off-by: John Clark <inindev@gmail.com>
> ---
> John Clark (2):
> dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
> arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
>
> .../devicetree/bindings/arm/rockchip.yaml | 6 +
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3576-nanopi-m5.dts | 969 ++++++++++++++++++
> 3 files changed, 976 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
>
> --
> 2.39.5
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: attempting to guess base-commit...
Base: tags/v6.16-rc1-19-gd7ad90d22abe (exact match)
If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/rockchip/' for 20250616212214.139585-1-inindev@gmail.com:
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: spi-nor@0 (jedec,spi-nor): $nodename:0: 'spi-nor@0' does not match '^(flash|.*sram|nand)(@.*)?$'
from schema $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: pmic@23 (rockchip,rk806): Unevaluated properties are not allowed ('rk806_dvs1_null', 'rk806_dvs1_pwrdn', 'rk806_dvs1_rst', 'rk806_dvs1_slp', 'rk806_dvs2_dvs', 'rk806_dvs2_gpio', 'rk806_dvs2_null', 'rk806_dvs2_pwrdn', 'rk806_dvs2_rst', 'rk806_dvs2_slp', 'rk806_dvs3_dvs', 'rk806_dvs3_gpio', 'rk806_dvs3_null', 'rk806_dvs3_pwrdn', 'rk806_dvs3_rst', 'rk806_dvs3_slp' were unexpected)
from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk806.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: hym8563@51 (haoyu,hym8563): $nodename:0: 'hym8563@51' does not match '^rtc(@.*|-([0-9]|[1-9][0-9]+))?$'
from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: hym8563@51 (haoyu,hym8563): Unevaluated properties are not allowed ('clock-frequency' was unexpected)
from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: gpio-keys (gpio-keys): 'button@1' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
@ 2025-06-17 17:21 kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2025-06-17 17:21 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250616212214.139585-3-inindev@gmail.com>
References: <20250616212214.139585-3-inindev@gmail.com>
TO: John Clark <inindev@gmail.com>
TO: heiko@sntech.de
CC: robh@kernel.org
CC: krzk+dt@kernel.org
CC: conor+dt@kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-rockchip@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: John Clark <inindev@gmail.com>
Hi John,
kernel test robot noticed the following build warnings:
[auto build test WARNING on rockchip/for-next]
[also build test WARNING on next-20250617]
[cannot apply to robh/for-next arm64/for-next/core clk/clk-next kvmarm/next shawnguo/for-next soc/for-next linus/master v6.16-rc2]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/John-Clark/dt-bindings-arm-rockchip-add-FriendlyElec-NanoPi-M5-board/20250617-052437
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
patch link: https://lore.kernel.org/r/20250616212214.139585-3-inindev%40gmail.com
patch subject: [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
:::::: branch date: 20 hours ago
:::::: commit date: 20 hours ago
config: arm64-randconfig-001-20250617 (https://download.01.org/0day-ci/archive/20250618/202506180130.7BmHQuxC-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 11.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250618/202506180130.7BmHQuxC-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202506180130.7BmHQuxC-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
>> arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts:36.12-42.5: Warning (unit_address_vs_reg): /gpio-keys/button@1: node has a unit name, but no reg or ranges property
vim +36 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
46aa99340101af John Clark 2025-06-16 17
46aa99340101af John Clark 2025-06-16 18 / {
46aa99340101af John Clark 2025-06-16 19 model = "FriendlyElec NanoPi M5";
46aa99340101af John Clark 2025-06-16 20 compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";
46aa99340101af John Clark 2025-06-16 21
46aa99340101af John Clark 2025-06-16 22 aliases {
46aa99340101af John Clark 2025-06-16 23 ethernet0 = &gmac0;
46aa99340101af John Clark 2025-06-16 24 ethernet1 = &gmac1;
46aa99340101af John Clark 2025-06-16 25 };
46aa99340101af John Clark 2025-06-16 26
46aa99340101af John Clark 2025-06-16 27 chosen {
46aa99340101af John Clark 2025-06-16 28 stdout-path = "serial0:1500000n8";
46aa99340101af John Clark 2025-06-16 29 };
46aa99340101af John Clark 2025-06-16 30
46aa99340101af John Clark 2025-06-16 31 gpio_keys: gpio-keys {
46aa99340101af John Clark 2025-06-16 32 compatible = "gpio-keys";
46aa99340101af John Clark 2025-06-16 33 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 34 pinctrl-0 = <&key1_pin>;
46aa99340101af John Clark 2025-06-16 35
46aa99340101af John Clark 2025-06-16 @36 button@1 {
46aa99340101af John Clark 2025-06-16 37 debounce-interval = <50>;
46aa99340101af John Clark 2025-06-16 38 gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
46aa99340101af John Clark 2025-06-16 39 label = "K1";
46aa99340101af John Clark 2025-06-16 40 linux,code = <BTN_1>;
46aa99340101af John Clark 2025-06-16 41 wakeup-source;
46aa99340101af John Clark 2025-06-16 42 };
46aa99340101af John Clark 2025-06-16 43 };
46aa99340101af John Clark 2025-06-16 44
46aa99340101af John Clark 2025-06-16 45 gpio_leds: gpio-leds {
46aa99340101af John Clark 2025-06-16 46 compatible = "gpio-leds";
46aa99340101af John Clark 2025-06-16 47
46aa99340101af John Clark 2025-06-16 48 sys_led: led-0 {
46aa99340101af John Clark 2025-06-16 49 gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 50 label = "sys_led";
46aa99340101af John Clark 2025-06-16 51 linux,default-trigger = "heartbeat";
46aa99340101af John Clark 2025-06-16 52 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 53 pinctrl-0 = <&sys_led_pin>;
46aa99340101af John Clark 2025-06-16 54 };
46aa99340101af John Clark 2025-06-16 55
46aa99340101af John Clark 2025-06-16 56 lan_led: led-1 {
46aa99340101af John Clark 2025-06-16 57 gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 58 label = "lan_led";
46aa99340101af John Clark 2025-06-16 59 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 60 pinctrl-0 = <&lan_led_pin>;
46aa99340101af John Clark 2025-06-16 61 };
46aa99340101af John Clark 2025-06-16 62
46aa99340101af John Clark 2025-06-16 63 wan_led: led-2 {
46aa99340101af John Clark 2025-06-16 64 gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 65 label = "wan_led";
46aa99340101af John Clark 2025-06-16 66 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 67 pinctrl-0 = <&wan_led_pin>;
46aa99340101af John Clark 2025-06-16 68 };
46aa99340101af John Clark 2025-06-16 69 };
46aa99340101af John Clark 2025-06-16 70
46aa99340101af John Clark 2025-06-16 71 hdmi-con {
46aa99340101af John Clark 2025-06-16 72 compatible = "hdmi-connector";
46aa99340101af John Clark 2025-06-16 73 hdmi-pwr-supply = <&vcc_5v0_hdmi>;
46aa99340101af John Clark 2025-06-16 74 type = "a";
46aa99340101af John Clark 2025-06-16 75
46aa99340101af John Clark 2025-06-16 76 port {
46aa99340101af John Clark 2025-06-16 77 hdmi_con_in: endpoint {
46aa99340101af John Clark 2025-06-16 78 remote-endpoint = <&hdmi_out_con>;
46aa99340101af John Clark 2025-06-16 79 };
46aa99340101af John Clark 2025-06-16 80 };
46aa99340101af John Clark 2025-06-16 81 };
46aa99340101af John Clark 2025-06-16 82
46aa99340101af John Clark 2025-06-16 83 sound {
46aa99340101af John Clark 2025-06-16 84 compatible = "simple-audio-card";
46aa99340101af John Clark 2025-06-16 85 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 86 pinctrl-0 = <&hp_det>;
46aa99340101af John Clark 2025-06-16 87
46aa99340101af John Clark 2025-06-16 88 simple-audio-card,format = "i2s";
46aa99340101af John Clark 2025-06-16 89 simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
46aa99340101af John Clark 2025-06-16 90 simple-audio-card,mclk-fs = <256>;
46aa99340101af John Clark 2025-06-16 91 simple-audio-card,name = "realtek,rt5616-codec";
46aa99340101af John Clark 2025-06-16 92
46aa99340101af John Clark 2025-06-16 93 simple-audio-card,routing =
46aa99340101af John Clark 2025-06-16 94 "Headphones", "HPOL",
46aa99340101af John Clark 2025-06-16 95 "Headphones", "HPOR",
46aa99340101af John Clark 2025-06-16 96 "IN1P", "Microphone Jack";
46aa99340101af John Clark 2025-06-16 97 simple-audio-card,widgets =
46aa99340101af John Clark 2025-06-16 98 "Headphone", "Headphone Jack",
46aa99340101af John Clark 2025-06-16 99 "Microphone", "Microphone Jack";
46aa99340101af John Clark 2025-06-16 100
46aa99340101af John Clark 2025-06-16 101 simple-audio-card,codec {
46aa99340101af John Clark 2025-06-16 102 sound-dai = <&rt5616>;
46aa99340101af John Clark 2025-06-16 103 };
46aa99340101af John Clark 2025-06-16 104
46aa99340101af John Clark 2025-06-16 105 simple-audio-card,cpu {
46aa99340101af John Clark 2025-06-16 106 sound-dai = <&sai2>;
46aa99340101af John Clark 2025-06-16 107 };
46aa99340101af John Clark 2025-06-16 108 };
46aa99340101af John Clark 2025-06-16 109
46aa99340101af John Clark 2025-06-16 110 vcc_12v_dcin: regulator-vcc-12v-dcin {
46aa99340101af John Clark 2025-06-16 111 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 112 regulator-always-on;
46aa99340101af John Clark 2025-06-16 113 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 114 regulator-min-microvolt = <12000000>;
46aa99340101af John Clark 2025-06-16 115 regulator-max-microvolt = <12000000>;
46aa99340101af John Clark 2025-06-16 116 regulator-name = "vcc_12v_dcin";
46aa99340101af John Clark 2025-06-16 117 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 118 regulator-on-in-suspend;
46aa99340101af John Clark 2025-06-16 119 };
46aa99340101af John Clark 2025-06-16 120 };
46aa99340101af John Clark 2025-06-16 121
46aa99340101af John Clark 2025-06-16 122 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
46aa99340101af John Clark 2025-06-16 123 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 124 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 125 regulator-always-on;
46aa99340101af John Clark 2025-06-16 126 regulator-min-microvolt = <1100000>;
46aa99340101af John Clark 2025-06-16 127 regulator-max-microvolt = <1100000>;
46aa99340101af John Clark 2025-06-16 128 regulator-name = "vcc_1v1_nldo_s3";
46aa99340101af John Clark 2025-06-16 129 vin-supply = <&vcc_5v0_sys>;
46aa99340101af John Clark 2025-06-16 130 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 131 regulator-off-in-suspend;
46aa99340101af John Clark 2025-06-16 132 };
46aa99340101af John Clark 2025-06-16 133 };
46aa99340101af John Clark 2025-06-16 134
46aa99340101af John Clark 2025-06-16 135 vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
46aa99340101af John Clark 2025-06-16 136 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 137 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 138 regulator-always-on;
46aa99340101af John Clark 2025-06-16 139 regulator-min-microvolt = <2000000>;
46aa99340101af John Clark 2025-06-16 140 regulator-max-microvolt = <2000000>;
46aa99340101af John Clark 2025-06-16 141 regulator-name = "vcc_2v0_pldo_s3";
46aa99340101af John Clark 2025-06-16 142 vin-supply = <&vcc_5v0_sys>;
46aa99340101af John Clark 2025-06-16 143 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 144 regulator-off-in-suspend;
46aa99340101af John Clark 2025-06-16 145 };
46aa99340101af John Clark 2025-06-16 146 };
46aa99340101af John Clark 2025-06-16 147
46aa99340101af John Clark 2025-06-16 148 vcc_3v3_m2_keym: regulator-vcc-3v3-m2_keym {
46aa99340101af John Clark 2025-06-16 149 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 150 enable-active-high;
46aa99340101af John Clark 2025-06-16 151 gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 152 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 153 pinctrl-0 = <&pcie_m2_pwren>;
46aa99340101af John Clark 2025-06-16 154 regulator-min-microvolt = <3300000>;
46aa99340101af John Clark 2025-06-16 155 regulator-max-microvolt = <3300000>;
46aa99340101af John Clark 2025-06-16 156 regulator-name = "vcc_3v3_m2_keym";
46aa99340101af John Clark 2025-06-16 157 vin-supply = <&vcc_5v0_sys>;
46aa99340101af John Clark 2025-06-16 158 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 159 regulator-off-in-suspend;
46aa99340101af John Clark 2025-06-16 160 };
46aa99340101af John Clark 2025-06-16 161 };
46aa99340101af John Clark 2025-06-16 162
46aa99340101af John Clark 2025-06-16 163 vcc_3v3_s0: regulator-vcc-3v3-s0 {
46aa99340101af John Clark 2025-06-16 164 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 165 regulator-always-on;
46aa99340101af John Clark 2025-06-16 166 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 167 regulator-min-microvolt = <3300000>;
46aa99340101af John Clark 2025-06-16 168 regulator-max-microvolt = <3300000>;
46aa99340101af John Clark 2025-06-16 169 regulator-name = "vcc_3v3_s0";
46aa99340101af John Clark 2025-06-16 170 vin-supply = <&vcc_3v3_s3>;
46aa99340101af John Clark 2025-06-16 171 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 172 regulator-on-in-suspend;
46aa99340101af John Clark 2025-06-16 173 };
46aa99340101af John Clark 2025-06-16 174 };
46aa99340101af John Clark 2025-06-16 175
46aa99340101af John Clark 2025-06-16 176 vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
46aa99340101af John Clark 2025-06-16 177 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 178 enable-active-high;
46aa99340101af John Clark 2025-06-16 179 gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 180 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 181 pinctrl-0 = <&sd_s0_pwren>;
46aa99340101af John Clark 2025-06-16 182 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 183 regulator-min-microvolt = <3000000>;
46aa99340101af John Clark 2025-06-16 184 regulator-max-microvolt = <3000000>;
46aa99340101af John Clark 2025-06-16 185 regulator-name = "vcc_3v3_sd_s0";
46aa99340101af John Clark 2025-06-16 186 vin-supply = <&vcc_3v3_s3>;
46aa99340101af John Clark 2025-06-16 187 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 188 regulator-on-in-suspend;
46aa99340101af John Clark 2025-06-16 189 };
46aa99340101af John Clark 2025-06-16 190 };
46aa99340101af John Clark 2025-06-16 191
46aa99340101af John Clark 2025-06-16 192 vcc_5v0_device: regulator-vcc-5v0-device {
46aa99340101af John Clark 2025-06-16 193 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 194 regulator-always-on;
46aa99340101af John Clark 2025-06-16 195 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 196 regulator-min-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 197 regulator-max-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 198 regulator-name = "vcc_5v0_device";
46aa99340101af John Clark 2025-06-16 199 vin-supply = <&vcc_12v_dcin>;
46aa99340101af John Clark 2025-06-16 200 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 201 regulator-on-in-suspend;
46aa99340101af John Clark 2025-06-16 202 };
46aa99340101af John Clark 2025-06-16 203 };
46aa99340101af John Clark 2025-06-16 204
46aa99340101af John Clark 2025-06-16 205 vcc_5v0_hdmi: regulator-vcc-5v0-hdmi {
46aa99340101af John Clark 2025-06-16 206 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 207 enable-active-high;
46aa99340101af John Clark 2025-06-16 208 gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 209 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 210 pinctrl-0 = <&hdmi_con_en>;
46aa99340101af John Clark 2025-06-16 211 regulator-min-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 212 regulator-max-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 213 regulator-name = "vcc_5v0_hdmi";
46aa99340101af John Clark 2025-06-16 214 vin-supply = <&vcc_5v0_sys>;
46aa99340101af John Clark 2025-06-16 215 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 216 regulator-off-in-suspend;
46aa99340101af John Clark 2025-06-16 217 };
46aa99340101af John Clark 2025-06-16 218 };
46aa99340101af John Clark 2025-06-16 219
46aa99340101af John Clark 2025-06-16 220 vcc_5v0_host: regulator-vcc-5v0-host {
46aa99340101af John Clark 2025-06-16 221 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 222 enable-active-high;
46aa99340101af John Clark 2025-06-16 223 gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 224 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 225 pinctrl-0 = <&usb_host_pwren>;
46aa99340101af John Clark 2025-06-16 226 regulator-min-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 227 regulator-max-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 228 regulator-name = "vcc_5v0_host";
46aa99340101af John Clark 2025-06-16 229 vin-supply = <&vcc_5v0_device>;
46aa99340101af John Clark 2025-06-16 230 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 231 regulator-off-in-suspend;
46aa99340101af John Clark 2025-06-16 232 };
46aa99340101af John Clark 2025-06-16 233 };
46aa99340101af John Clark 2025-06-16 234
46aa99340101af John Clark 2025-06-16 235 vcc_5v0_otg: regulator-vcc-5v0-otg {
46aa99340101af John Clark 2025-06-16 236 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 237 enable-active-high;
46aa99340101af John Clark 2025-06-16 238 gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
46aa99340101af John Clark 2025-06-16 239 pinctrl-names = "default";
46aa99340101af John Clark 2025-06-16 240 pinctrl-0 = <&usb_otg0_pwren>;
46aa99340101af John Clark 2025-06-16 241 regulator-min-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 242 regulator-max-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 243 regulator-name = "vcc_5v0_otg";
46aa99340101af John Clark 2025-06-16 244 vin-supply = <&vcc_5v0_device>;
46aa99340101af John Clark 2025-06-16 245 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 246 regulator-off-in-suspend;
46aa99340101af John Clark 2025-06-16 247 };
46aa99340101af John Clark 2025-06-16 248 };
46aa99340101af John Clark 2025-06-16 249
46aa99340101af John Clark 2025-06-16 250 vcc_5v0_sys: regulator-vcc-5v0-sys {
46aa99340101af John Clark 2025-06-16 251 compatible = "regulator-fixed";
46aa99340101af John Clark 2025-06-16 252 regulator-always-on;
46aa99340101af John Clark 2025-06-16 253 regulator-boot-on;
46aa99340101af John Clark 2025-06-16 254 regulator-min-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 255 regulator-max-microvolt = <5000000>;
46aa99340101af John Clark 2025-06-16 256 regulator-name = "vcc_5v0_sys";
46aa99340101af John Clark 2025-06-16 257 vin-supply = <&vcc_12v_dcin>;
46aa99340101af John Clark 2025-06-16 258 regulator-state-mem {
46aa99340101af John Clark 2025-06-16 259 regulator-on-in-suspend;
46aa99340101af John Clark 2025-06-16 260 };
46aa99340101af John Clark 2025-06-16 261 };
46aa99340101af John Clark 2025-06-16 262 };
46aa99340101af John Clark 2025-06-16 263
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
@ 2025-06-17 19:17 kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2025-06-17 19:17 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250616212214.139585-3-inindev@gmail.com>
References: <20250616212214.139585-3-inindev@gmail.com>
TO: John Clark <inindev@gmail.com>
TO: heiko@sntech.de
CC: robh@kernel.org
CC: krzk+dt@kernel.org
CC: conor+dt@kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-rockchip@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: John Clark <inindev@gmail.com>
Hi John,
kernel test robot noticed the following build warnings:
[auto build test WARNING on rockchip/for-next]
[also build test WARNING on next-20250617]
[cannot apply to robh/for-next arm64/for-next/core clk/clk-next kvmarm/next shawnguo/for-next soc/for-next linus/master v6.16-rc2]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/John-Clark/dt-bindings-arm-rockchip-add-FriendlyElec-NanoPi-M5-board/20250617-052437
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
patch link: https://lore.kernel.org/r/20250616212214.139585-3-inindev%40gmail.com
patch subject: [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
:::::: branch date: 22 hours ago
:::::: commit date: 22 hours ago
config: arm64-randconfig-052-20250617 (https://download.01.org/0day-ci/archive/20250618/202506180214.neATvNOV-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 8.5.0
dtschema version: 2025.3.dev28+g49451a5
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250618/202506180214.neATvNOV-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202506180214.neATvNOV-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts:36.12-42.5: Warning (unit_address_vs_reg): /gpio-keys/button@1: node has a unit name, but no reg or ranges property
>> arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: spi-nor@0 (jedec,spi-nor): $nodename:0: 'spi-nor@0' does not match '^(flash|.*sram|nand)(@.*)?$'
from schema $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
>> arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: pmic@23 (rockchip,rk806): Unevaluated properties are not allowed ('rk806_dvs1_null', 'rk806_dvs1_pwrdn', 'rk806_dvs1_rst', 'rk806_dvs1_slp', 'rk806_dvs2_dvs', 'rk806_dvs2_gpio', 'rk806_dvs2_null', 'rk806_dvs2_pwrdn', 'rk806_dvs2_rst', 'rk806_dvs2_slp', 'rk806_dvs3_dvs', 'rk806_dvs3_gpio', 'rk806_dvs3_null', 'rk806_dvs3_pwrdn', 'rk806_dvs3_rst', 'rk806_dvs3_slp' were unexpected)
from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk806.yaml#
>> arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: hym8563@51 (haoyu,hym8563): $nodename:0: 'hym8563@51' does not match '^rtc(@.*|-([0-9]|[1-9][0-9]+))?$'
from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#
>> arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: hym8563@51 (haoyu,hym8563): Unevaluated properties are not allowed ('clock-frequency' was unexpected)
from schema $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#
>> arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dtb: gpio-keys (gpio-keys): 'button@1' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$', '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2025-06-20 10:22 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-16 21:22 [PATCH v1 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576 John Clark
2025-06-16 21:22 ` John Clark
2025-06-16 21:22 ` [PATCH v1 1/2] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board John Clark
2025-06-16 21:22 ` John Clark
2025-06-16 21:22 ` [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support John Clark
2025-06-16 21:22 ` John Clark
2025-06-20 9:12 ` Heiko Stuebner
2025-06-20 9:12 ` Heiko Stuebner
2025-06-17 14:20 ` [PATCH v1 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576 Rob Herring (Arm)
2025-06-17 14:20 ` Rob Herring (Arm)
-- strict thread matches above, loose matches on Subject: below --
2025-06-17 17:21 [PATCH v1 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support kernel test robot
2025-06-17 19:17 kernel test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.