From: "Rémi Denis-Courmont" <remi@remlab.net>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: andy.chiu@sifive.com, Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH -next v20 20/26] riscv: Add prctl controls for userspace vector management
Date: Wed, 24 May 2023 19:13:10 +0300 [thread overview]
Message-ID: <2621691.14T4csFsIl@basile.remlab.net> (raw)
In-Reply-To: <mhng-52f8af07-f3fc-4674-94ea-abbe2108907a@palmer-ri-x1c9a>
Le keskiviikkona 24. toukokuuta 2023, 3.18.26 EEST Palmer Dabbelt a écrit :
> > I don't think the value of an auxillary vector entry can change in an
> > existing process nor that we need that. If an application starts with V
> > disabled, you can keep the V bit clear even if V gets enabled later on;
> > that won't break existing userspace code, which simply won't use vectors.
> >
> > What does break existing userspace is setting the V bit whilst vectors are
> > disabled.
> So maybe the right answer is to just not set V at all?
That is one possibility that I can live, although it feels unnecessarily user-
hostile compared to setting it only if the process _started_ with V enabled.
> The
> single-letter extensions are sort of defunct now, there's multi-letter
> sub extensions for most things, but V got ratified with those
> sub-extensions so we could just call it extra-ambiguous?
Maybe; I must admit I have zero visibility to RVI inner workings. At least C,
D and F bits could work for JIT use cases, I suppose. E and M are totally
impractical to support. G, I, X and Z cannot are already wasted by the design,
and I guess we will now waste all 16 others.
But as for V, what is the user-space story for the prctl()? Who is intended to
enablet V mode? If there is no clear story, it is all but guaranteed that
random libraries will call it, and just _blindly_ assume that there is enough
stack space for signal handling. If so, then there is not much point having a
prctl() in the first place; might as well stick to just a kernel Kconfig with no
runtime configuration.
--
Rémi Denis-Courmont
http://www.remlab.net/
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WARNING: multiple messages have this Message-ID (diff)
From: "Rémi Denis-Courmont" <remi@remlab.net>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: andy.chiu@sifive.com, Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH -next v20 20/26] riscv: Add prctl controls for userspace vector management
Date: Wed, 24 May 2023 19:13:10 +0300 [thread overview]
Message-ID: <2621691.14T4csFsIl@basile.remlab.net> (raw)
In-Reply-To: <mhng-52f8af07-f3fc-4674-94ea-abbe2108907a@palmer-ri-x1c9a>
Le keskiviikkona 24. toukokuuta 2023, 3.18.26 EEST Palmer Dabbelt a écrit :
> > I don't think the value of an auxillary vector entry can change in an
> > existing process nor that we need that. If an application starts with V
> > disabled, you can keep the V bit clear even if V gets enabled later on;
> > that won't break existing userspace code, which simply won't use vectors.
> >
> > What does break existing userspace is setting the V bit whilst vectors are
> > disabled.
> So maybe the right answer is to just not set V at all?
That is one possibility that I can live, although it feels unnecessarily user-
hostile compared to setting it only if the process _started_ with V enabled.
> The
> single-letter extensions are sort of defunct now, there's multi-letter
> sub extensions for most things, but V got ratified with those
> sub-extensions so we could just call it extra-ambiguous?
Maybe; I must admit I have zero visibility to RVI inner workings. At least C,
D and F bits could work for JIT use cases, I suppose. E and M are totally
impractical to support. G, I, X and Z cannot are already wasted by the design,
and I guess we will now waste all 16 others.
But as for V, what is the user-space story for the prctl()? Who is intended to
enablet V mode? If there is no clear story, it is all but guaranteed that
random libraries will call it, and just _blindly_ assume that there is enough
stack space for signal handling. If so, then there is not much point having a
prctl() in the first place; might as well stick to just a kernel Kconfig with no
runtime configuration.
--
Rémi Denis-Courmont
http://www.remlab.net/
next prev parent reply other threads:[~2023-05-24 16:13 UTC|newest]
Thread overview: 166+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 16:19 [PATCH -next v20 00/26] riscv: Add vector ISA support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 01/26] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 02/26] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 03/26] riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_KEY_IMA_EXT_0 Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 17:28 ` Conor Dooley
2023-05-18 17:28 ` Conor Dooley
2023-05-18 17:28 ` Conor Dooley
2023-05-19 16:50 ` Evan Green
2023-05-19 16:50 ` Evan Green
2023-05-19 16:50 ` Evan Green
2023-05-24 0:48 ` Palmer Dabbelt
2023-05-24 0:48 ` Palmer Dabbelt
2023-05-24 0:48 ` Palmer Dabbelt
2023-06-01 4:46 ` Guo Ren
2023-06-01 4:46 ` Guo Ren
2023-06-01 4:46 ` Guo Ren
2023-05-18 16:19 ` [PATCH -next v20 04/26] riscv: Add new csr defines related to vector extension Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 05/26] riscv: Clear vector regfile on bootup Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 06/26] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 07/26] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 08/26] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 09/26] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-18 16:19 ` [PATCH -next v20 10/26] riscv: Add task switch support for vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-30 10:11 ` Andy Chiu
2023-05-30 10:11 ` Andy Chiu
2023-05-30 10:11 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 11/26] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 17:47 ` Conor Dooley
2023-05-18 17:47 ` Conor Dooley
2023-05-18 17:47 ` Conor Dooley
2023-05-22 9:40 ` Andy Chiu
2023-05-22 9:40 ` Andy Chiu
2023-05-22 9:40 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 14:21 ` Darius Rad
2023-05-24 14:21 ` Darius Rad
2023-05-24 14:21 ` Darius Rad
2023-05-30 16:51 ` Guo Ren
2023-05-30 16:51 ` Guo Ren
2023-05-30 16:51 ` Guo Ren
2023-05-18 16:19 ` [PATCH -next v20 12/26] riscv: Add ptrace vector support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 0:49 ` Palmer Dabbelt
2023-05-24 6:32 ` Arnd Bergmann
2023-05-24 6:32 ` Arnd Bergmann
2023-05-24 6:32 ` Arnd Bergmann
2023-05-24 7:50 ` Andreas Schwab
2023-05-24 7:50 ` Andreas Schwab
2023-05-24 7:50 ` Andreas Schwab
2023-05-18 16:19 ` [PATCH -next v20 13/26] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 14/26] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 15/26] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 16/26] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 17/26] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 18/26] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 19/26] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 20/26] riscv: Add prctl controls for userspace vector management Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-20 14:11 ` kernel test robot
2023-05-20 14:11 ` kernel test robot
2023-05-20 14:11 ` kernel test robot
2023-05-21 1:50 ` kernel test robot
2023-05-21 1:50 ` kernel test robot
2023-05-21 1:50 ` kernel test robot
2023-05-22 4:12 ` Andy Chiu
2023-05-22 4:12 ` Andy Chiu
2023-05-21 5:38 ` Rémi Denis-Courmont
2023-05-21 5:38 ` Rémi Denis-Courmont
2023-05-22 8:28 ` Andy Chiu
2023-05-22 8:28 ` Andy Chiu
2023-05-22 9:58 ` Rémi Denis-Courmont
2023-05-24 0:18 ` Palmer Dabbelt
2023-05-24 0:18 ` Palmer Dabbelt
2023-05-24 9:25 ` Andy Chiu
2023-05-24 9:25 ` Andy Chiu
2023-05-24 16:16 ` Rémi Denis-Courmont
2023-05-24 16:16 ` Rémi Denis-Courmont
2023-05-30 14:14 ` Andy Chiu
2023-05-30 14:14 ` Andy Chiu
2023-05-24 16:13 ` Rémi Denis-Courmont [this message]
2023-05-24 16:13 ` Rémi Denis-Courmont
2023-05-23 13:56 ` Björn Töpel
2023-05-23 13:56 ` Björn Töpel
2023-05-23 13:56 ` Björn Töpel
2023-05-18 16:19 ` [PATCH -next v20 21/26] riscv: Add sysctl to set the default vector rule for new processes Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-23 13:45 ` Björn Töpel
2023-05-23 13:45 ` Björn Töpel
2023-05-23 13:45 ` Björn Töpel
2023-05-18 16:19 ` [PATCH -next v20 22/26] riscv: detect assembler support for .option arch Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 23/26] riscv: Enable Vector code to be built Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 17:31 ` Conor Dooley
2023-05-18 17:31 ` Conor Dooley
2023-05-18 17:31 ` Conor Dooley
2023-05-24 0:22 ` Palmer Dabbelt
2023-05-24 0:22 ` Palmer Dabbelt
2023-05-24 0:22 ` Palmer Dabbelt
2023-05-18 16:19 ` [PATCH -next v20 24/26] riscv: Add documentation for Vector Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-19 8:09 ` Bagas Sanjaya
2023-05-19 8:09 ` Bagas Sanjaya
2023-05-19 8:09 ` Bagas Sanjaya
2023-05-21 5:20 ` Rémi Denis-Courmont
2023-05-21 5:20 ` Rémi Denis-Courmont
2023-05-18 16:19 ` [PATCH -next v20 25/26] selftests: Test RISC-V Vector prctl interface Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` [PATCH -next v20 26/26] selftests: add .gitignore file for RISC-V hwprobe Andy Chiu
2023-05-18 16:19 ` Andy Chiu
2023-05-18 16:19 ` Andy Chiu
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