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From: Alistair Popple <alistair@popple.id.au>
To: linuxppc-dev@lists.ozlabs.org
Cc: Jordan Niethe <jniethe5@gmail.com>,
	mikey@neuling.org, Nicholas Piggin <npiggin@gmail.com>,
	aneesh.kumar@linux.ibm.com
Subject: Re: [PATCH v2 2/7] powerpc: Add support for ISA v3.1
Date: Tue, 19 May 2020 15:45:34 +1000	[thread overview]
Message-ID: <2708597.ukFscvRmPa@townsend> (raw)
In-Reply-To: <CACzsE9pF6Q01eMtzM1esnGC1k=BWZuq8gPMRZC4uaHNoQ=VdzA@mail.gmail.com>

On Tuesday, 19 May 2020 2:04:51 PM AEST Jordan Niethe wrote:
> On Tue, May 19, 2020 at 10:39 AM Alistair Popple <alistair@popple.id.au> 
wrote:
> > Newer ISA versions are enabled by clearing all bits in the PCR
> > associated with previous versions of the ISA. Enable ISA v3.1 support
> > by updating the PCR mask to include ISA v3.0. This ensures all PCR
> > bits corresponding to earlier architecture versions get cleared
> > thereby enabling ISA v3.1 if supported by the hardware.
> > 
> > Signed-off-by: Alistair Popple <alistair@popple.id.au>
> > ---
> > 
> >  arch/powerpc/include/asm/cputable.h | 1 +
> >  arch/powerpc/include/asm/reg.h      | 3 ++-
> >  arch/powerpc/kvm/book3s_hv.c        | 3 ---
> >  3 files changed, 3 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/powerpc/include/asm/cputable.h
> > b/arch/powerpc/include/asm/cputable.h index 40a4d3c6fd99..36f894dea9e7
> > 100644
> > --- a/arch/powerpc/include/asm/cputable.h
> > +++ b/arch/powerpc/include/asm/cputable.h
> > @@ -213,6 +213,7 @@ static inline void cpu_feature_keys_init(void) { }
> > 
> >  #define CPU_FTR_P9_TIDR                       
> >  LONG_ASM_CONST(0x0000800000000000) #define CPU_FTR_P9_TLBIE_ERAT_BUG    
> >   LONG_ASM_CONST(0x0001000000000000) #define
> >  CPU_FTR_P9_RADIX_PREFETCH_BUG  LONG_ASM_CONST(0x0002000000000000)> 
> > +#define CPU_FTR_ARCH_31                       
> > LONG_ASM_CONST(0x0004000000000000)> 
> >  #ifndef __ASSEMBLY__
> > 
> > diff --git a/arch/powerpc/include/asm/reg.h
> > b/arch/powerpc/include/asm/reg.h index 773f76402392..1931b1142599 100644
> > --- a/arch/powerpc/include/asm/reg.h
> > +++ b/arch/powerpc/include/asm/reg.h
> > @@ -485,10 +485,11 @@
> > 
> >   * determine both the compatibility level which we want to emulate and
> >   the
> >   * compatibility level which the host is capable of emulating.
> >   */
> > 
> > +#define   PCR_ARCH_300 0x10            /* Architecture 3.00 */
> > 
> >  #define   PCR_ARCH_207 0x8             /* Architecture 2.07 */
> >  #define   PCR_ARCH_206 0x4             /* Architecture 2.06 */
> >  #define   PCR_ARCH_205 0x2             /* Architecture 2.05 */
> > 
> > -#define   PCR_LOW_BITS (PCR_ARCH_207 | PCR_ARCH_206 | PCR_ARCH_205)
> > +#define   PCR_LOW_BITS (PCR_ARCH_207 | PCR_ARCH_206 | PCR_ARCH_205 |
> > PCR_ARCH_300)> 
> >  #define   PCR_MASK     ~(PCR_HIGH_BITS | PCR_LOW_BITS) /* PCR Reserved
> >  Bits */ #define        SPRN_HEIR       0x153   /* Hypervisor Emulated
> >  Instruction Register */ #define SPRN_TLBINDEXR 0x154   /* P7 TLB control
> >  register */
> > 
> > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> > index 93493f0cbfe8..532215040f3e 100644
> > --- a/arch/powerpc/kvm/book3s_hv.c
> > +++ b/arch/powerpc/kvm/book3s_hv.c
> > @@ -344,9 +344,6 @@ static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu,
> > u32 pvr)> 
> >         vcpu->arch.pvr = pvr;
> >  
> >  }
> > 
> > -/* Dummy value used in computing PCR value below */
> > -#define PCR_ARCH_300   (PCR_ARCH_207 << 1)
> > -
> 
> Later will we need
> +/* Dummy value used in computing PCR value below */
> +#define PCR_ARCH_310   (PCR_ARCH_300 << 1)
> ?

Correct. I left that out of this patch series though as I am putting together 
a separate series for basic P10 KVM enablement which will add the definition 
for ARCH 3.1.

- Alistair

> >  static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
> >  {
> >  
> >         unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
> > 
> > --
> > 2.20.1





  reply	other threads:[~2020-05-19  5:47 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-19  0:31 [PATCH v2 0/7] Base support for POWER10 Alistair Popple
2020-05-19  0:31 ` [PATCH v2 1/7] powerpc: Add new HWCAP bits Alistair Popple
2020-05-19  3:20   ` Michael Neuling
2020-05-19 17:48   ` Paul A. Clarke
2020-05-20  2:42   ` Michael Ellerman
2020-05-20  3:29     ` Alistair Popple
2020-05-19  0:31 ` [PATCH v2 2/7] powerpc: Add support for ISA v3.1 Alistair Popple
2020-05-19  4:04   ` Jordan Niethe
2020-05-19  5:45     ` Alistair Popple [this message]
2020-05-19  0:31 ` [PATCH v2 3/7] powerpc/dt_cpu_ftrs: Advertise support for ISA v3.1 if selected Alistair Popple
2020-05-19  0:31 ` [PATCH v2 4/7] powerpc/dt_cpu_ftrs: Set current thread fscr bits Alistair Popple
2020-05-19  0:31 ` [PATCH v2 5/7] powerpc/dt_cpu_ftrs: Enable Prefixed Instructions Alistair Popple
2020-05-19  0:31 ` [PATCH v2 6/7] powerpc/dt_cpu_ftrs: Add MMA feature Alistair Popple
2020-05-19 14:49   ` Paul A. Clarke
2020-05-19 15:05     ` Segher Boessenkool
2020-05-19 15:22       ` Paul A. Clarke
2020-05-19 15:28         ` Segher Boessenkool
2020-05-19 15:49           ` Paul A. Clarke
2020-05-19 17:51   ` Paul A. Clarke
2020-05-19 23:56     ` Alistair Popple
2020-05-19  0:31 ` [PATCH v2 7/7] powerpc: Add POWER10 architected mode Alistair Popple
2020-05-19  3:58   ` Jordan Niethe

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