From: Vasant Hegde <vasant.hegde@amd.com>
To: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, mst@redhat.com, mjt@tls.msk.ru,
marcel.apfelbaum@gmail.com, suravee.suthikulpanit@amd.com,
santosh.shukla@amd.com, sarunkod@amd.com, Wei.Huang2@amd.com,
joao.m.martins@oracle.com, boris.ostrovsky@oracle.com
Subject: Re: [PATCH 2/6] amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command
Date: Mon, 17 Mar 2025 18:10:36 +0530 [thread overview]
Message-ID: <272bc708-484d-4904-84e3-4c44b535eda1@amd.com> (raw)
In-Reply-To: <20250311152446.45086-3-alejandro.j.jimenez@oracle.com>
Alejandro,
On 3/11/2025 8:54 PM, Alejandro Jimenez wrote:
> The DeviceID bits are extracted using an incorrect offset in the call to
> amdvi_iotlb_remove_page(). This field is read (correctly) earlier, so use
> the value already retrieved for devid.
>
> Cc: qemu-stable@nongnu.org
> Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU")
> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
Fix looks good.
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
FYI. I think we need to reconsider IOTLB invalidation stuff. Its suppose to
invalidate the device side TLB, not IOMMU one. Before that we need to fix the
way we generate hash it. Ideally we should switch to domain ID and fix the size
as well. We are looking into this.
-Vasant
> ---
> hw/i386/amd_iommu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 5b21cf134a..068eeb0cae 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -508,7 +508,7 @@ static void amdvi_inval_inttable(AMDVIState *s, uint64_t *cmd)
> static void iommu_inval_iotlb(AMDVIState *s, uint64_t *cmd)
> {
>
> - uint16_t devid = extract64(cmd[0], 0, 16);
> + uint16_t devid = cpu_to_le16(extract64(cmd[0], 0, 16));
> if (extract64(cmd[1], 1, 1) || extract64(cmd[1], 3, 1) ||
> extract64(cmd[1], 6, 6)) {
> amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4),
> @@ -521,7 +521,7 @@ static void iommu_inval_iotlb(AMDVIState *s, uint64_t *cmd)
> &devid);
> } else {
> amdvi_iotlb_remove_page(s, cpu_to_le64(extract64(cmd[1], 12, 52)) << 12,
> - cpu_to_le16(extract64(cmd[1], 0, 16)));
> + devid);
> }
> trace_amdvi_iotlb_inval();
> }
next prev parent reply other threads:[~2025-03-17 12:41 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-11 15:24 [PATCH 0/6] amd_iommu: Fixes to align with AMDVi specification Alejandro Jimenez
2025-03-11 15:24 ` [PATCH 1/6] amd_iommu: Fix Miscellanous Information Register 0 offsets Alejandro Jimenez
2025-03-17 12:37 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 2/6] amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command Alejandro Jimenez
2025-03-17 12:40 ` Vasant Hegde [this message]
2025-03-11 15:24 ` [PATCH 3/6] amd_iommu: Update bitmasks representing DTE reserved fields Alejandro Jimenez
2025-03-12 4:12 ` Arun Kodilkar, Sairaj
2025-03-13 14:23 ` Alejandro Jimenez
2025-03-16 9:34 ` Arun Kodilkar, Sairaj
2025-03-17 12:36 ` Vasant Hegde
2025-03-17 12:34 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 4/6] amd_iommu: Fix masks for Device Table Address Register Alejandro Jimenez
2025-03-12 5:32 ` Arun Kodilkar, Sairaj
2025-03-17 15:07 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 5/6] amd_iommu: Fix the calculation for Device Table size Alejandro Jimenez
2025-03-17 13:00 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 6/6] amd_iommu: Do not assume passthrough translation for devices with DTE[TV]=0 Alejandro Jimenez
2025-03-19 6:06 ` Vasant Hegde
2025-03-19 14:10 ` Alejandro Jimenez
2025-03-20 5:11 ` Arun Kodilkar, Sairaj
2025-03-20 16:56 ` Alejandro Jimenez
2025-03-21 8:37 ` Arun Kodilkar, Sairaj
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