From: Vasant Hegde <vasant.hegde@amd.com>
To: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, mst@redhat.com, mjt@tls.msk.ru,
marcel.apfelbaum@gmail.com, suravee.suthikulpanit@amd.com,
santosh.shukla@amd.com, sarunkod@amd.com, Wei.Huang2@amd.com,
joao.m.martins@oracle.com, boris.ostrovsky@oracle.com
Subject: Re: [PATCH 5/6] amd_iommu: Fix the calculation for Device Table size
Date: Mon, 17 Mar 2025 18:30:40 +0530 [thread overview]
Message-ID: <35b2bae2-b3bd-44f0-ba5b-9afd95762d7c@amd.com> (raw)
In-Reply-To: <20250311152446.45086-6-alejandro.j.jimenez@oracle.com>
Alejandro,
On 3/11/2025 8:54 PM, Alejandro Jimenez wrote:
> Correctly calculate the Device Table size using the format encoded in the
> Device Table Base Address Register (MMIO Offset 0000h).
>
> Cc: qemu-stable@nongnu.org
> Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU")
I understand its a fix. But its not breaking anything. So not sure whether its
worth to backport.
> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
-Vasant
> ---
> hw/i386/amd_iommu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 8b97abe28c..cf00450ebe 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -665,8 +665,8 @@ static inline void amdvi_handle_devtab_write(AMDVIState *s)
> uint64_t val = amdvi_readq(s, AMDVI_MMIO_DEVICE_TABLE);
> s->devtab = (val & AMDVI_MMIO_DEVTAB_BASE_MASK);
>
> - /* set device table length */
> - s->devtab_len = ((val & AMDVI_MMIO_DEVTAB_SIZE_MASK) + 1 *
> + /* set device table length (i.e. number of entries table can hold) */
> + s->devtab_len = (((val & AMDVI_MMIO_DEVTAB_SIZE_MASK) + 1) *
> (AMDVI_MMIO_DEVTAB_SIZE_UNIT /
> AMDVI_MMIO_DEVTAB_ENTRY_SIZE));
> }
next prev parent reply other threads:[~2025-03-17 13:02 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-11 15:24 [PATCH 0/6] amd_iommu: Fixes to align with AMDVi specification Alejandro Jimenez
2025-03-11 15:24 ` [PATCH 1/6] amd_iommu: Fix Miscellanous Information Register 0 offsets Alejandro Jimenez
2025-03-17 12:37 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 2/6] amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command Alejandro Jimenez
2025-03-17 12:40 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 3/6] amd_iommu: Update bitmasks representing DTE reserved fields Alejandro Jimenez
2025-03-12 4:12 ` Arun Kodilkar, Sairaj
2025-03-13 14:23 ` Alejandro Jimenez
2025-03-16 9:34 ` Arun Kodilkar, Sairaj
2025-03-17 12:36 ` Vasant Hegde
2025-03-17 12:34 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 4/6] amd_iommu: Fix masks for Device Table Address Register Alejandro Jimenez
2025-03-12 5:32 ` Arun Kodilkar, Sairaj
2025-03-17 15:07 ` Vasant Hegde
2025-03-11 15:24 ` [PATCH 5/6] amd_iommu: Fix the calculation for Device Table size Alejandro Jimenez
2025-03-17 13:00 ` Vasant Hegde [this message]
2025-03-11 15:24 ` [PATCH 6/6] amd_iommu: Do not assume passthrough translation for devices with DTE[TV]=0 Alejandro Jimenez
2025-03-19 6:06 ` Vasant Hegde
2025-03-19 14:10 ` Alejandro Jimenez
2025-03-20 5:11 ` Arun Kodilkar, Sairaj
2025-03-20 16:56 ` Alejandro Jimenez
2025-03-21 8:37 ` Arun Kodilkar, Sairaj
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