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From: Krzysztof Kozlowski <krzk@kernel.org>
To: revy <gaohan@iscas.ac.cn>
Cc: Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Rob Herring <robh@kernel.org>,
	krzk+dt@kernel.org, conor+dt@kernel.org,
	Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>, Yixun Lan <dlan@gentoo.org>,
	Drew Fustini <fustini@kernel.org>,
	geert+renesas@glider.be, Guodong Xu <guodong@riscstar.com>,
	Haylen Chu <heylenay@4d2.org>, Joel Stanley <joel@jms.id.au>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, Han Gao <rabenda.cn@gmail.com>
Subject: Re: [PATCH 1/3] riscv: soc: re-organized allwinner menu
Date: Sat, 8 Nov 2025 15:47:16 +0100	[thread overview]
Message-ID: <287444fa-120c-42b4-9919-2f05ab1a2ab7@kernel.org> (raw)
In-Reply-To: <43109A90-8447-4006-8E29-2D2C0866758F@iscas.ac.cn>

On 08/11/2025 14:59, revy wrote:
> 
> 
> 
>> -----Original Messages-----
>> From: "Krzysztof Kozlowski" <krzk@kernel.org>
>> Sent Time: 2025-11-08 19:29:07 (Saturday)
>> To: gaohan@iscas.ac.cn, "Paul Walmsley" <pjw@kernel.org>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, "Alexandre Ghiti" <alex@ghiti.fr>, "Rob Herring" <robh@kernel.org>, "Krzysztof Kozlowski" <krzk+dt@kernel.org>, "Conor Dooley" <conor+dt@kernel.org>, "Chen-Yu Tsai" <wens@csie.org>, "Jernej Skrabec" <jernej.skrabec@gmail.com>, "Samuel Holland" <samuel@sholland.org>, "Yixun Lan" <dlan@gentoo.org>, "Drew Fustini" <fustini@kernel.org>, "Geert Uytterhoeven" <geert+renesas@glider.be>, "Guodong Xu" <guodong@riscstar.com>, "Haylen Chu" <heylenay@4d2.org>, "Joel Stanley" <joel@jms.id.au>
>> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, "Han Gao" <rabenda.cn@gmail.com>
>> Subject: Re: [PATCH 1/3] riscv: soc: re-organized allwinner menu
>>
>> On 08/11/2025 09:20, gaohan@iscas.ac.cn wrote:
>>> From: Han Gao <gaohan@iscas.ac.cn>
>>>
>>> Allwinner currently offers d1(s)/v821/v861/v881 on RISC-V,
>>> using different IPs.
>>>
>>> d1(s): Xuantie C906
>>> v821: Andes A27 + XuanTie E907
>>> v861/v881: XuanTie C907
>>>
>>> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
>>> ---
>>> arch/riscv/Kconfig.socs | 22 +++++++++++++++++-----
>>> 1 file changed, 17 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>> index 848e7149e443..7cba5d6ec4c3 100644
>>> --- a/arch/riscv/Kconfig.socs
>>> +++ b/arch/riscv/Kconfig.socs
>>> @@ -54,14 +54,26 @@ config SOC_STARFIVE
>>> 	help
>>> 	  This enables support for StarFive SoC platform hardware.
>>>
>>> -config ARCH_SUNXI
>>> -	bool "Allwinner sun20i SoCs"
>>> +menuconfig ARCH_SUNXI
>>> +	bool "Allwinner RISC-V SoCs"
>>> +
>>> +if ARCH_SUNXI
>>> +
>>> +config ARCH_SUNXI_XUANTIE
>>
>>
>> You should not get multiple ARCHs. ARCH is only one. There is also not
>> much rationale in commit msg for that.
> 
> The main goal is to avoid choosing multiple IP addresses for erreta. 
> If using Andes IPs, I don't want to choose XuanTIe (T-Head) ERRETA.

Not explained in commit msg but anyway not a good argument. It is some
sort of micro optimization and you completely miss the point we target
multiarch kernels.

Best regards,
Krzysztof


WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: revy <gaohan@iscas.ac.cn>
Cc: Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Rob Herring <robh@kernel.org>,
	krzk+dt@kernel.org, conor+dt@kernel.org,
	Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>, Yixun Lan <dlan@gentoo.org>,
	Drew Fustini <fustini@kernel.org>,
	geert+renesas@glider.be, Guodong Xu <guodong@riscstar.com>,
	Haylen Chu <heylenay@4d2.org>, Joel Stanley <joel@jms.id.au>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, Han Gao <rabenda.cn@gmail.com>
Subject: Re: [PATCH 1/3] riscv: soc: re-organized allwinner menu
Date: Sat, 8 Nov 2025 15:47:16 +0100	[thread overview]
Message-ID: <287444fa-120c-42b4-9919-2f05ab1a2ab7@kernel.org> (raw)
In-Reply-To: <43109A90-8447-4006-8E29-2D2C0866758F@iscas.ac.cn>

On 08/11/2025 14:59, revy wrote:
> 
> 
> 
>> -----Original Messages-----
>> From: "Krzysztof Kozlowski" <krzk@kernel.org>
>> Sent Time: 2025-11-08 19:29:07 (Saturday)
>> To: gaohan@iscas.ac.cn, "Paul Walmsley" <pjw@kernel.org>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, "Alexandre Ghiti" <alex@ghiti.fr>, "Rob Herring" <robh@kernel.org>, "Krzysztof Kozlowski" <krzk+dt@kernel.org>, "Conor Dooley" <conor+dt@kernel.org>, "Chen-Yu Tsai" <wens@csie.org>, "Jernej Skrabec" <jernej.skrabec@gmail.com>, "Samuel Holland" <samuel@sholland.org>, "Yixun Lan" <dlan@gentoo.org>, "Drew Fustini" <fustini@kernel.org>, "Geert Uytterhoeven" <geert+renesas@glider.be>, "Guodong Xu" <guodong@riscstar.com>, "Haylen Chu" <heylenay@4d2.org>, "Joel Stanley" <joel@jms.id.au>
>> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, "Han Gao" <rabenda.cn@gmail.com>
>> Subject: Re: [PATCH 1/3] riscv: soc: re-organized allwinner menu
>>
>> On 08/11/2025 09:20, gaohan@iscas.ac.cn wrote:
>>> From: Han Gao <gaohan@iscas.ac.cn>
>>>
>>> Allwinner currently offers d1(s)/v821/v861/v881 on RISC-V,
>>> using different IPs.
>>>
>>> d1(s): Xuantie C906
>>> v821: Andes A27 + XuanTie E907
>>> v861/v881: XuanTie C907
>>>
>>> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
>>> ---
>>> arch/riscv/Kconfig.socs | 22 +++++++++++++++++-----
>>> 1 file changed, 17 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>> index 848e7149e443..7cba5d6ec4c3 100644
>>> --- a/arch/riscv/Kconfig.socs
>>> +++ b/arch/riscv/Kconfig.socs
>>> @@ -54,14 +54,26 @@ config SOC_STARFIVE
>>> 	help
>>> 	  This enables support for StarFive SoC platform hardware.
>>>
>>> -config ARCH_SUNXI
>>> -	bool "Allwinner sun20i SoCs"
>>> +menuconfig ARCH_SUNXI
>>> +	bool "Allwinner RISC-V SoCs"
>>> +
>>> +if ARCH_SUNXI
>>> +
>>> +config ARCH_SUNXI_XUANTIE
>>
>>
>> You should not get multiple ARCHs. ARCH is only one. There is also not
>> much rationale in commit msg for that.
> 
> The main goal is to avoid choosing multiple IP addresses for erreta. 
> If using Andes IPs, I don't want to choose XuanTIe (T-Head) ERRETA.

Not explained in commit msg but anyway not a good argument. It is some
sort of micro optimization and you completely miss the point we target
multiarch kernels.

Best regards,
Krzysztof

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-11-08 14:47 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-08  8:20 [PATCH 0/3] riscv: soc: re-organized allwinner gaohan
2025-11-08  8:20 ` gaohan
2025-11-08  8:20 ` [PATCH 1/3] riscv: soc: re-organized allwinner menu gaohan
2025-11-08  8:20   ` gaohan
2025-11-08 11:29   ` Krzysztof Kozlowski
2025-11-08 11:29     ` Krzysztof Kozlowski
2025-11-08 13:59     ` revy
2025-11-08 13:59       ` revy
2025-11-08 14:47       ` Krzysztof Kozlowski [this message]
2025-11-08 14:47         ` Krzysztof Kozlowski
2025-11-08 14:48         ` Krzysztof Kozlowski
2025-11-08 14:48           ` Krzysztof Kozlowski
2025-11-08 16:23           ` Conor Dooley
2025-11-08 16:23             ` Conor Dooley
2025-11-08 16:32             ` Han Gao
2025-11-08 16:32               ` Han Gao
2025-11-08  8:20 ` [PATCH 2/3] riscv: soc: allwinner: d1: use the ARCH_SUNXI_XUANTIE gaohan
2025-11-08  8:20   ` gaohan
2025-11-08  8:20 ` [PATCH 3/3] riscv: defconfig: enable SUNXI_XUANTIE and SUNXI_ANDES gaohan
2025-11-08  8:20   ` gaohan
2025-11-08 11:29   ` Krzysztof Kozlowski
2025-11-08 11:29     ` Krzysztof Kozlowski
2025-11-10  9:03   ` Geert Uytterhoeven
2025-11-10  9:03     ` Geert Uytterhoeven
2025-11-08  9:46 ` [PATCH 0/3] riscv: soc: re-organized allwinner Jernej Škrabec
2025-11-08  9:46   ` Jernej Škrabec

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