From: Ilya Leoshkevich <iii@linux.ibm.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: thuth@redhat.com
Subject: Re: [PATCH v3 02/13] tcg/s390x: Remove TCG_REG_TB
Date: Thu, 08 Dec 2022 15:04:46 +0100 [thread overview]
Message-ID: <287f432b086827002183ccffe66917aa25d43035.camel@linux.ibm.com> (raw)
In-Reply-To: <60d11ef4-40f5-6743-202a-549f83899efb@linaro.org>
On Tue, 2022-12-06 at 18:42 -0600, Richard Henderson wrote:
> On 12/6/22 16:22, Richard Henderson wrote:
> > > Wouldn't it be worth keeping XILF/XIFH here?
> >
> > I don't know. It's difficult for me to guess whether a dependency
> > chain like
> >
> > val -> xor -> xor
> >
> > (3 insns with serial dependencies) is better than
> >
> > val --> xor
> > load -/
> >
> > (3 insns, but only one serial dependency) is better. But there may
> > also be instruction
> > fusion going on at the micro-architectural level, so that there's
> > really only one xor.
> >
> > If you have suggestions, I'm all ears.
>
> Related microarchitectural question:
>
> If a 32-bit insn and a 64-bit insn have a similar size encoding (and
> perhaps even if they
> don't), is it better to produce a 64-bit output so that the hw
> doesn't have a false
> dependency on the upper 32-bits of the register?
>
> Just wondering whether most of the distinction between 32-bit and 64-
> bit opcodes ought to
> be discarded, simplifying code generation. The only items that seem
> most likely to have
> real execution time differences are multiply and divide.
I think this will definitely lead to false dependencies if one produces
32 bits in one place, and then consumes 64 in the other. But if this
idea is applied consistently, then there should be hopefully not so
many such instances?
Two thing come to mind here: memory and CC generation.
The first is probably not very important: we can implement 32-bit loads
with lgf, which sign-extends to 64 bits.
CC generation can be tricker: for conditional jumps it's still going to
be okay, since the code would produce 64-bit values and consume 32-bit
ones, but if the back-end needs a CC from a 32-bit addition, then we
would probably need to sign-extend the result in order to get rid of a
false dependency later on. However, based on a quick inspection I could
not find any such instances.
So using 64-bit operations instead of 32-bit ones would be an
interesting experiment.
Best regards,
Ilya
next prev parent reply other threads:[~2022-12-08 14:05 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-02 6:51 [PATCH v3 00/13] tcg/s390x: misc patches Richard Henderson
2022-12-02 6:51 ` [PATCH v3 01/13] tcg/s390x: Use register pair allocation for div and mulu2 Richard Henderson
2022-12-06 15:49 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 02/13] tcg/s390x: Remove TCG_REG_TB Richard Henderson
2022-12-06 19:29 ` Ilya Leoshkevich
2022-12-06 22:22 ` Richard Henderson
2022-12-07 0:42 ` Richard Henderson
2022-12-08 14:04 ` Ilya Leoshkevich [this message]
2022-12-07 7:45 ` Thomas Huth
2022-12-07 14:55 ` Richard Henderson
2022-12-07 20:40 ` Ilya Leoshkevich
2022-12-07 21:20 ` Christian Borntraeger
2022-12-07 22:09 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 03/13] tcg/s390x: Use LARL+AGHI for odd addresses Richard Henderson
2022-12-06 19:42 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 04/13] tcg/s390x: Distinguish RRF-a and RRF-c formats Richard Henderson
2022-12-06 19:45 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 05/13] tcg/s390x: Distinguish RIE formats Richard Henderson
2022-12-06 19:47 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 06/13] tcg/s390x: Support MIE2 multiply single instructions Richard Henderson
2022-12-06 20:02 ` Ilya Leoshkevich
2022-12-06 20:20 ` Richard Henderson
2022-12-02 6:51 ` [PATCH v3 07/13] tcg/s390x: Support MIE2 MGRK instruction Richard Henderson
2022-12-06 20:02 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 08/13] tcg/s390x: Support MIE3 logical operations Richard Henderson
2022-12-06 20:08 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 09/13] tcg/s390x: Create tgen_cmp2 to simplify movcond Richard Henderson
2022-12-06 20:14 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 10/13] tcg/s390x: Generalize movcond implementation Richard Henderson
2022-12-06 20:39 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 11/13] tcg/s390x: Support SELGR instruction in movcond Richard Henderson
2022-12-06 20:41 ` Ilya Leoshkevich
2022-12-02 6:51 ` [PATCH v3 12/13] tcg/s390x: Use tgen_movcond_int in tgen_clz Richard Henderson
2022-12-06 20:49 ` Ilya Leoshkevich
2022-12-02 6:52 ` [PATCH v3 13/13] tcg/s390x: Implement ctpop operation Richard Henderson
2022-12-06 21:10 ` Ilya Leoshkevich
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