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From: "Heiko Stübner" <heiko@sntech.de>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, conor.dooley@microchip.com,
	guoren@kernel.org, apatel@ventanamicro.com, atishp@rivosinc.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing
Date: Fri, 02 Sep 2022 17:12:06 +0200	[thread overview]
Message-ID: <2910587.GUh0CODmnK@diego> (raw)
In-Reply-To: <20220902094939.wvzovl6ytujtjbtm@kamzik>

Am Freitag, 2. September 2022, 11:49:39 CEST schrieb Andrew Jones:
> Hi Heiko,
> 
> Please use a cover-letter for a patch series. They allow the series to be
> threaded better and people can reply to the cover-letter with series-wide
> comments. For example, I'd like to reply to a cover-letter now with
> 
> For the series
> 
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> 
> but now it looks like I need to go back and reply to each patch
> separately.

I'm not sure if tooling like b4 can handle Reviewed-by's in cover-letters.
At least some time back it couldn't, so am not sure if that was added
meanwhile. So tags added to cover-letters might even get lost.

But I'll add a cover-letter nevertheless - need a place for the v2 changelog
anyway :-)

Heiko


> 
> Thanks,
> drew
> 
> On Fri, Sep 02, 2022 at 12:27:41AM +0200, Heiko Stuebner wrote:
> > This can also do without the ifdef and use IS_ENABLED instead and
> > for better readability, getting rid of that switch also seems
> > waranted.
> > 
> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > ---
> >  arch/riscv/kernel/cpufeature.c | 13 +++++--------
> >  1 file changed, 5 insertions(+), 8 deletions(-)
> > 
> > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > index 553d755483ed..764ea220161f 100644
> > --- a/arch/riscv/kernel/cpufeature.c
> > +++ b/arch/riscv/kernel/cpufeature.c
> > @@ -253,16 +253,13 @@ void __init riscv_fill_hwcap(void)
> >  #ifdef CONFIG_RISCV_ALTERNATIVE
> >  static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
> >  {
> > -#ifdef CONFIG_RISCV_ISA_SVPBMT
> > -	switch (stage) {
> > -	case RISCV_ALTERNATIVES_EARLY_BOOT:
> > +	if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
> >  		return false;
> > -	default:
> > -		return riscv_isa_extension_available(NULL, SVPBMT);
> > -	}
> > -#endif
> >  
> > -	return false;
> > +	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> > +		return false;
> > +
> > +	return riscv_isa_extension_available(NULL, SVPBMT);
> >  }
> >  
> >  static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
> 





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WARNING: multiple messages have this Message-ID (diff)
From: "Heiko Stübner" <heiko@sntech.de>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, conor.dooley@microchip.com,
	guoren@kernel.org, apatel@ventanamicro.com, atishp@rivosinc.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing
Date: Fri, 02 Sep 2022 17:12:06 +0200	[thread overview]
Message-ID: <2910587.GUh0CODmnK@diego> (raw)
In-Reply-To: <20220902094939.wvzovl6ytujtjbtm@kamzik>

Am Freitag, 2. September 2022, 11:49:39 CEST schrieb Andrew Jones:
> Hi Heiko,
> 
> Please use a cover-letter for a patch series. They allow the series to be
> threaded better and people can reply to the cover-letter with series-wide
> comments. For example, I'd like to reply to a cover-letter now with
> 
> For the series
> 
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> 
> but now it looks like I need to go back and reply to each patch
> separately.

I'm not sure if tooling like b4 can handle Reviewed-by's in cover-letters.
At least some time back it couldn't, so am not sure if that was added
meanwhile. So tags added to cover-letters might even get lost.

But I'll add a cover-letter nevertheless - need a place for the v2 changelog
anyway :-)

Heiko


> 
> Thanks,
> drew
> 
> On Fri, Sep 02, 2022 at 12:27:41AM +0200, Heiko Stuebner wrote:
> > This can also do without the ifdef and use IS_ENABLED instead and
> > for better readability, getting rid of that switch also seems
> > waranted.
> > 
> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > ---
> >  arch/riscv/kernel/cpufeature.c | 13 +++++--------
> >  1 file changed, 5 insertions(+), 8 deletions(-)
> > 
> > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > index 553d755483ed..764ea220161f 100644
> > --- a/arch/riscv/kernel/cpufeature.c
> > +++ b/arch/riscv/kernel/cpufeature.c
> > @@ -253,16 +253,13 @@ void __init riscv_fill_hwcap(void)
> >  #ifdef CONFIG_RISCV_ALTERNATIVE
> >  static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
> >  {
> > -#ifdef CONFIG_RISCV_ISA_SVPBMT
> > -	switch (stage) {
> > -	case RISCV_ALTERNATIVES_EARLY_BOOT:
> > +	if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
> >  		return false;
> > -	default:
> > -		return riscv_isa_extension_available(NULL, SVPBMT);
> > -	}
> > -#endif
> >  
> > -	return false;
> > +	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> > +		return false;
> > +
> > +	return riscv_isa_extension_available(NULL, SVPBMT);
> >  }
> >  
> >  static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
> 





  reply	other threads:[~2022-09-02 15:12 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-01 22:27 [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing Heiko Stuebner
2022-09-01 22:27 ` Heiko Stuebner
2022-09-01 22:27 ` [PATCH 2/4] riscv: drop some idefs from CMO initialization Heiko Stuebner
2022-09-01 22:27   ` Heiko Stuebner
2022-09-02  1:05   ` Guo Ren
2022-09-02  1:05     ` Guo Ren
2022-09-02  9:34   ` Conor.Dooley
2022-09-02  9:34     ` Conor.Dooley
2022-09-02  9:49   ` Andrew Jones
2022-09-02  9:49     ` Andrew Jones
2022-09-01 22:27 ` [PATCH 3/4] riscv: use BIT macros in t-head errata init Heiko Stuebner
2022-09-01 22:27   ` Heiko Stuebner
2022-09-02  1:06   ` Guo Ren
2022-09-02  1:06     ` Guo Ren
2022-09-02  9:35   ` Conor.Dooley
2022-09-02  9:35     ` Conor.Dooley
2022-09-02  9:50   ` Andrew Jones
2022-09-02  9:50     ` Andrew Jones
2022-09-01 22:27 ` [PATCH 4/4] riscv: check for kernel config option in t-head memory types errata Heiko Stuebner
2022-09-01 22:27   ` Heiko Stuebner
2022-09-02  1:06   ` Guo Ren
2022-09-02  1:06     ` Guo Ren
2022-09-02  9:33     ` Conor.Dooley
2022-09-02  9:33       ` Conor.Dooley
2022-09-02 15:17       ` Heiko Stübner
2022-09-02 15:17         ` Heiko Stübner
2022-09-02  9:50   ` Andrew Jones
2022-09-02  9:50     ` Andrew Jones
2022-09-02  1:07 ` [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing Guo Ren
2022-09-02  1:07   ` Guo Ren
2022-09-02  9:31 ` Conor.Dooley
2022-09-02  9:31   ` Conor.Dooley
2022-09-02  9:49 ` Andrew Jones
2022-09-02  9:49   ` Andrew Jones
2022-09-02 15:12   ` Heiko Stübner [this message]
2022-09-02 15:12     ` Heiko Stübner
2022-09-02 15:26     ` Conor.Dooley
2022-09-02 15:26       ` Conor.Dooley
2022-09-02 15:34       ` Heiko Stübner
2022-09-02 15:34         ` Heiko Stübner
2022-09-02 19:29       ` Konstantin Ryabitsev
2022-09-02 19:29         ` Konstantin Ryabitsev
2022-09-02  9:50 ` Andrew Jones
2022-09-02  9:50   ` Andrew Jones

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