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From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: Kevin Tian <kevin.tian@intel.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Robin Murphy <robin.murphy@arm.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	Christoph Hellwig <hch@infradead.org>,
	Jean-Philippe Brucker <jean-philippe@linaro.com>,
	Vinod Koul <vkoul@kernel.org>,
	Jacob jun Pan <jacob.jun.pan@intel.com>,
	Jason Gunthorpe <jgg@nvidia.com>, Will Deacon <will@kernel.org>
Subject: Re: [PATCH v5 07/12] arm-smmu-v3/sva: Add SVA domain support
Date: Thu, 5 May 2022 15:09:07 +0800	[thread overview]
Message-ID: <2979ec44-e509-761c-3a0f-95ffec0986f3@linux.intel.com> (raw)
In-Reply-To: <YnFwiLkvYtLn43Qv@myrica>

On 2022/5/4 02:12, Jean-Philippe Brucker wrote:
> On Mon, May 02, 2022 at 09:48:37AM +0800, Lu Baolu wrote:
>> Add support for SVA domain allocation and provide an SVA-specific
>> iommu_domain_ops.
>>
>> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
>> ---
>>   drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   | 14 +++++++
>>   .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c   | 42 +++++++++++++++++++
>>   drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   | 21 ++++++++++
>>   3 files changed, 77 insertions(+)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> index cd48590ada30..7631c00fdcbd 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> @@ -759,6 +759,10 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm,
>>   void arm_smmu_sva_unbind(struct iommu_sva *handle);
>>   u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle);
>>   void arm_smmu_sva_notifier_synchronize(void);
>> +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
>> +				  struct device *dev, ioasid_t id);
>> +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain,
>> +				   struct device *dev, ioasid_t id);
>>   #else /* CONFIG_ARM_SMMU_V3_SVA */
>>   static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
>>   {
>> @@ -804,5 +808,15 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle)
>>   }
>>   
>>   static inline void arm_smmu_sva_notifier_synchronize(void) {}
>> +
>> +static inline int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
>> +						struct device *dev, ioasid_t id)
>> +{
>> +	return -ENODEV;
>> +}
>> +
>> +static inline void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain,
>> +						 struct device *dev,
>> +						 ioasid_t id) {}
>>   #endif /* CONFIG_ARM_SMMU_V3_SVA */
>>   #endif /* _ARM_SMMU_V3_H */
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>> index c623dae1e115..3b843cd3ed67 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>> @@ -541,3 +541,45 @@ void arm_smmu_sva_notifier_synchronize(void)
>>   	 */
>>   	mmu_notifier_synchronize();
>>   }
>> +
>> +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
>> +				  struct device *dev, ioasid_t id)
>> +{
>> +	int ret = 0;
>> +	struct iommu_sva *handle;
>> +	struct mm_struct *mm = iommu_sva_domain_mm(domain);
>> +
>> +	if (domain->type != IOMMU_DOMAIN_SVA || !mm)
> 
> We wouldn't get that far with a non-SVA domain since iommu_sva_domain_mm()
> would dereference a NULL pointer. Could you move it after the domain->type
> check, and maybe add a WARN_ON()?  It could help catch issues in future
> API changes.

Sure. I will make it like this,

int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
                                   struct device *dev, ioasid_t id)
{
         int ret = 0;
         struct mm_struct *mm;
         struct iommu_sva *handle;

         if (domain->type != IOMMU_DOMAIN_SVA)
                 return -EINVAL;

         mm = iommu_sva_domain_mm(domain);
         if (WARN_ON(!mm))
                 return -ENODEV;
... ...

> 
>> +		return -EINVAL;
>> +
>> +	mutex_lock(&sva_lock);
>> +	handle = __arm_smmu_sva_bind(dev, mm);
>> +	if (IS_ERR(handle))
>> +		ret = PTR_ERR(handle);
>> +	mutex_unlock(&sva_lock);
>> +
>> +	return ret;
>> +}
>> +
>> +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain,
>> +				   struct device *dev, ioasid_t id)
>> +{
>> +	struct arm_smmu_bond *bond = NULL, *t;
>> +	struct mm_struct *mm = iommu_sva_domain_mm(domain);
>> +	struct arm_smmu_master *master = dev_iommu_priv_get(dev);
>> +
>> +	mutex_lock(&sva_lock);
>> +	list_for_each_entry(t, &master->bonds, list) {
>> +		if (t->mm == mm) {
>> +			bond = t;
>> +			break;
>> +		}
>> +	}
>> +
>> +	if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) {
>> +		list_del(&bond->list);
>> +		arm_smmu_mmu_notifier_put(bond->smmu_mn);
>> +		kfree(bond);
>> +	}
>> +	mutex_unlock(&sva_lock);
>> +}
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> index afc63fce6107..bd80de0bad98 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> @@ -1995,10 +1995,31 @@ static bool arm_smmu_capable(enum iommu_cap cap)
>>   	}
>>   }
>>   
>> +static void arm_smmu_sva_domain_free(struct iommu_domain *domain)
>> +{
>> +	kfree(domain);
>> +}
>> +
>> +static const struct iommu_domain_ops arm_smmu_sva_domain_ops = {
>> +	.attach_dev_pasid	= arm_smmu_sva_attach_dev_pasid,
>> +	.detach_dev_pasid	= arm_smmu_sva_detach_dev_pasid,
>> +	.free			= arm_smmu_sva_domain_free,
>> +};
>> +
>>   static struct iommu_domain *arm_smmu_domain_alloc(unsigned type)
>>   {
>>   	struct arm_smmu_domain *smmu_domain;
>>   
>> +	if (type == IOMMU_DOMAIN_SVA) {
>> +		struct iommu_domain *domain;
>> +
>> +		domain = kzalloc(sizeof(*domain), GFP_KERNEL);
>> +		if (domain)
>> +			domain->ops = &arm_smmu_sva_domain_ops;
>> +
>> +		return domain;
>> +	}
>> +
> 
> I'd prefer moving all of this to arm-smmu-v3-sva.c and just call
> arm_smmu_sva_domain_alloc() here

Sure.

> 
> Otherwise the patch looks fine. I'll rework the driver when I find some
> time, because we can now remove arm_smmu_bond and move smmu_mn to the SVA
> domain, maybe also remove sva_lock but I haven't thought it through.

Yes. Intel SVA code also needs further cleanup. It's in my non-urgent
task list.

> 
> Thanks,
> Jean
> 
>>   	if (type != IOMMU_DOMAIN_UNMANAGED &&
>>   	    type != IOMMU_DOMAIN_DMA &&
>>   	    type != IOMMU_DOMAIN_DMA_FQ &&
>> -- 
>> 2.25.1
>>

Best regards,
baolu
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>
Cc: Joerg Roedel <joro@8bytes.org>, Jason Gunthorpe <jgg@nvidia.com>,
	Christoph Hellwig <hch@infradead.org>,
	Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.com>,
	Dave Jiang <dave.jiang@intel.com>, Vinod Koul <vkoul@kernel.org>,
	Eric Auger <eric.auger@redhat.com>, Liu Yi L <yi.l.liu@intel.com>,
	Jacob jun Pan <jacob.jun.pan@intel.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 07/12] arm-smmu-v3/sva: Add SVA domain support
Date: Thu, 5 May 2022 15:09:07 +0800	[thread overview]
Message-ID: <2979ec44-e509-761c-3a0f-95ffec0986f3@linux.intel.com> (raw)
In-Reply-To: <YnFwiLkvYtLn43Qv@myrica>

On 2022/5/4 02:12, Jean-Philippe Brucker wrote:
> On Mon, May 02, 2022 at 09:48:37AM +0800, Lu Baolu wrote:
>> Add support for SVA domain allocation and provide an SVA-specific
>> iommu_domain_ops.
>>
>> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
>> ---
>>   drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   | 14 +++++++
>>   .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c   | 42 +++++++++++++++++++
>>   drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   | 21 ++++++++++
>>   3 files changed, 77 insertions(+)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> index cd48590ada30..7631c00fdcbd 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> @@ -759,6 +759,10 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm,
>>   void arm_smmu_sva_unbind(struct iommu_sva *handle);
>>   u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle);
>>   void arm_smmu_sva_notifier_synchronize(void);
>> +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
>> +				  struct device *dev, ioasid_t id);
>> +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain,
>> +				   struct device *dev, ioasid_t id);
>>   #else /* CONFIG_ARM_SMMU_V3_SVA */
>>   static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
>>   {
>> @@ -804,5 +808,15 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle)
>>   }
>>   
>>   static inline void arm_smmu_sva_notifier_synchronize(void) {}
>> +
>> +static inline int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
>> +						struct device *dev, ioasid_t id)
>> +{
>> +	return -ENODEV;
>> +}
>> +
>> +static inline void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain,
>> +						 struct device *dev,
>> +						 ioasid_t id) {}
>>   #endif /* CONFIG_ARM_SMMU_V3_SVA */
>>   #endif /* _ARM_SMMU_V3_H */
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>> index c623dae1e115..3b843cd3ed67 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
>> @@ -541,3 +541,45 @@ void arm_smmu_sva_notifier_synchronize(void)
>>   	 */
>>   	mmu_notifier_synchronize();
>>   }
>> +
>> +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
>> +				  struct device *dev, ioasid_t id)
>> +{
>> +	int ret = 0;
>> +	struct iommu_sva *handle;
>> +	struct mm_struct *mm = iommu_sva_domain_mm(domain);
>> +
>> +	if (domain->type != IOMMU_DOMAIN_SVA || !mm)
> 
> We wouldn't get that far with a non-SVA domain since iommu_sva_domain_mm()
> would dereference a NULL pointer. Could you move it after the domain->type
> check, and maybe add a WARN_ON()?  It could help catch issues in future
> API changes.

Sure. I will make it like this,

int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain,
                                   struct device *dev, ioasid_t id)
{
         int ret = 0;
         struct mm_struct *mm;
         struct iommu_sva *handle;

         if (domain->type != IOMMU_DOMAIN_SVA)
                 return -EINVAL;

         mm = iommu_sva_domain_mm(domain);
         if (WARN_ON(!mm))
                 return -ENODEV;
... ...

> 
>> +		return -EINVAL;
>> +
>> +	mutex_lock(&sva_lock);
>> +	handle = __arm_smmu_sva_bind(dev, mm);
>> +	if (IS_ERR(handle))
>> +		ret = PTR_ERR(handle);
>> +	mutex_unlock(&sva_lock);
>> +
>> +	return ret;
>> +}
>> +
>> +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain,
>> +				   struct device *dev, ioasid_t id)
>> +{
>> +	struct arm_smmu_bond *bond = NULL, *t;
>> +	struct mm_struct *mm = iommu_sva_domain_mm(domain);
>> +	struct arm_smmu_master *master = dev_iommu_priv_get(dev);
>> +
>> +	mutex_lock(&sva_lock);
>> +	list_for_each_entry(t, &master->bonds, list) {
>> +		if (t->mm == mm) {
>> +			bond = t;
>> +			break;
>> +		}
>> +	}
>> +
>> +	if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) {
>> +		list_del(&bond->list);
>> +		arm_smmu_mmu_notifier_put(bond->smmu_mn);
>> +		kfree(bond);
>> +	}
>> +	mutex_unlock(&sva_lock);
>> +}
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> index afc63fce6107..bd80de0bad98 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> @@ -1995,10 +1995,31 @@ static bool arm_smmu_capable(enum iommu_cap cap)
>>   	}
>>   }
>>   
>> +static void arm_smmu_sva_domain_free(struct iommu_domain *domain)
>> +{
>> +	kfree(domain);
>> +}
>> +
>> +static const struct iommu_domain_ops arm_smmu_sva_domain_ops = {
>> +	.attach_dev_pasid	= arm_smmu_sva_attach_dev_pasid,
>> +	.detach_dev_pasid	= arm_smmu_sva_detach_dev_pasid,
>> +	.free			= arm_smmu_sva_domain_free,
>> +};
>> +
>>   static struct iommu_domain *arm_smmu_domain_alloc(unsigned type)
>>   {
>>   	struct arm_smmu_domain *smmu_domain;
>>   
>> +	if (type == IOMMU_DOMAIN_SVA) {
>> +		struct iommu_domain *domain;
>> +
>> +		domain = kzalloc(sizeof(*domain), GFP_KERNEL);
>> +		if (domain)
>> +			domain->ops = &arm_smmu_sva_domain_ops;
>> +
>> +		return domain;
>> +	}
>> +
> 
> I'd prefer moving all of this to arm-smmu-v3-sva.c and just call
> arm_smmu_sva_domain_alloc() here

Sure.

> 
> Otherwise the patch looks fine. I'll rework the driver when I find some
> time, because we can now remove arm_smmu_bond and move smmu_mn to the SVA
> domain, maybe also remove sva_lock but I haven't thought it through.

Yes. Intel SVA code also needs further cleanup. It's in my non-urgent
task list.

> 
> Thanks,
> Jean
> 
>>   	if (type != IOMMU_DOMAIN_UNMANAGED &&
>>   	    type != IOMMU_DOMAIN_DMA &&
>>   	    type != IOMMU_DOMAIN_DMA_FQ &&
>> -- 
>> 2.25.1
>>

Best regards,
baolu

  reply	other threads:[~2022-05-05  7:09 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-02  1:48 [PATCH v5 00/12] iommu: SVA and IOPF refactoring Lu Baolu
2022-05-02  1:48 ` Lu Baolu
2022-05-02  1:48 ` [PATCH v5 01/12] dmaengine: idxd: Separate user and kernel pasid enabling Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-02  1:48 ` [PATCH v5 02/12] iommu: Add pasid_bits field in struct dev_iommu Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:02   ` Jean-Philippe Brucker
2022-05-03 18:02     ` Jean-Philippe Brucker
2022-05-05  6:25     ` Baolu Lu
2022-05-05  6:25       ` Baolu Lu
2022-05-02  1:48 ` [PATCH v5 03/12] iommu: Add attach/detach_dev_pasid domain ops Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:07   ` Jean-Philippe Brucker
2022-05-03 18:07     ` Jean-Philippe Brucker
2022-05-05  6:28     ` Baolu Lu
2022-05-05  6:28       ` Baolu Lu
2022-05-02  1:48 ` [PATCH v5 04/12] iommu/sva: Basic data structures for SVA Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:09   ` Jean-Philippe Brucker
2022-05-03 18:09     ` Jean-Philippe Brucker
2022-05-05  6:42     ` Baolu Lu
2022-05-05  6:42       ` Baolu Lu
2022-05-07  8:32       ` Baolu Lu
2022-05-07  8:32         ` Baolu Lu
2022-05-07 12:39         ` Baolu Lu
2022-05-07 12:39           ` Baolu Lu
2022-05-02  1:48 ` [PATCH v5 05/12] iommu/vt-d: Remove SVM_FLAG_SUPERVISOR_MODE support Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-02  1:48 ` [PATCH v5 06/12] iommu/vt-d: Add SVA domain support Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-02  1:48 ` [PATCH v5 07/12] arm-smmu-v3/sva: " Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:12   ` Jean-Philippe Brucker
2022-05-03 18:12     ` Jean-Philippe Brucker
2022-05-05  7:09     ` Baolu Lu [this message]
2022-05-05  7:09       ` Baolu Lu
2022-05-02  1:48 ` [PATCH v5 08/12] iommu/sva: Use attach/detach_pasid_dev in SVA interfaces Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-02  1:48 ` [PATCH v5 09/12] iommu: Remove SVA related callbacks from iommu ops Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:14   ` Jean-Philippe Brucker
2022-05-03 18:14     ` Jean-Philippe Brucker
2022-05-02  1:48 ` [PATCH v5 10/12] iommu: Prepare IOMMU domain for IOPF Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:20   ` Jean-Philippe Brucker
2022-05-03 18:20     ` Jean-Philippe Brucker
2022-05-05  8:31     ` Baolu Lu
2022-05-05  8:31       ` Baolu Lu
2022-05-05 13:38       ` Jean-Philippe Brucker
2022-05-05 13:38         ` Jean-Philippe Brucker
2022-05-06  5:40         ` Baolu Lu
2022-05-06  5:40           ` Baolu Lu
2022-05-02  1:48 ` [PATCH v5 11/12] iommu: Per-domain I/O page fault handling Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:27   ` Jean-Philippe Brucker
2022-05-03 18:27     ` Jean-Philippe Brucker
2022-05-02  1:48 ` [PATCH v5 12/12] iommu: Rename iommu-sva-lib.{c,h} Lu Baolu
2022-05-02  1:48   ` Lu Baolu
2022-05-03 18:28   ` Jean-Philippe Brucker
2022-05-03 18:28     ` Jean-Philippe Brucker

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