[PATCH 0/2] arm64: dts: imx8qm: add smmu information for usb and add hsic usb port

[PATCH 0/2] arm64: dts: imx8qm: add smmu information for usb and add hsic usb port

[Frank.Li]

Add smmu information for usb and add hsic usb port.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Frank Li (2):
      arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information
      arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

 arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 38 +++++++++++++++++++++++
 1 file changed, 38 insertions(+)
---
base-commit: 3fe08b9796f36ef437ab9328e7dd1e5ff2d66603
change-id: 20260720-qm_smmu-417e915cb713

Best regards,
--  
Frank Li <Frank.Li@nxp.com>

[PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Frank.Li]

From: Frank Li <Frank.Li@nxp.com>

Add usbotg3 iommu information.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index ccf9f510e0f88..1370a571153a5 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -32,3 +32,7 @@ &usdhc3 {
 	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
 	iommus = <&smmu 0x11 0x7f80>;
 };
+
+&usbotg3_cdns3 {
+	iommus = <&smmu 0x4 0x7f80>;
+};

-- 
2.43.0

Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Alexander Stein]

Hi Frank,

Am Montag, 20. Juli 2026, 23:10:33 CEST schrieb Frank.Li@oss.nxp.com:
> From: Frank Li <Frank.Li@nxp.com>
> 
> Add usbotg3 iommu information.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index ccf9f510e0f88..1370a571153a5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -32,3 +32,7 @@ &usdhc3 {
>  	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  	iommus = <&smmu 0x11 0x7f80>;
>  };
> +
> +&usbotg3_cdns3 {
> +	iommus = <&smmu 0x4 0x7f80>;

Where in the RM can you get these values?

Thanks and best regards,
Alexander

> +};
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Frank Li]

On Tue, Jul 21, 2026 at 09:48:16AM +0200, Alexander Stein wrote:
> Hi Frank,
>
> Am Montag, 20. Juli 2026, 23:10:33 CEST schrieb Frank.Li@oss.nxp.com:
> > From: Frank Li <Frank.Li@nxp.com>
> >
> > Add usbotg3 iommu information.
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > index ccf9f510e0f88..1370a571153a5 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > @@ -32,3 +32,7 @@ &usdhc3 {
> >  	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> >  	iommus = <&smmu 0x11 0x7f80>;
> >  };
> > +
> > +&usbotg3_cdns3 {
> > +	iommus = <&smmu 0x4 0x7f80>;
>
> Where in the RM can you get these values?

0x4 is stream ID, any value between 0-31, uboot will use this value to
config stream ID for bus master by scfw API

0x7f80 means tire some bit to high before pass to smmu by hardware.
I don't think signal defination can be found at public documents.

static int arm_smmu_of_xlate(struct device *dev,
                             const struct of_phandle_args *args)
{
        u32 mask, fwid = 0;

        if (args->args_count > 0)
                fwid |= FIELD_PREP(ARM_SMMU_SMR_ID, args->args[0]);

        if (args->args_count > 1)
                fwid |= FIELD_PREP(ARM_SMMU_SMR_MASK, args->args[1]);
}

Frank

>
> Thanks and best regards,
> Alexander
>
> > +};
> >
> >
>
>
> --
> TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> Amtsgericht München, HRB 105018
> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> http://www.tq-group.com/
>
>

Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Emanuele Ghidoli]

On 7/20/26 23:10, Frank.Li@oss.nxp.com wrote:
> From: Frank Li <Frank.Li@nxp.com>
> 
> Add usbotg3 iommu information.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index ccf9f510e0f88..1370a571153a5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -32,3 +32,7 @@ &usdhc3 {
>  	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  	iommus = <&smmu 0x11 0x7f80>;
>  };
> +
> +&usbotg3_cdns3 {
> +	iommus = <&smmu 0x4 0x7f80>;
> +};
> 

Hello Frank,

this patch, now in mainline as 73c3b40e536d, breaks USB 3.0 on Apalis iMX8QM
(both on Ixora and on the Apalis Evaluation Board). Right after xHCI starts:

  xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed
  xhci-hcd xhci-hcd.1.auto: WARNING: Host System Error
  ...
  xhci-hcd xhci-hcd.1.auto: xHCI host controller not responding, assume dead
  xhci-hcd xhci-hcd.1.auto: HC died; cleaning up

SuperSpeed devices no longer enumerate, and no SMMU fault is reported.
Reverting only this commit on top of current master fixes it. The other commit
seems fine.

Adding the same property to the parent as well, like the NXP downstream tree
does, also fixes it:

&usbotg3 {
	iommus = <&smmu 0x4 0x7f80>;
};

With that, SuperSpeed devices enumerate again.

Could you please take care of a fix? Otherwise I think we should revert this
patch.

#regzbot introduced: 73c3b40e536d

Thanks,
Emanuele

Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Frank Li]

On Wed, Oct 28, 2026 at 08:44:21PM +0100, Emanuele Ghidoli wrote:
>
>
> On 7/20/26 23:10, Frank.Li@oss.nxp.com wrote:
> > From: Frank Li <Frank.Li@nxp.com>
> >
> > Add usbotg3 iommu information.
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > index ccf9f510e0f88..1370a571153a5 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > @@ -32,3 +32,7 @@ &usdhc3 {
> >  	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> >  	iommus = <&smmu 0x11 0x7f80>;
> >  };
> > +
> > +&usbotg3_cdns3 {
> > +	iommus = <&smmu 0x4 0x7f80>;
> > +};
> >
>
> Hello Frank,
>
> this patch, now in mainline as 73c3b40e536d, breaks USB 3.0 on Apalis iMX8QM
> (both on Ixora and on the Apalis Evaluation Board). Right after xHCI starts:
>
>   xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed
>   xhci-hcd xhci-hcd.1.auto: WARNING: Host System Error
>   ...
>   xhci-hcd xhci-hcd.1.auto: xHCI host controller not responding, assume dead
>   xhci-hcd xhci-hcd.1.auto: HC died; cleaning up
>
> SuperSpeed devices no longer enumerate, and no SMMU fault is reported.
> Reverting only this commit on top of current master fixes it. The other commit
> seems fine.

Does it only impact superspeed? High speed work?

Frank
>
> Adding the same property to the parent as well, like the NXP downstream tree
> does, also fixes it:
>
> &usbotg3 {
> 	iommus = <&smmu 0x4 0x7f80>;
> };
>
> With that, SuperSpeed devices enumerate again.
>
> Could you please take care of a fix? Otherwise I think we should revert this
> patch.
>
> #regzbot introduced: 73c3b40e536d
>
> Thanks,
> Emanuele

Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Frank Li]

On Wed, Oct 28, 2026 at 04:08:03PM -0400, Frank Li wrote:
> On Wed, Oct 28, 2026 at 08:44:21PM +0100, Emanuele Ghidoli wrote:
> >
> >
> > On 7/20/26 23:10, Frank.Li@oss.nxp.com wrote:
> > > From: Frank Li <Frank.Li@nxp.com>
> > >
> > > Add usbotg3 iommu information.
> > >
> > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > > index ccf9f510e0f88..1370a571153a5 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> > > @@ -32,3 +32,7 @@ &usdhc3 {
> > >  	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> > >  	iommus = <&smmu 0x11 0x7f80>;
> > >  };
> > > +
> > > +&usbotg3_cdns3 {
> > > +	iommus = <&smmu 0x4 0x7f80>;
> > > +};
> > >
> >
> > Hello Frank,
> >
> > this patch, now in mainline as 73c3b40e536d, breaks USB 3.0 on Apalis iMX8QM
> > (both on Ixora and on the Apalis Evaluation Board). Right after xHCI starts:
> >
> >   xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed
> >   xhci-hcd xhci-hcd.1.auto: WARNING: Host System Error
> >   ...
> >   xhci-hcd xhci-hcd.1.auto: xHCI host controller not responding, assume dead
> >   xhci-hcd xhci-hcd.1.auto: HC died; cleaning up
> >
> > SuperSpeed devices no longer enumerate, and no SMMU fault is reported.
> > Reverting only this commit on top of current master fixes it. The other commit
> > seems fine.
>
> Does it only impact superspeed? High speed work?

Thank you report this problem. Suppose below patch should fix this problem.

I have not time to test it today.

diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
index a18bb60f6f3df..7d485f5494ed8 100644
--- a/drivers/iommu/of_iommu.c
+++ b/drivers/iommu/of_iommu.c
@@ -117,6 +117,28 @@ int of_iommu_configure(struct device *dev, struct device_node *master_np,
        bool dev_iommu_present;
        int err;

+       /*
+        * If the device has no of_node (e.g. a synthetic platform device
+        * created by platform_device_alloc() such as xhci-hcd), walk up
+        * the parent device chain to find the nearest ancestor that has an
+        * of_node with an "iommus" property and use that node to configure
+        * the IOMMU for this device.  This allows child devices that share
+        * the same IOMMU stream ID as their parent to be configured correctly
+        * even when they have no DT node of their own.
+        */
+       if (!master_np) {
+               struct device *parent = dev->parent;
+
+               while (parent) {
+                       if (parent->of_node &&
+                           of_property_present(parent->of_node, "iommus")) {
+                               master_np = parent->of_node;
+                               break;
+                       }
+                       parent = parent->parent;
+               }
+       }
+
        if (!master_np)
                return -ENODEV;

Frank

>
> Frank
> >
> > Adding the same property to the parent as well, like the NXP downstream tree
> > does, also fixes it:
> >
> > &usbotg3 {
> > 	iommus = <&smmu 0x4 0x7f80>;
> > };
> >
> > With that, SuperSpeed devices enumerate again.
> >
> > Could you please take care of a fix? Otherwise I think we should revert this
> > patch.
> >
> > #regzbot introduced: 73c3b40e536d
> >
> > Thanks,
> > Emanuele

Re: [PATCH 1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information

[Emanuele Ghidoli]

On 10/28/26 22:05, Frank Li wrote:
> Does it only impact superspeed? High speed work?

No, it's not even enumerated, on the Dev board.

> 
> Thank you report this problem. Suppose below patch should fix this problem.
> 
> I have not time to test it today.
> 
> 
> Frank

Tested, it doesn't help.

xhci-hcd.1.auto has no fwnode, so platform_dma_configure() never calls
of_dma_configure() and the new code in of_iommu_configure() is never
reached.

Emanuele

[PATCH 2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

[Frank.Li]

From: Frank Li <Frank.Li@nxp.com>

Add usb@5b0e0000 and related node for i.MX8QM.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 34 +++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 1370a571153a5..c7063aaac4a34 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -4,6 +4,40 @@
  *	Dong Aisheng <aisheng.dong@nxp.com>
  */
 
+&{/} {
+	usbphynop2: usbphynop2 {
+		compatible = "usb-nop-xceiv";
+		clocks = <&usb2_lpcg IMX_LPCG_CLK_7>;
+		clock-names = "main_clk";
+		power-domains = <&pd IMX_SC_R_USB_0_PHY>;
+		status = "disabled";
+	};
+};
+
+&conn_subsys {
+	usbh1: usb@5b0e0000 {
+		compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb";
+		reg = <0x5b0e0000 0x200>;
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+		phy_type = "hsic";
+		dr_mode = "host";
+		clocks = <&usb2_lpcg IMX_LPCG_CLK_6>;
+		ahb-burst-config = <0x0>;
+		tx-burst-size-dword = <0x10>;
+		rx-burst-size-dword = <0x10>;
+		power-domains = <&pd IMX_SC_R_USB_1>;
+		fsl,usbphy = <&usbphynop2>;
+		fsl,usbmisc = <&usbmisc2 0>;
+	};
+
+	usbmisc2: usbmisc@5b0e0200 {
+		compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
+		#index-cells = <1>;
+		reg = <0x5b0e0200 0x200>;
+	};
+};
+
 &usbphy1 {
 	compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy";
 };

-- 
2.43.0

Re: [PATCH 2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] The `usbphynop2` node requests the wrong power domain (`IMX_SC_R_USB_0_PHY` instead of `IMX_SC_R_USB_1_PHY`).
- [Medium] The `usbh1` node is enabled by default (missing `status = "disabled";`), violating SoC `.dtsi` practices and causing unconditional probing.
- [Low] Missing required `#phy-cells` property in the `usbphynop2` node.
--

--- Patch [2]: [PATCH 2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node ---
commit 9497d73ee79f69a11e0a9347cd596ca4c9842914
Author: Frank Li <Frank.Li@nxp.com>

arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

Add usb@5b0e0000 and related node for i.MX8QM.

> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index 1370a571153a5..c7063aaac4a34 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -4,6 +4,40 @@
>   *	Dong Aisheng <aisheng.dong@nxp.com>
>   */
>  
> +&{/} {
> +	usbphynop2: usbphynop2 {
> +		compatible = "usb-nop-xceiv";

[Severity: Low]
Does this node need a #phy-cells = <0>; property?  The usb-nop-xceiv.yaml
binding schema typically requires this property to be present, and omitting
it might cause dtbs_check validation failures during the build.

> +		clocks = <&usb2_lpcg IMX_LPCG_CLK_7>;
> +		clock-names = "main_clk";
> +		power-domains = <&pd IMX_SC_R_USB_0_PHY>;

[Severity: High]
Is IMX_SC_R_USB_0_PHY the correct power domain for usbphynop2?  Since this is
for the USB_1 controller (usbh1), should this be IMX_SC_R_USB_1_PHY instead?

If it requests the USB_0 PHY domain, the USB_1 PHY hardware might remain
unpowered, causing the HSIC port to fail.

> +		status = "disabled";
> +	};
> +};
> +
> +&conn_subsys {
> +	usbh1: usb@5b0e0000 {
> +		compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb";
> +		reg = <0x5b0e0000 0x200>;

[Severity: Medium]
Should this node include a status = "disabled"; property?  Without it, the
usbh1 node is enabled by default and will probe unconditionally on all i.MX8QM
boards, even if the hardware interface isn't wired up.

Since the required usbphynop2 PHY is disabled, the controller might fail to
initialize, leading to boot delays and unnecessary resource allocation.

> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260720-qm_smmu-v1-0-3689fbd8b516@nxp.com?part=2

Re: [PATCH 2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

[Rob Herring]

On Mon, Jul 20, 2026 at 4:24 PM <sashiko-bot@kernel.org> wrote:
>
> Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
> - [High] The `usbphynop2` node requests the wrong power domain (`IMX_SC_R_USB_0_PHY` instead of `IMX_SC_R_USB_1_PHY`).
> - [Medium] The `usbh1` node is enabled by default (missing `status = "disabled";`), violating SoC `.dtsi` practices and causing unconditional probing.
> - [Low] Missing required `#phy-cells` property in the `usbphynop2` node.

This reported issue is now a warning in linux-next. Maybe the other 2
issues are valid too?

Rob

Re: [PATCH 2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node

[Frank Li]

On Wed, Sep 16, 2026 at 03:43:28PM -0500, Rob Herring wrote:
> On Mon, Jul 20, 2026 at 4:24 PM <sashiko-bot@kernel.org> wrote:
> >
> > Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
> > - [High] The `usbphynop2` node requests the wrong power domain (`IMX_SC_R_USB_0_PHY` instead of `IMX_SC_R_USB_1_PHY`).
> > - [Medium] The `usbh1` node is enabled by default (missing `status = "disabled";`), violating SoC `.dtsi` practices and causing unconditional probing.
> > - [Low] Missing required `#phy-cells` property in the `usbphynop2` node.
>
> This reported issue is now a warning in linux-next. Maybe the other 2
> issues are valid too?

Post fix patch https://lore.kernel.org/imx/20260917145803.838836-1-Frank.Li@oss.nxp.com/T/#t

Frank

>
> Rob

Re: [PATCH 0/2] arm64: dts: imx8qm: add smmu information for usb and add hsic usb port

[Frank.Li]

From: Frank Li <Frank.Li@nxp.com>


On Mon, 20 Jul 2026 17:10:32 -0400, Frank.Li@oss.nxp.com wrote:
> Add smmu information for usb and add hsic usb port.

Applied to imx/dt64-intend, thanks!

[1/2] arm64: dts: imx8qm-ss-conn: add usbotg3 iommu information
      commit: 239bf457d81dda8a71d7cae04bcb745e4efba1ee
[2/2] arm64: dts: imx8qm-ss-conn: Add HSIC usb@5b0e0000 node
      commit: 372a7e2aa11037d02a39323f2c3273c9557f148a

Best regards,
--
Frank Li <Frank.Li@nxp.com>