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From: Oleksii <oleksii.kurochko@gmail.com>
To: Jan Beulich <jbeulich@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Julien Grall" <julien@xen.org>,
	"Volodymyr Babchuk" <Volodymyr_Babchuk@epam.com>,
	"Bertrand Marquis" <bertrand.marquis@arm.com>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Shawn Anastasio" <sanastasio@raptorengineering.com>,
	"consulting @ bugseng . com" <consulting@bugseng.com>,
	"Simone Ballarin" <simone.ballarin@bugseng.com>,
	"Federico Serafini" <federico.serafini@bugseng.com>,
	"Nicola Vetrini" <nicola.vetrini@bugseng.com>,
	Xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [RISCV] [PATCH 0/7] xen/bitops: Reduce the mess, starting with ffs()
Date: Thu, 14 Mar 2024 17:32:33 +0100	[thread overview]
Message-ID: <308749abd97ac659b09ff42b3f80f8c57cdeb51a.camel@gmail.com> (raw)
In-Reply-To: <e233c298-66aa-4653-9b83-18006abe63eb@suse.com>

On Thu, 2024-03-14 at 16:33 +0100, Jan Beulich wrote:
> On 14.03.2024 15:45, Andrew Cooper wrote:
> > On 13/03/2024 5:27 pm, Andrew Cooper wrote:
> > > Start cleaning it up with ffs() and friends.  Across the board,
> > > this adds:
> > > 
> > >  * Functioning bitops without arch-specific asm
> > 
> > It turns out that RISC-V doesn't have a CLZ instruction in the base
> > ISA.  As a consequence, __builtin_ffs() emits a library call to
> > ffs() on
> > GCC, or a de Bruijn sequence on Clang.
> > 
> > The optional Zbb extension adds a CLZ instruction, after which
> > __builtin_ffs() emits a very simple sequence.
> > 
> > This leaves us with several options.
> > 
> > 1) Put generic_ffs() back in, although if we do this then it's
> > going to
> > be out-of-line in lib/ where it can be mostly ignored.
> > 
> > 2) Require Zbb for Xen.
> > 
> > 3) Alternative it up with Zbb or generic_ffs().
> > 
> > 
> > I've got half a mind to do 1) irrespective.  It's mostly just
> > shuffling
> > logic out of bitops.h into lib/.
> 
> Yes. Might also help with the bi-sectability issue you faced.
> 
> > I also think we should do option 2 for RISCV.  Given the
> > instruction
> > groups that H does mandate, it's unrealistic to expect that such a
> > chip
> > wouldn't support Zbb/etc.
> 
> I'm not so sure here.
If to look at available specs of CPUs with H, then, for example, SiFive
P600 series family doesn't support Zbb extenstion:
https://sifive.cdn.prismic.io/sifive/7be0420e-dac1-4558-85bc-50c7a10787e7_p600_datasheet.pdf

But I asked a team who are producing CPU with H support and they have
Zbb extenstion.

> 
> > Also, getting full alternatives working is yet-more work that's not
> > trivial at this point in RISCV's development.  I think it is
> > entirely
> > reasonable to avoid this work for now, and make it a problem for
> > anyone
> > who has an H-capable Zbb-incapable system.  (with a strong
> > implication
> > that this is work that probably never needs to be done.)
> 
> That's definitely for later.
Considering that we are mainly using QEMU and it provides Zbb extension
we can just update -march, and that a real h/w where I can ask to test
a code also support this extenstion I will update riscv/booting.txt and
update -march.

~ Oleksii


      parent reply	other threads:[~2024-03-14 16:33 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-13 17:27 [PATCH 0/7] xen/bitops: Reduce the mess, starting with ffs() Andrew Cooper
2024-03-13 17:27 ` [PATCH 1/7] xen/bitops: Cleanup ahead of rearrangements Andrew Cooper
2024-03-13 18:39   ` Shawn Anastasio
2024-03-13 23:06   ` Andrew Cooper
2024-03-14 13:59   ` Jan Beulich
2024-03-13 17:27 ` [PATCH 2/7] xen/bitops: Implement ffs() in common logic Andrew Cooper
2024-03-14 14:16   ` Jan Beulich
2024-03-14 16:23     ` Andrew Cooper
2024-03-14 16:35       ` Jan Beulich
2024-03-13 17:27 ` [PATCH 3/7] xen/bitops: Implement ffsl() " Andrew Cooper
2024-03-13 17:48   ` Andrew Cooper
2024-03-14 13:45     ` Andrew Cooper
2024-03-13 18:16   ` Andrew Cooper
2024-03-13 17:27 ` [PATCH 4/7] xen/bitops: Delete generic_ffs{,l}() Andrew Cooper
2024-03-13 17:27 ` [PATCH 5/7] xen/bitops: Implement ffs64() in common logic Andrew Cooper
2024-03-14 15:56   ` Jan Beulich
2024-03-13 17:27 ` [PATCH 6/7] xen: Swap find_first_set_bit() for ffsl() - 1 Andrew Cooper
2024-03-14 14:30   ` Jan Beulich
2024-03-14 16:48     ` Oleksii
2024-03-14 16:55       ` Jan Beulich
2024-03-14 18:47     ` Andrew Cooper
2024-03-14 18:51       ` Andrew Cooper
2024-03-18  9:13         ` Jan Beulich
2024-03-18 12:27           ` Andrew Cooper
2024-03-13 17:27 ` [PATCH 7/7] xen/bitops: Delete find_first_set_bit() Andrew Cooper
2024-03-14 15:59   ` Jan Beulich
2024-03-14 17:14     ` Andrew Cooper
2024-03-15 13:48       ` Andrew Cooper
2024-03-15 14:16         ` Jan Beulich
2024-03-14 14:45 ` [RISCV] [PATCH 0/7] xen/bitops: Reduce the mess, starting with ffs() Andrew Cooper
2024-03-14 15:33   ` Jan Beulich
2024-03-14 15:55     ` Andrew Cooper
2024-03-14 16:32     ` Oleksii [this message]

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