From: Jianlong Huang <jianlong.huang@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-gpio@vger.kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Linus Walleij <linus.walleij@linaro.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/5] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Date: Tue, 29 Nov 2022 09:47:56 +0800 [thread overview]
Message-ID: <30c21787-0c48-ff50-1d63-8e69bdcdbe30@starfivetech.com> (raw)
In-Reply-To: <093ea507-4c42-1af9-4896-64c1a918432e@linaro.org>
On Mon, 28 Nov 2022 09:32:45 +0100, Krzysztof Kozlowski wrote:
> On 28/11/2022 01:48, Jianlong Huang wrote:
>
>>>>> +/* aon_iomux doen */
>>>>> +#define GPOEN_AON_PTC0_OE_N_4 2
>>>>> +#define GPOEN_AON_PTC0_OE_N_5 3
>>>>> +#define GPOEN_AON_PTC0_OE_N_6 4
>>>>> +#define GPOEN_AON_PTC0_OE_N_7 5
>>>>> +
>>>>
>>>> It looks like you add register constants to the bindings. Why? The
>>>> bindings are not the place to represent hardware programming model. Not
>>>> mentioning that there is no benefit in this.
>>>
>>> Also: this entire file should be dropped, but if it stays, you have to
>>> name it matching bindings or compatible (vendor,device.h).
>>
>> Thanks your comments.
>> These macros are used to configure pinctrl in dts, so the file should stay,
>
> Why they should stay? What's the reason? If it is not a constant used by
> driver, then register values should not be placed in the bindings, so
> drop it.
>
Thanks.
These macros in binding header(example, DOUT, DOEN etc) will be used in DTS,
and driver will parse the DT for pinctrl configuration.
Example in dts:
uart0_pins: uart0-0 {
tx-pins {
pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, GPOEN_ENABLE, GPI_NONE)>;
bias-disable;
drive-strength = <12>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
rx-pins {
pinmux = <GPIOMUX(6, GPOUT_LOW, GPOEN_DISABLE, GPI_SYS_UART0_RX)>;
bias-pull-up;
drive-strength = <2>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
Best regards,
Jianlong Huang
WARNING: multiple messages have this Message-ID (diff)
From: Jianlong Huang <jianlong.huang@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-gpio@vger.kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Linus Walleij <linus.walleij@linaro.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/5] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Date: Tue, 29 Nov 2022 09:47:56 +0800 [thread overview]
Message-ID: <30c21787-0c48-ff50-1d63-8e69bdcdbe30@starfivetech.com> (raw)
In-Reply-To: <093ea507-4c42-1af9-4896-64c1a918432e@linaro.org>
On Mon, 28 Nov 2022 09:32:45 +0100, Krzysztof Kozlowski wrote:
> On 28/11/2022 01:48, Jianlong Huang wrote:
>
>>>>> +/* aon_iomux doen */
>>>>> +#define GPOEN_AON_PTC0_OE_N_4 2
>>>>> +#define GPOEN_AON_PTC0_OE_N_5 3
>>>>> +#define GPOEN_AON_PTC0_OE_N_6 4
>>>>> +#define GPOEN_AON_PTC0_OE_N_7 5
>>>>> +
>>>>
>>>> It looks like you add register constants to the bindings. Why? The
>>>> bindings are not the place to represent hardware programming model. Not
>>>> mentioning that there is no benefit in this.
>>>
>>> Also: this entire file should be dropped, but if it stays, you have to
>>> name it matching bindings or compatible (vendor,device.h).
>>
>> Thanks your comments.
>> These macros are used to configure pinctrl in dts, so the file should stay,
>
> Why they should stay? What's the reason? If it is not a constant used by
> driver, then register values should not be placed in the bindings, so
> drop it.
>
Thanks.
These macros in binding header(example, DOUT, DOEN etc) will be used in DTS,
and driver will parse the DT for pinctrl configuration.
Example in dts:
uart0_pins: uart0-0 {
tx-pins {
pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, GPOEN_ENABLE, GPI_NONE)>;
bias-disable;
drive-strength = <12>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
rx-pins {
pinmux = <GPIOMUX(6, GPOUT_LOW, GPOEN_DISABLE, GPI_SYS_UART0_RX)>;
bias-pull-up;
drive-strength = <2>;
input-enable;
input-schmitt-enable;
slew-rate = <0>;
};
};
Best regards,
Jianlong Huang
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-11-29 1:47 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 1:11 [PATCH v2 0/5] Basic pinctrl support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18 1:11 ` Hal Feng
2022-11-18 1:11 ` [PATCH v2 1/5] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions Hal Feng
2022-11-18 1:11 ` Hal Feng
2022-11-21 8:38 ` Krzysztof Kozlowski
2022-11-21 8:38 ` Krzysztof Kozlowski
2022-11-21 8:39 ` Krzysztof Kozlowski
2022-11-21 8:39 ` Krzysztof Kozlowski
2022-11-28 0:48 ` Jianlong Huang
2022-11-28 0:48 ` Jianlong Huang
2022-11-28 8:32 ` Krzysztof Kozlowski
2022-11-28 8:32 ` Krzysztof Kozlowski
2022-11-29 1:47 ` Jianlong Huang [this message]
2022-11-29 1:47 ` Jianlong Huang
2022-11-29 7:49 ` Krzysztof Kozlowski
2022-11-29 7:49 ` Krzysztof Kozlowski
2022-11-29 14:46 ` Jianlong Huang
2022-11-29 14:46 ` Jianlong Huang
2022-11-29 14:58 ` Krzysztof Kozlowski
2022-11-29 14:58 ` Krzysztof Kozlowski
2022-11-29 15:58 ` Jianlong Huang
2022-11-29 15:58 ` Jianlong Huang
2022-11-29 16:02 ` Krzysztof Kozlowski
2022-11-29 16:02 ` Krzysztof Kozlowski
2022-12-01 9:31 ` Jianlong Huang
2022-12-01 9:31 ` Jianlong Huang
2022-12-07 13:14 ` Emil Renner Berthing
2022-12-07 13:14 ` Emil Renner Berthing
2022-11-18 1:11 ` [PATCH v2 2/5] dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl Hal Feng
2022-11-18 1:11 ` Hal Feng
2022-11-18 3:56 ` Rob Herring
2022-11-18 3:56 ` Rob Herring
2022-11-18 6:56 ` Hal Feng
2022-11-18 6:56 ` Hal Feng
2022-11-21 8:43 ` Krzysztof Kozlowski
2022-11-21 8:43 ` Krzysztof Kozlowski
2022-11-28 1:04 ` Jianlong Huang
2022-11-28 1:04 ` Jianlong Huang
2022-12-07 13:18 ` Emil Renner Berthing
2022-12-07 13:18 ` Emil Renner Berthing
2022-12-09 3:13 ` Icenowy Zheng
2022-12-09 3:13 ` Icenowy Zheng
2022-11-18 1:11 ` [PATCH v2 3/5] dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl Hal Feng
2022-11-18 1:11 ` Hal Feng
2022-11-21 8:44 ` Krzysztof Kozlowski
2022-11-21 8:44 ` Krzysztof Kozlowski
2022-11-28 1:15 ` Jianlong Huang
2022-11-28 1:15 ` Jianlong Huang
2022-12-07 13:21 ` Emil Renner Berthing
2022-12-07 13:21 ` Emil Renner Berthing
2022-11-18 1:11 ` [PATCH v2 4/5] pinctrl: starfive: Add StarFive JH7110 sys controller driver Hal Feng
2022-11-18 1:11 ` Hal Feng
2022-12-07 13:47 ` Emil Renner Berthing
2022-12-07 13:47 ` Emil Renner Berthing
2022-11-18 1:11 ` [PATCH v2 5/5] pinctrl: starfive: Add StarFive JH7110 aon " Hal Feng
2022-11-18 1:11 ` Hal Feng
2022-11-18 7:17 ` [PATCH v2 0/5] Basic pinctrl support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18 7:17 ` Hal Feng
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