From: "Heiko Stübner" <heiko@sntech.de>
To: Arnd Bergmann <arnd@arndb.de>, linux-riscv@lists.infradead.org
Cc: guoren@kernel.org, peterz@infradead.org, mingo@redhat.com,
Will Deacon <will@kernel.org>,
longman@redhat.com, boqun.feng@gmail.com, jonas@southpole.se,
stefan.kristiansson@saunalahti.fi, shorne@gmail.com,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
aou@eecs.berkeley.edu, Arnd Bergmann <arnd@arndb.de>,
Greg KH <gregkh@linuxfoundation.org>,
sudipm.mukherjee@gmail.com, macro@orcam.me.uk,
jszhang@kernel.org, linux-csky@vger.kernel.org,
linux-kernel@vger.kernel.org, openrisc@lists.librecores.org,
linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: Re: [PATCH v4 6/7] RISC-V: Move to queued RW locks
Date: Wed, 04 May 2022 14:03:23 +0200 [thread overview]
Message-ID: <3100713.5fSG56mABF@diego> (raw)
In-Reply-To: <20220430153626.30660-7-palmer@rivosinc.com>
Am Samstag, 30. April 2022, 17:36:25 CEST schrieb Palmer Dabbelt:
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> Now that we have fair spinlocks we can use the generic queued rwlocks,
> so we might as well do so.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
on riscv64+riscv32 qemu, beaglev and d1-nezha
Tested-by: Heiko Stuebner <heiko@sntech.de>
WARNING: multiple messages have this Message-ID (diff)
From: "Heiko Stübner" <heiko@sntech.de>
To: Arnd Bergmann <arnd@arndb.de>, linux-riscv@lists.infradead.org
Cc: guoren@kernel.org, peterz@infradead.org, mingo@redhat.com,
Will Deacon <will@kernel.org>,
longman@redhat.com, boqun.feng@gmail.com, jonas@southpole.se,
stefan.kristiansson@saunalahti.fi, shorne@gmail.com,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
aou@eecs.berkeley.edu, Arnd Bergmann <arnd@arndb.de>,
Greg KH <gregkh@linuxfoundation.org>,
sudipm.mukherjee@gmail.com, macro@orcam.me.uk,
jszhang@kernel.org, linux-csky@vger.kernel.org,
linux-kernel@vger.kernel.org, openrisc@lists.librecores.org,
linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: Re: [PATCH v4 6/7] RISC-V: Move to queued RW locks
Date: Wed, 04 May 2022 14:03:23 +0200 [thread overview]
Message-ID: <3100713.5fSG56mABF@diego> (raw)
In-Reply-To: <20220430153626.30660-7-palmer@rivosinc.com>
Am Samstag, 30. April 2022, 17:36:25 CEST schrieb Palmer Dabbelt:
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> Now that we have fair spinlocks we can use the generic queued rwlocks,
> so we might as well do so.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
on riscv64+riscv32 qemu, beaglev and d1-nezha
Tested-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Heiko =?unknown-8bit?q?St=C3=BCbner?= <heiko@sntech.de>
To: openrisc@lists.librecores.org
Subject: [PATCH v4 6/7] RISC-V: Move to queued RW locks
Date: Wed, 04 May 2022 14:03:23 +0200 [thread overview]
Message-ID: <3100713.5fSG56mABF@diego> (raw)
In-Reply-To: <20220430153626.30660-7-palmer@rivosinc.com>
Am Samstag, 30. April 2022, 17:36:25 CEST schrieb Palmer Dabbelt:
> From: Palmer Dabbelt <palmer@rivosinc.com>
>
> Now that we have fair spinlocks we can use the generic queued rwlocks,
> so we might as well do so.
>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
on riscv64+riscv32 qemu, beaglev and d1-nezha
Tested-by: Heiko Stuebner <heiko@sntech.de>
next prev parent reply other threads:[~2022-05-04 12:03 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-30 15:36 [PATCH v4 0/7] Generic Ticket Spinlocks Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-04-30 15:36 ` [PATCH v4 1/7] asm-generic: ticket-lock: New generic ticket-based spinlock Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-05-04 11:57 ` Heiko Stübner
2022-05-04 11:57 ` Heiko =?unknown-8bit?q?St=C3=BCbner?=
2022-05-04 11:57 ` Heiko Stübner
2022-05-05 3:30 ` Guo Ren
2022-05-05 3:30 ` Guo Ren
2022-05-05 3:30 ` Guo Ren
2022-04-30 15:36 ` [PATCH v4 2/7] asm-generic: qspinlock: Indicate the use of mixed-size atomics Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-05-04 12:02 ` Heiko Stübner
2022-05-04 12:02 ` Heiko =?unknown-8bit?q?St=C3=BCbner?=
2022-05-04 12:02 ` Heiko Stübner
2022-05-05 11:05 ` Arnd Bergmann
2022-05-05 11:05 ` Arnd Bergmann
2022-05-05 11:05 ` Arnd Bergmann
2022-04-30 15:36 ` [PATCH v4 3/7] asm-generic: qrwlock: Document the spinlock fairness requirements Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-04-30 15:36 ` [PATCH v4 4/7] openrisc: Move to ticket-spinlock Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-04-30 15:36 ` [PATCH v4 5/7] RISC-V: Move to generic spinlocks Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-05-04 12:02 ` Heiko Stübner
2022-05-04 12:02 ` Heiko =?unknown-8bit?q?St=C3=BCbner?=
2022-05-04 12:02 ` Heiko Stübner
2022-05-05 3:21 ` Guo Ren
2022-05-05 3:21 ` Guo Ren
2022-05-05 3:21 ` Guo Ren
2022-05-05 13:00 ` Conor.Dooley
2022-05-05 13:00 ` Conor.Dooley
2022-05-05 13:00 ` Conor.Dooley
2022-04-30 15:36 ` [PATCH v4 6/7] RISC-V: Move to queued RW locks Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-05-04 12:03 ` Heiko Stübner [this message]
2022-05-04 12:03 ` Heiko =?unknown-8bit?q?St=C3=BCbner?=
2022-05-04 12:03 ` Heiko Stübner
2022-05-05 3:20 ` Guo Ren
2022-05-05 3:20 ` Guo Ren
2022-05-05 3:20 ` Guo Ren
2022-05-05 13:00 ` Conor.Dooley
2022-05-05 13:00 ` Conor.Dooley
2022-05-05 13:00 ` Conor.Dooley
2022-04-30 15:36 ` [PATCH v4 7/7] csky: Move to generic ticket-spinlock Palmer Dabbelt
2022-04-30 15:36 ` [OpenRISC] " Palmer Dabbelt
2022-04-30 15:36 ` Palmer Dabbelt
2022-05-05 11:09 ` [PATCH v4 0/7] Generic Ticket Spinlocks Arnd Bergmann
2022-05-05 11:09 ` Arnd Bergmann
2022-05-05 11:09 ` Arnd Bergmann
2022-05-06 14:34 ` Palmer Dabbelt
2022-05-06 14:34 ` Palmer Dabbelt
2022-05-06 14:34 ` Palmer Dabbelt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3100713.5fSG56mABF@diego \
--to=heiko@sntech.de \
--cc=aou@eecs.berkeley.edu \
--cc=arnd@arndb.de \
--cc=boqun.feng@gmail.com \
--cc=gregkh@linuxfoundation.org \
--cc=guoren@kernel.org \
--cc=jonas@southpole.se \
--cc=jszhang@kernel.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-csky@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=longman@redhat.com \
--cc=macro@orcam.me.uk \
--cc=mingo@redhat.com \
--cc=openrisc@lists.librecores.org \
--cc=palmer@dabbelt.com \
--cc=palmer@rivosinc.com \
--cc=paul.walmsley@sifive.com \
--cc=peterz@infradead.org \
--cc=shorne@gmail.com \
--cc=stefan.kristiansson@saunalahti.fi \
--cc=sudipm.mukherjee@gmail.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.