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From: Jeremy Kerr <jk@codeconstruct.com.au>
To: Klaus Jensen <its@irrelevant.dk>, qemu-devel@nongnu.org
Cc: "Andrew Jeffery" <andrew@aj.id.au>,
	"Keith Busch" <kbusch@kernel.org>,
	"Corey Minyard" <cminyard@mvista.com>,
	"Peter Delevoryas" <peter@pjd.dev>,
	qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	qemu-block@nongnu.org, "Joel Stanley" <joel@jms.id.au>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Klaus Jensen" <k.jensen@samsung.com>,
	"Matt Johnston" <matt@codeconstruct.com.au>
Subject: Re: [PATCH 0/3] hw/{i2c,nvme}: mctp endpoint, nvme management interface model
Date: Wed, 16 Nov 2022 17:18:35 +0800	[thread overview]
Message-ID: <32acd8cb29f23013ec203cb635e7fc161ad2e5a6.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20221116084312.35808-1-its@irrelevant.dk>

Hi Klaus,

[+CC Matt]

> This adds a generic MCTP endpoint model that other devices may derive
> from. I'm not 100% happy with the design of the class methods, but
> it's a start.

Thanks for posting these! I'll have a more thorough look through soon,
but wanted to tackle some of the larger design-points first (and we've
already spoken a bit about these, but rehashing a little of that for
others CCed too).

For me, the big decision here is where we want to run the NVMe-MI
device model. Doing it in the qemu process certainly makes things
easier to set up, and we can just configure the machine+nvme-mi device
as the one operation.

The alternative would be to have the NVMe-MI model run as an external
process, and not part of the qemu tree; it looks like Peter D is going
for that approach with [1]. The advantage there is that we would be
able to test against closer-to-reality "MI firmware" (say, a device
vendor running their NVMe-MI firmware directly in another emulator? are
folks interested in doing that?)

The complexity around the latter approach will be where we split the
processes, and arrange for IPC. [1] suggests at the i2c layer, but that
does seem to have complexities with i2c controller model compatibility;
we could certainly extend that to a "generic" i2c-over-something
protocol (which would also be handy for other things), or go higher up
and use MCTP directly as the transport (say, the serial binding over a
chardev). The former would be more useful for direct firmware
emulation.

My interest is mainly in testing the software stack, so either approach
is fine; I assume your interest is from the device implementation side?

Cheers,


Jeremy

[1]: https://github.com/facebook/openbmc/blob/helium/common/recipes-devtools/qemu/qemu/0007-hw-misc-Add-i2c-netdev-device.patch


      parent reply	other threads:[~2022-11-16 14:07 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-16  8:43 [PATCH 0/3] hw/{i2c, nvme}: mctp endpoint, nvme management interface model Klaus Jensen
2022-11-16  8:43 ` [PATCH maybe-7.2 1/3] hw/i2c: only schedule pending master when bus is idle Klaus Jensen
2022-11-16 13:16   ` Peter Maydell
2022-11-16 13:43   ` Corey Minyard
2022-11-16 15:58   ` Cédric Le Goater
2022-11-17  6:40     ` Klaus Jensen
2022-11-17  6:56       ` Cédric Le Goater
2022-11-17  7:37         ` Klaus Jensen
2022-11-17  8:01           ` Cédric Le Goater
2022-11-17 11:58             ` Klaus Jensen
2022-11-17 13:40               ` Cédric Le Goater
2022-11-18  6:59                 ` Klaus Jensen
2022-11-22  8:45                 ` Klaus Jensen
2022-11-16  8:43 ` [PATCH RFC 2/3] hw/i2c: add mctp core Klaus Jensen
2022-11-16 14:27   ` Corey Minyard
2022-11-17  6:51     ` Klaus Jensen
2022-11-18  5:56   ` Jeremy Kerr
2022-11-18  6:15     ` Jeremy Kerr
2022-11-18  7:03       ` Klaus Jensen
2022-11-18  7:09         ` Jeremy Kerr
2022-11-18  7:01     ` Klaus Jensen
2022-11-21  8:04       ` Matt Johnston
2022-11-16  8:43 ` [PATCH RFC 3/3] hw/nvme: add nvme management interface model Klaus Jensen
2022-11-18  7:56   ` Philippe Mathieu-Daudé
2022-11-18  7:58     ` Klaus Jensen
2022-11-16  9:18 ` Jeremy Kerr [this message]

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