From: Christian Lamparter <chunkeey@googlemail.com>
To: Varadarajan Narayanan <varada@codeaurora.org>
Cc: robh+dt@kernel.org, mark.rutland@arm.com,
mturquette@baylibre.com, sboyd@codeaurora.org,
linus.walleij@linaro.org, andy.gross@linaro.org,
david.brown@linaro.org, catalin.marinas@arm.com,
will.deacon@arm.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
bjorn.andersson@linaro.org, absahu@codeaurora.org,
sjaganat@codeaurora.org, sricharan@codeaurora.org,
mraghava@codeaurora.org
Subject: Re: [PATCH v4 1/6] pinctrl: qcom: Add ipq8074 pinctrl driver
Date: Sun, 04 Jun 2017 02:33:50 +0200 [thread overview]
Message-ID: <3316949.YG4fliAlpW@debian64> (raw)
In-Reply-To: <1496474875-7190-2-git-send-email-varada@codeaurora.org>
On Saturday, June 3, 2017 12:57:50 PM CEST Varadarajan Narayanan wrote:
> +- function:
> + Usage: required
> + Value type: <string>
> + Definition: Specify the alternative function to be configured for the
> + specified pins. Functions are only valid for gpio pins.
> + Valid values are:
> + atest_char, atest_char0, atest_char1, atest_char2,
> + atest_char3, audio_rxbclk, audio_rxd, audio_rxfsync,
> + audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync,
> + audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart, blsp1_i2c,
> + blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, blsp2_uart,
> + blsp3_i2c, blsp3_spi, blsp3_spi0, blsp3_spi1, blsp3_spi2,
> + blsp3_spi3, blsp3_uart, blsp4_i2c0, blsp4_i2c1, blsp4_spi0,
> + blsp4_spi1, blsp4_uart0, blsp4_uart1, blsp5_i2c, blsp5_spi,
> + blsp5_uart, burn0, burn1, cri_trng, cri_trng0, cri_trng1,
> + cxc0, cxc1, dbg_out, gcc_plltest, gcc_tlmm, gpio, ldo_en,
> + ldo_update, led0, led1, led2, mac0_sa0, mac0_sa1, mac1_sa0,
> + mac1_sa1, mac1_sa2, mac1_sa3, mac2_sa0, mac2_sa1, mdc,
> + mdio, NA, pcie0_clk, pcie0_rst, pcie0_wake, pcie1_clk,
> + pcie1_rst, pcie1_wake, pcm_drx, pcm_dtx, pcm_fsync,
> + pcm_pclk, pcm_zsi0, pcm_zsi1, prng_rosc, pta1_0, pta1_1,
> + pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3,
> + qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
> + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,
> + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,
> + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,
> + qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,
> + qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b,
> + qpic, rx0, rx1, rx2, sd_card, sd_write, tsens_max, wci2a,
> + wci2b, wci2c, wci2d, NA
The "NA" function is listed twice. It should be there at all.
WARNING: multiple messages have this Message-ID (diff)
From: chunkeey@googlemail.com (Christian Lamparter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 1/6] pinctrl: qcom: Add ipq8074 pinctrl driver
Date: Sun, 04 Jun 2017 02:33:50 +0200 [thread overview]
Message-ID: <3316949.YG4fliAlpW@debian64> (raw)
In-Reply-To: <1496474875-7190-2-git-send-email-varada@codeaurora.org>
On Saturday, June 3, 2017 12:57:50 PM CEST Varadarajan Narayanan wrote:
> +- function:
> + Usage: required
> + Value type: <string>
> + Definition: Specify the alternative function to be configured for the
> + specified pins. Functions are only valid for gpio pins.
> + Valid values are:
> + atest_char, atest_char0, atest_char1, atest_char2,
> + atest_char3, audio_rxbclk, audio_rxd, audio_rxfsync,
> + audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync,
> + audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart, blsp1_i2c,
> + blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, blsp2_uart,
> + blsp3_i2c, blsp3_spi, blsp3_spi0, blsp3_spi1, blsp3_spi2,
> + blsp3_spi3, blsp3_uart, blsp4_i2c0, blsp4_i2c1, blsp4_spi0,
> + blsp4_spi1, blsp4_uart0, blsp4_uart1, blsp5_i2c, blsp5_spi,
> + blsp5_uart, burn0, burn1, cri_trng, cri_trng0, cri_trng1,
> + cxc0, cxc1, dbg_out, gcc_plltest, gcc_tlmm, gpio, ldo_en,
> + ldo_update, led0, led1, led2, mac0_sa0, mac0_sa1, mac1_sa0,
> + mac1_sa1, mac1_sa2, mac1_sa3, mac2_sa0, mac2_sa1, mdc,
> + mdio, NA, pcie0_clk, pcie0_rst, pcie0_wake, pcie1_clk,
> + pcie1_rst, pcie1_wake, pcm_drx, pcm_dtx, pcm_fsync,
> + pcm_pclk, pcm_zsi0, pcm_zsi1, prng_rosc, pta1_0, pta1_1,
> + pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3,
> + qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
> + qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,
> + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,
> + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,
> + qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,
> + qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b,
> + qpic, rx0, rx1, rx2, sd_card, sd_write, tsens_max, wci2a,
> + wci2b, wci2c, wci2d, NA
The "NA" function is listed twice. It should be there at all.
next prev parent reply other threads:[~2017-06-04 0:33 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-03 7:27 [PATCH v4 0/6] Add minimal boot support for IPQ8074 Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
2017-06-03 7:27 ` [PATCH v4 1/6] pinctrl: qcom: Add ipq8074 pinctrl driver Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
2017-06-03 18:55 ` Christian Lamparter
2017-06-03 18:55 ` Christian Lamparter
2017-06-05 6:23 ` Sricharan R
2017-06-05 6:23 ` Sricharan R
2017-06-04 0:33 ` Christian Lamparter [this message]
2017-06-04 0:33 ` Christian Lamparter
2017-06-03 7:27 ` [PATCH v4 2/6] dt-bindings: qcom: Add ipq8074 bindings Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
2017-06-03 7:27 ` [PATCH v4 3/6] clk: qcom: Add DT bindings for ipq8074 gcc clock controller Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
2017-06-03 7:27 ` [PATCH v4 4/6] clk: qcom: Add ipq8074 Global Clock Controller support Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
2017-06-03 7:27 ` [PATCH v4 5/6] arm64: dts: Add ipq8074 SoC and HK01 board support Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
2017-06-03 7:27 ` [PATCH v4 6/6] arm64: defconfig: Enable qcom ipq8074 clock and pinctrl Varadarajan Narayanan
2017-06-03 7:27 ` Varadarajan Narayanan
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