From: Diederik de Haas <didi.debian@cknow.org>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>, Chen-Yu Tsai <wens@kernel.org>,
linux-rockchip@lists.infradead.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jonas Karlman <jonas@kwiboo.se>
Subject: Re: [PATCH] arm64: dts: rockchip: qnap-ts433: Simplify network PHY connection
Date: Wed, 06 Mar 2024 01:03:14 +0100 [thread overview]
Message-ID: <3640614.1ifTrbWeP9@bagend> (raw)
In-Reply-To: <yumnuz5w5yw4pixruukeeh5pjdheiuuxkiazmke5oh3wxpfg7c@4l3rcxcgjfts>
[-- Attachment #1.1: Type: text/plain, Size: 3119 bytes --]
On Monday, 4 March 2024 23:44:48 CET Uwe Kleine-König wrote:
> > That was because it's actually a bug report (wrt Quartz64 A and B), but
> > especially your remark made all the pieces I found earlier fall into
> > place.
> > Therefor I 'abused' this thread/patch to report it.
> >
> > I'm happy to test patches, but I lack the knowledge to come up with one
> > myself.
>
> I guess that would be:
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index
> 59843a7a199c..f4d1deba3110 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -269,7 +269,7 @@ &gmac1 {
> assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru
> SCLK_GMAC1>, <&gmac1_clkin>; clock_in_out = "input";
> phy-supply = <&vcc_3v3>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> pinctrl-names = "default";
> pinctrl-0 = <&gmac1m0_miim
> &gmac1m0_tx_bus2
> @@ -281,8 +281,6 @@ &gmac1m0_clkinout
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f */
> snps,reset-delays-us = <0 20000 100000>;
> - tx_delay = <0x30>;
> - rx_delay = <0x10>;
> phy-handle = <&rgmii_phy1>;
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts index
> 2d92713be2a0..ec1351a171d4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> @@ -176,7 +176,7 @@ &gmac1 {
> assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru
> SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; assigned-clock-parents = <&cru
> SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; clock_in_out =
> "input";
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> phy-supply = <&vcc_3v3>;
> pinctrl-names = "default";
> pinctrl-0 = <&gmac1m1_miim
> @@ -189,8 +189,6 @@ &gmac1m1_clkinout
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
> snps,reset-delays-us = <0 20000 100000>;
> - tx_delay = <0x4f>;
> - rx_delay = <0x24>;
> phy-handle = <&rgmii_phy1>;
> status = "okay";
> };
It turns out my research was incomplete. I already felt uneasy when I realized
that 'pgwipeout' had set it to rgmii and while I wasn't able to track the
conversation down, I did have a vague recollection of there being a discussion
wrt rgmii vs rgmii-id. IOW: he must have set it to rgmii deliberately.
And then I found this:
https://lore.kernel.org/all/20220606163023.3677147-1-pgwipeout@gmail.com/
For Model B it was initially set to rgmii-id, but was later changed to rgmii
due to compatibility issues on the production Model B.
I'm going to assume that it was (initially) set to rgmii on Model A for
similar reasons.
Cheers,
Diederik
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[-- Attachment #2: Type: text/plain, Size: 170 bytes --]
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Diederik de Haas <didi.debian@cknow.org>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>, Chen-Yu Tsai <wens@kernel.org>,
linux-rockchip@lists.infradead.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jonas Karlman <jonas@kwiboo.se>
Subject: Re: [PATCH] arm64: dts: rockchip: qnap-ts433: Simplify network PHY connection
Date: Wed, 06 Mar 2024 01:03:14 +0100 [thread overview]
Message-ID: <3640614.1ifTrbWeP9@bagend> (raw)
In-Reply-To: <yumnuz5w5yw4pixruukeeh5pjdheiuuxkiazmke5oh3wxpfg7c@4l3rcxcgjfts>
[-- Attachment #1.1: Type: text/plain, Size: 3119 bytes --]
On Monday, 4 March 2024 23:44:48 CET Uwe Kleine-König wrote:
> > That was because it's actually a bug report (wrt Quartz64 A and B), but
> > especially your remark made all the pieces I found earlier fall into
> > place.
> > Therefor I 'abused' this thread/patch to report it.
> >
> > I'm happy to test patches, but I lack the knowledge to come up with one
> > myself.
>
> I guess that would be:
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index
> 59843a7a199c..f4d1deba3110 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -269,7 +269,7 @@ &gmac1 {
> assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru
> SCLK_GMAC1>, <&gmac1_clkin>; clock_in_out = "input";
> phy-supply = <&vcc_3v3>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> pinctrl-names = "default";
> pinctrl-0 = <&gmac1m0_miim
> &gmac1m0_tx_bus2
> @@ -281,8 +281,6 @@ &gmac1m0_clkinout
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f */
> snps,reset-delays-us = <0 20000 100000>;
> - tx_delay = <0x30>;
> - rx_delay = <0x10>;
> phy-handle = <&rgmii_phy1>;
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts index
> 2d92713be2a0..ec1351a171d4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> @@ -176,7 +176,7 @@ &gmac1 {
> assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru
> SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; assigned-clock-parents = <&cru
> SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; clock_in_out =
> "input";
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> phy-supply = <&vcc_3v3>;
> pinctrl-names = "default";
> pinctrl-0 = <&gmac1m1_miim
> @@ -189,8 +189,6 @@ &gmac1m1_clkinout
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
> snps,reset-delays-us = <0 20000 100000>;
> - tx_delay = <0x4f>;
> - rx_delay = <0x24>;
> phy-handle = <&rgmii_phy1>;
> status = "okay";
> };
It turns out my research was incomplete. I already felt uneasy when I realized
that 'pgwipeout' had set it to rgmii and while I wasn't able to track the
conversation down, I did have a vague recollection of there being a discussion
wrt rgmii vs rgmii-id. IOW: he must have set it to rgmii deliberately.
And then I found this:
https://lore.kernel.org/all/20220606163023.3677147-1-pgwipeout@gmail.com/
For Model B it was initially set to rgmii-id, but was later changed to rgmii
due to compatibility issues on the production Model B.
I'm going to assume that it was (initially) set to rgmii on Model A for
similar reasons.
Cheers,
Diederik
[-- Attachment #1.2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Diederik de Haas <didi.debian@cknow.org>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>, Chen-Yu Tsai <wens@kernel.org>,
linux-rockchip@lists.infradead.org, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jonas Karlman <jonas@kwiboo.se>
Subject: Re: [PATCH] arm64: dts: rockchip: qnap-ts433: Simplify network PHY connection
Date: Wed, 06 Mar 2024 01:03:14 +0100 [thread overview]
Message-ID: <3640614.1ifTrbWeP9@bagend> (raw)
In-Reply-To: <yumnuz5w5yw4pixruukeeh5pjdheiuuxkiazmke5oh3wxpfg7c@4l3rcxcgjfts>
[-- Attachment #1: Type: text/plain, Size: 3119 bytes --]
On Monday, 4 March 2024 23:44:48 CET Uwe Kleine-König wrote:
> > That was because it's actually a bug report (wrt Quartz64 A and B), but
> > especially your remark made all the pieces I found earlier fall into
> > place.
> > Therefor I 'abused' this thread/patch to report it.
> >
> > I'm happy to test patches, but I lack the knowledge to come up with one
> > myself.
>
> I guess that would be:
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index
> 59843a7a199c..f4d1deba3110 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -269,7 +269,7 @@ &gmac1 {
> assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru
> SCLK_GMAC1>, <&gmac1_clkin>; clock_in_out = "input";
> phy-supply = <&vcc_3v3>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> pinctrl-names = "default";
> pinctrl-0 = <&gmac1m0_miim
> &gmac1m0_tx_bus2
> @@ -281,8 +281,6 @@ &gmac1m0_clkinout
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f */
> snps,reset-delays-us = <0 20000 100000>;
> - tx_delay = <0x30>;
> - rx_delay = <0x10>;
> phy-handle = <&rgmii_phy1>;
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts index
> 2d92713be2a0..ec1351a171d4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
> @@ -176,7 +176,7 @@ &gmac1 {
> assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru
> SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; assigned-clock-parents = <&cru
> SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; clock_in_out =
> "input";
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> phy-supply = <&vcc_3v3>;
> pinctrl-names = "default";
> pinctrl-0 = <&gmac1m1_miim
> @@ -189,8 +189,6 @@ &gmac1m1_clkinout
> snps,reset-active-low;
> /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
> snps,reset-delays-us = <0 20000 100000>;
> - tx_delay = <0x4f>;
> - rx_delay = <0x24>;
> phy-handle = <&rgmii_phy1>;
> status = "okay";
> };
It turns out my research was incomplete. I already felt uneasy when I realized
that 'pgwipeout' had set it to rgmii and while I wasn't able to track the
conversation down, I did have a vague recollection of there being a discussion
wrt rgmii vs rgmii-id. IOW: he must have set it to rgmii deliberately.
And then I found this:
https://lore.kernel.org/all/20220606163023.3677147-1-pgwipeout@gmail.com/
For Model B it was initially set to rgmii-id, but was later changed to rgmii
due to compatibility issues on the production Model B.
I'm going to assume that it was (initially) set to rgmii on Model A for
similar reasons.
Cheers,
Diederik
[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2024-03-06 0:03 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-04 8:46 [PATCH] arm64: dts: rockchip: qnap-ts433: Simplify network PHY connection Uwe Kleine-König
2024-03-04 8:46 ` Uwe Kleine-König
2024-03-04 8:46 ` Uwe Kleine-König
2024-03-04 9:07 ` Heiko Stübner
2024-03-04 9:07 ` Heiko Stübner
2024-03-04 9:07 ` Heiko Stübner
2024-03-04 9:15 ` Uwe Kleine-König
2024-03-04 9:15 ` Uwe Kleine-König
2024-03-04 9:15 ` Uwe Kleine-König
2024-03-04 9:24 ` Heiko Stübner
2024-03-04 9:24 ` Heiko Stübner
2024-03-04 9:24 ` Heiko Stübner
2024-03-04 21:03 ` Uwe Kleine-König
2024-03-04 21:03 ` Uwe Kleine-König
2024-03-04 21:03 ` Uwe Kleine-König
2024-03-04 10:07 ` Chen-Yu Tsai
2024-03-04 10:07 ` Chen-Yu Tsai
2024-03-04 10:07 ` Chen-Yu Tsai
2024-03-04 13:09 ` Andrew Lunn
2024-03-04 13:09 ` Andrew Lunn
2024-03-04 13:09 ` Andrew Lunn
2024-03-04 15:32 ` Diederik de Haas
2024-03-04 15:32 ` Diederik de Haas
2024-03-04 15:32 ` Diederik de Haas
2024-03-04 15:46 ` Jonas Karlman
2024-03-04 15:46 ` Jonas Karlman
2024-03-04 15:46 ` Jonas Karlman
2024-03-04 16:47 ` Diederik de Haas
2024-03-04 16:47 ` Diederik de Haas
2024-03-04 16:47 ` Diederik de Haas
2024-08-05 16:33 ` Heiko Stübner
2024-08-05 16:33 ` Heiko Stübner
2024-08-05 16:47 ` Diederik de Haas
2024-08-05 16:47 ` Diederik de Haas
2024-03-04 15:59 ` Andrew Lunn
2024-03-04 15:59 ` Andrew Lunn
2024-03-04 15:59 ` Andrew Lunn
2024-03-04 16:43 ` Diederik de Haas
2024-03-04 16:43 ` Diederik de Haas
2024-03-04 16:43 ` Diederik de Haas
2024-03-04 22:44 ` Uwe Kleine-König
2024-03-04 22:44 ` Uwe Kleine-König
2024-03-04 22:44 ` Uwe Kleine-König
2024-03-06 0:03 ` Diederik de Haas [this message]
2024-03-06 0:03 ` Diederik de Haas
2024-03-06 0:03 ` Diederik de Haas
2024-03-12 18:39 ` Dragan Simic
2024-03-12 18:39 ` Dragan Simic
2024-03-12 18:39 ` Dragan Simic
2024-08-05 16:23 ` Heiko Stuebner
2024-08-05 16:23 ` Heiko Stuebner
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