[PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Finley Xiao]

As the timing and organization of efuse may be different
between rockchip SoCs, so their read function may be different.
We add different device tree compatible string for rockchip SoCs
to match their own read function.

V3->V4:
- 3/3 change the type of out_value into u32 and buf into u8, their values
  come from register, use u32 and u8 may be more readable. 

Finley Xiao (3):
  nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
  ARM: dts: rockchip: update compatible strings for Rockchip efuse
  nvmem: rockchip-efuse: add rk3399-efuse support

 .../devicetree/bindings/nvmem/rockchip-efuse.txt   |  13 +-
 arch/arm/boot/dts/rk3066a.dtsi                     |   2 +-
 arch/arm/boot/dts/rk3188.dtsi                      |   2 +-
 arch/arm/boot/dts/rk3288.dtsi                      |   2 +-
 drivers/nvmem/rockchip-efuse.c                     | 131 ++++++++++++++++++---
 5 files changed, 126 insertions(+), 24 deletions(-)

-- 
1.9.1

[PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Finley Xiao]

As the timing and organization of efuse may be different
between rockchip SoCs, so their read function may be different.
We add different device tree compatible string for rockchip SoCs
to match their own read function.

V3->V4:
- 3/3 change the type of out_value into u32 and buf into u8, their values
  come from register, use u32 and u8 may be more readable. 

Finley Xiao (3):
  nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
  ARM: dts: rockchip: update compatible strings for Rockchip efuse
  nvmem: rockchip-efuse: add rk3399-efuse support

 .../devicetree/bindings/nvmem/rockchip-efuse.txt   |  13 +-
 arch/arm/boot/dts/rk3066a.dtsi                     |   2 +-
 arch/arm/boot/dts/rk3188.dtsi                      |   2 +-
 arch/arm/boot/dts/rk3288.dtsi                      |   2 +-
 drivers/nvmem/rockchip-efuse.c                     | 131 ++++++++++++++++++---
 5 files changed, 126 insertions(+), 24 deletions(-)

-- 
1.9.1

[PATCH v4 1/3] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse

[Finley Xiao]

Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
programmable electrical fuses with random access interface.

Add different device tree compatible string for different SoCs to be able
to differentiate between the two. The old binding is of course preserved,
though deprecated.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
index 8f86ab3..94aeeea 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -1,11 +1,20 @@
 = Rockchip eFuse device tree bindings =
 
 Required properties:
-- compatible: Should be "rockchip,rockchip-efuse"
+- compatible: Should be one of the following.
+  - "rockchip,rk3066a-efuse" - for RK3066a SoCs.
+  - "rockchip,rk3188-efuse" - for RK3188 SoCs.
+  - "rockchip,rk3288-efuse" - for RK3288 SoCs.
+  - "rockchip,rk3399-efuse" - for RK3399 SoCs.
 - reg: Should contain the registers location and exact eFuse size
 - clocks: Should be the clock id of eFuse
 - clock-names: Should be "pclk_efuse"
 
+Deprecated properties:
+- compatible: "rockchip,rockchip-efuse"
+  Old efuse compatible value compatible to rk3066a, rk3188 and rk3288
+  efuses
+
 = Data cells =
 Are child nodes of eFuse, bindings of which as described in
 bindings/nvmem/nvmem.txt
@@ -13,7 +22,7 @@ bindings/nvmem/nvmem.txt
 Example:
 
 	efuse: efuse@ffb40000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3288-efuse";
 		reg = <0xffb40000 0x20>;
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.9.1

[PATCH v4 1/3] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse

[Finley Xiao]

Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
programmable electrical fuses with random access interface.

Add different device tree compatible string for different SoCs to be able
to differentiate between the two. The old binding is of course preserved,
though deprecated.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
index 8f86ab3..94aeeea 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -1,11 +1,20 @@
 = Rockchip eFuse device tree bindings =
 
 Required properties:
-- compatible: Should be "rockchip,rockchip-efuse"
+- compatible: Should be one of the following.
+  - "rockchip,rk3066a-efuse" - for RK3066a SoCs.
+  - "rockchip,rk3188-efuse" - for RK3188 SoCs.
+  - "rockchip,rk3288-efuse" - for RK3288 SoCs.
+  - "rockchip,rk3399-efuse" - for RK3399 SoCs.
 - reg: Should contain the registers location and exact eFuse size
 - clocks: Should be the clock id of eFuse
 - clock-names: Should be "pclk_efuse"
 
+Deprecated properties:
+- compatible: "rockchip,rockchip-efuse"
+  Old efuse compatible value compatible to rk3066a, rk3188 and rk3288
+  efuses
+
 = Data cells =
 Are child nodes of eFuse, bindings of which as described in
 bindings/nvmem/nvmem.txt
@@ -13,7 +22,7 @@ bindings/nvmem/nvmem.txt
 Example:
 
 	efuse: efuse at ffb40000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3288-efuse";
 		reg = <0xffb40000 0x20>;
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.9.1

Re: [PATCH v4 1/3] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse

[Rob Herring]

On Mon, Aug 29, 2016 at 02:50:08AM -0700, Finley Xiao wrote:
> Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
> fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
> programmable electrical fuses with random access interface.
> 
> Add different device tree compatible string for different SoCs to be able
> to differentiate between the two. The old binding is of course preserved,
> though deprecated.
> 
> Signed-off-by: Finley Xiao <finley.xiao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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Re: [PATCH v4 1/3] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse

[Rob Herring]

On Mon, Aug 29, 2016 at 02:50:08AM -0700, Finley Xiao wrote:
> Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
> fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
> programmable electrical fuses with random access interface.
> 
> Add different device tree compatible string for different SoCs to be able
> to differentiate between the two. The old binding is of course preserved,
> though deprecated.
> 
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v4 1/3] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse

[Rob Herring]

On Mon, Aug 29, 2016 at 02:50:08AM -0700, Finley Xiao wrote:
> Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
> fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
> programmable electrical fuses with random access interface.
> 
> Add different device tree compatible string for different SoCs to be able
> to differentiate between the two. The old binding is of course preserved,
> though deprecated.
> 
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v4 2/3] ARM: dts: rockchip: update compatible strings for Rockchip efuse

[Finley Xiao]

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/boot/dts/rk3066a.dtsi | 2 +-
 arch/arm/boot/dts/rk3188.dtsi  | 2 +-
 arch/arm/boot/dts/rk3288.dtsi  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index c0ba86c..5387cc8 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -162,7 +162,7 @@
 	};
 
 	efuse: efuse@20010000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3066a-efuse";
 		reg = <0x20010000 0x4000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 31f81b2..869e189 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -147,7 +147,7 @@
 	};
 
 	efuse: efuse@20010000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3188-efuse";
 		reg = <0x20010000 0x4000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cd33f01..0eadb96 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1073,7 +1073,7 @@
 	};
 
 	efuse: efuse@ffb40000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3288-efuse";
 		reg = <0xffb40000 0x20>;
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.9.1

[PATCH v4 2/3] ARM: dts: rockchip: update compatible strings for Rockchip efuse

[Finley Xiao]

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/boot/dts/rk3066a.dtsi | 2 +-
 arch/arm/boot/dts/rk3188.dtsi  | 2 +-
 arch/arm/boot/dts/rk3288.dtsi  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index c0ba86c..5387cc8 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -162,7 +162,7 @@
 	};
 
 	efuse: efuse at 20010000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3066a-efuse";
 		reg = <0x20010000 0x4000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 31f81b2..869e189 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -147,7 +147,7 @@
 	};
 
 	efuse: efuse at 20010000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3188-efuse";
 		reg = <0x20010000 0x4000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cd33f01..0eadb96 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1073,7 +1073,7 @@
 	};
 
 	efuse: efuse at ffb40000 {
-		compatible = "rockchip,rockchip-efuse";
+		compatible = "rockchip,rk3288-efuse";
 		reg = <0xffb40000 0x20>;
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.9.1

[PATCH v4 3/3] nvmem: rockchip-efuse: add rk3399-efuse support

[Finley Xiao]

1) the efuse timing of rk3399 is different from earlier SoCs.
2) rk3399-efuse is organized as 32bits by 32 one-time programmable
electrical fuses, the efuse of earlier SoCs is organized as 32bits
by 8 one-time programmable electrical fuses with random access interface.

This patch adds a new read function for rk3399-efuse.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 drivers/nvmem/rockchip-efuse.c | 131 +++++++++++++++++++++++++++++++++++------
 1 file changed, 112 insertions(+), 19 deletions(-)

diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
index 4d3f391..1825fd3 100644
--- a/drivers/nvmem/rockchip-efuse.c
+++ b/drivers/nvmem/rockchip-efuse.c
@@ -22,17 +22,29 @@
 #include <linux/nvmem-provider.h>
 #include <linux/slab.h>
 #include <linux/of.h>
+#include <linux/of_platform.h>
 #include <linux/platform_device.h>
 
-#define EFUSE_A_SHIFT			6
-#define EFUSE_A_MASK			0x3ff
-#define EFUSE_PGENB			BIT(3)
-#define EFUSE_LOAD			BIT(2)
-#define EFUSE_STROBE			BIT(1)
-#define EFUSE_CSB			BIT(0)
-
-#define REG_EFUSE_CTRL			0x0000
-#define REG_EFUSE_DOUT			0x0004
+#define RK3288_A_SHIFT		6
+#define RK3288_A_MASK		0x3ff
+#define RK3288_PGENB		BIT(3)
+#define RK3288_LOAD			BIT(2)
+#define RK3288_STROBE		BIT(1)
+#define RK3288_CSB			BIT(0)
+
+#define RK3399_A_SHIFT		16
+#define RK3399_A_MASK		0x3ff
+#define RK3399_NBYTES		4
+#define RK3399_STROBSFTSEL	BIT(9)
+#define RK3399_RSB			BIT(7)
+#define RK3399_PD			BIT(5)
+#define RK3399_PGENB		BIT(3)
+#define RK3399_LOAD			BIT(2)
+#define RK3399_STROBE		BIT(1)
+#define RK3399_CSB			BIT(0)
+
+#define REG_EFUSE_CTRL		0x0000
+#define REG_EFUSE_DOUT		0x0004
 
 struct rockchip_efuse_chip {
 	struct device *dev;
@@ -40,8 +52,8 @@ struct rockchip_efuse_chip {
 	struct clk *clk;
 };
 
-static int rockchip_efuse_read(void *context, unsigned int offset,
-			       void *val, size_t bytes)
+static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
+				      void *val, size_t bytes)
 {
 	struct rockchip_efuse_chip *efuse = context;
 	u8 *buf = val;
@@ -53,27 +65,80 @@ static int rockchip_efuse_read(void *context, unsigned int offset,
 		return ret;
 	}
 
-	writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
+	writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
 	udelay(1);
 	while (bytes--) {
 		writel(readl(efuse->base + REG_EFUSE_CTRL) &
-			     (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
+			     (~(RK3288_A_MASK << RK3288_A_SHIFT)),
 			     efuse->base + REG_EFUSE_CTRL);
 		writel(readl(efuse->base + REG_EFUSE_CTRL) |
-			     ((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
+			     ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
 			     efuse->base + REG_EFUSE_CTRL);
 		udelay(1);
 		writel(readl(efuse->base + REG_EFUSE_CTRL) |
-			     EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
+			     RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
 		udelay(1);
 		*buf++ = readb(efuse->base + REG_EFUSE_DOUT);
 		writel(readl(efuse->base + REG_EFUSE_CTRL) &
-		     (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
+		     (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
 		udelay(1);
 	}
 
 	/* Switch to standby mode */
-	writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
+	writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
+
+	clk_disable_unprepare(efuse->clk);
+
+	return 0;
+}
+
+static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
+				      void *val, size_t bytes)
+{
+	struct rockchip_efuse_chip *efuse = context;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value;
+	u8 *buf;
+	int ret, i = 0;
+
+	ret = clk_prepare_enable(efuse->clk);
+	if (ret < 0) {
+		dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
+		return ret;
+	}
+
+	addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
+	addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
+	addr_offset = offset % RK3399_NBYTES;
+	addr_len = addr_end - addr_start;
+
+	buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
+
+	writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
+	       efuse->base + REG_EFUSE_CTRL);
+	udelay(1);
+	while (addr_len--) {
+		writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
+			((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+			efuse->base + REG_EFUSE_CTRL);
+		udelay(1);
+		out_value = readl(efuse->base + REG_EFUSE_DOUT);
+		writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
+		       efuse->base + REG_EFUSE_CTRL);
+		udelay(1);
+
+		memcpy(&buf[i], &out_value, RK3399_NBYTES);
+		i += RK3399_NBYTES;
+	}
+
+	/* Switch to standby mode */
+	writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
+
+	memcpy(val, buf + addr_offset, bytes);
+
+	kfree(buf);
 
 	clk_disable_unprepare(efuse->clk);
 
@@ -89,7 +154,27 @@ static struct nvmem_config econfig = {
 };
 
 static const struct of_device_id rockchip_efuse_match[] = {
-	{ .compatible = "rockchip,rockchip-efuse", },
+	/* deprecated but kept around for dts binding compatibility */
+	{
+		.compatible = "rockchip,rockchip-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3066a-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3188-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3288-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3399-efuse",
+		.data = (void *)&rockchip_rk3399_efuse_read,
+	},
 	{ /* sentinel */},
 };
 MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
@@ -99,6 +184,14 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct nvmem_device *nvmem;
 	struct rockchip_efuse_chip *efuse;
+	const struct of_device_id *match;
+	struct device *dev = &pdev->dev;
+
+	match = of_match_device(dev->driver->of_match_table, dev);
+	if (!match || !match->data) {
+		dev_err(dev, "failed to get match data\n");
+		return -EINVAL;
+	}
 
 	efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
 			     GFP_KERNEL);
@@ -116,7 +209,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
 
 	efuse->dev = &pdev->dev;
 	econfig.size = resource_size(res);
-	econfig.reg_read = rockchip_efuse_read;
+	econfig.reg_read = match->data;
 	econfig.priv = efuse;
 	econfig.dev = efuse->dev;
 	nvmem = nvmem_register(&econfig);
-- 
1.9.1

[PATCH v4 3/3] nvmem: rockchip-efuse: add rk3399-efuse support

[Finley Xiao]

1) the efuse timing of rk3399 is different from earlier SoCs.
2) rk3399-efuse is organized as 32bits by 32 one-time programmable
electrical fuses, the efuse of earlier SoCs is organized as 32bits
by 8 one-time programmable electrical fuses with random access interface.

This patch adds a new read function for rk3399-efuse.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 drivers/nvmem/rockchip-efuse.c | 131 +++++++++++++++++++++++++++++++++++------
 1 file changed, 112 insertions(+), 19 deletions(-)

diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
index 4d3f391..1825fd3 100644
--- a/drivers/nvmem/rockchip-efuse.c
+++ b/drivers/nvmem/rockchip-efuse.c
@@ -22,17 +22,29 @@
 #include <linux/nvmem-provider.h>
 #include <linux/slab.h>
 #include <linux/of.h>
+#include <linux/of_platform.h>
 #include <linux/platform_device.h>
 
-#define EFUSE_A_SHIFT			6
-#define EFUSE_A_MASK			0x3ff
-#define EFUSE_PGENB			BIT(3)
-#define EFUSE_LOAD			BIT(2)
-#define EFUSE_STROBE			BIT(1)
-#define EFUSE_CSB			BIT(0)
-
-#define REG_EFUSE_CTRL			0x0000
-#define REG_EFUSE_DOUT			0x0004
+#define RK3288_A_SHIFT		6
+#define RK3288_A_MASK		0x3ff
+#define RK3288_PGENB		BIT(3)
+#define RK3288_LOAD			BIT(2)
+#define RK3288_STROBE		BIT(1)
+#define RK3288_CSB			BIT(0)
+
+#define RK3399_A_SHIFT		16
+#define RK3399_A_MASK		0x3ff
+#define RK3399_NBYTES		4
+#define RK3399_STROBSFTSEL	BIT(9)
+#define RK3399_RSB			BIT(7)
+#define RK3399_PD			BIT(5)
+#define RK3399_PGENB		BIT(3)
+#define RK3399_LOAD			BIT(2)
+#define RK3399_STROBE		BIT(1)
+#define RK3399_CSB			BIT(0)
+
+#define REG_EFUSE_CTRL		0x0000
+#define REG_EFUSE_DOUT		0x0004
 
 struct rockchip_efuse_chip {
 	struct device *dev;
@@ -40,8 +52,8 @@ struct rockchip_efuse_chip {
 	struct clk *clk;
 };
 
-static int rockchip_efuse_read(void *context, unsigned int offset,
-			       void *val, size_t bytes)
+static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
+				      void *val, size_t bytes)
 {
 	struct rockchip_efuse_chip *efuse = context;
 	u8 *buf = val;
@@ -53,27 +65,80 @@ static int rockchip_efuse_read(void *context, unsigned int offset,
 		return ret;
 	}
 
-	writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
+	writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
 	udelay(1);
 	while (bytes--) {
 		writel(readl(efuse->base + REG_EFUSE_CTRL) &
-			     (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
+			     (~(RK3288_A_MASK << RK3288_A_SHIFT)),
 			     efuse->base + REG_EFUSE_CTRL);
 		writel(readl(efuse->base + REG_EFUSE_CTRL) |
-			     ((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
+			     ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
 			     efuse->base + REG_EFUSE_CTRL);
 		udelay(1);
 		writel(readl(efuse->base + REG_EFUSE_CTRL) |
-			     EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
+			     RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
 		udelay(1);
 		*buf++ = readb(efuse->base + REG_EFUSE_DOUT);
 		writel(readl(efuse->base + REG_EFUSE_CTRL) &
-		     (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
+		     (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
 		udelay(1);
 	}
 
 	/* Switch to standby mode */
-	writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
+	writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
+
+	clk_disable_unprepare(efuse->clk);
+
+	return 0;
+}
+
+static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
+				      void *val, size_t bytes)
+{
+	struct rockchip_efuse_chip *efuse = context;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value;
+	u8 *buf;
+	int ret, i = 0;
+
+	ret = clk_prepare_enable(efuse->clk);
+	if (ret < 0) {
+		dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
+		return ret;
+	}
+
+	addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
+	addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
+	addr_offset = offset % RK3399_NBYTES;
+	addr_len = addr_end - addr_start;
+
+	buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
+
+	writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
+	       efuse->base + REG_EFUSE_CTRL);
+	udelay(1);
+	while (addr_len--) {
+		writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
+			((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+			efuse->base + REG_EFUSE_CTRL);
+		udelay(1);
+		out_value = readl(efuse->base + REG_EFUSE_DOUT);
+		writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
+		       efuse->base + REG_EFUSE_CTRL);
+		udelay(1);
+
+		memcpy(&buf[i], &out_value, RK3399_NBYTES);
+		i += RK3399_NBYTES;
+	}
+
+	/* Switch to standby mode */
+	writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
+
+	memcpy(val, buf + addr_offset, bytes);
+
+	kfree(buf);
 
 	clk_disable_unprepare(efuse->clk);
 
@@ -89,7 +154,27 @@ static struct nvmem_config econfig = {
 };
 
 static const struct of_device_id rockchip_efuse_match[] = {
-	{ .compatible = "rockchip,rockchip-efuse", },
+	/* deprecated but kept around for dts binding compatibility */
+	{
+		.compatible = "rockchip,rockchip-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3066a-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3188-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3288-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3399-efuse",
+		.data = (void *)&rockchip_rk3399_efuse_read,
+	},
 	{ /* sentinel */},
 };
 MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
@@ -99,6 +184,14 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
 	struct resource *res;
 	struct nvmem_device *nvmem;
 	struct rockchip_efuse_chip *efuse;
+	const struct of_device_id *match;
+	struct device *dev = &pdev->dev;
+
+	match = of_match_device(dev->driver->of_match_table, dev);
+	if (!match || !match->data) {
+		dev_err(dev, "failed to get match data\n");
+		return -EINVAL;
+	}
 
 	efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
 			     GFP_KERNEL);
@@ -116,7 +209,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
 
 	efuse->dev = &pdev->dev;
 	econfig.size = resource_size(res);
-	econfig.reg_read = rockchip_efuse_read;
+	econfig.reg_read = match->data;
 	econfig.priv = efuse;
 	econfig.dev = efuse->dev;
 	nvmem = nvmem_register(&econfig);
-- 
1.9.1

Re: [PATCH v4 3/3] nvmem: rockchip-efuse: add rk3399-efuse support

[Doug Anderson]

Hi,

On Mon, Aug 29, 2016 at 2:50 AM, Finley Xiao <finley.xiao-TNX95d0MmH7DzftRWevZcw@public.gmane.org> wrote:
> 1) the efuse timing of rk3399 is different from earlier SoCs.
> 2) rk3399-efuse is organized as 32bits by 32 one-time programmable
> electrical fuses, the efuse of earlier SoCs is organized as 32bits
> by 8 one-time programmable electrical fuses with random access interface.
>
> This patch adds a new read function for rk3399-efuse.
>
> Signed-off-by: Finley Xiao <finley.xiao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
> ---
>  drivers/nvmem/rockchip-efuse.c | 131 +++++++++++++++++++++++++++++++++++------
>  1 file changed, 112 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
> index 4d3f391..1825fd3 100644
> --- a/drivers/nvmem/rockchip-efuse.c
> +++ b/drivers/nvmem/rockchip-efuse.c
> @@ -22,17 +22,29 @@
>  #include <linux/nvmem-provider.h>
>  #include <linux/slab.h>
>  #include <linux/of.h>
> +#include <linux/of_platform.h>
>  #include <linux/platform_device.h>
>
> -#define EFUSE_A_SHIFT                  6
> -#define EFUSE_A_MASK                   0x3ff
> -#define EFUSE_PGENB                    BIT(3)
> -#define EFUSE_LOAD                     BIT(2)
> -#define EFUSE_STROBE                   BIT(1)
> -#define EFUSE_CSB                      BIT(0)
> -
> -#define REG_EFUSE_CTRL                 0x0000
> -#define REG_EFUSE_DOUT                 0x0004
> +#define RK3288_A_SHIFT         6
> +#define RK3288_A_MASK          0x3ff
> +#define RK3288_PGENB           BIT(3)
> +#define RK3288_LOAD                    BIT(2)
> +#define RK3288_STROBE          BIT(1)
> +#define RK3288_CSB                     BIT(0)
> +
> +#define RK3399_A_SHIFT         16
> +#define RK3399_A_MASK          0x3ff
> +#define RK3399_NBYTES          4
> +#define RK3399_STROBSFTSEL     BIT(9)
> +#define RK3399_RSB                     BIT(7)
> +#define RK3399_PD                      BIT(5)
> +#define RK3399_PGENB           BIT(3)
> +#define RK3399_LOAD                    BIT(2)
> +#define RK3399_STROBE          BIT(1)
> +#define RK3399_CSB                     BIT(0)
> +
> +#define REG_EFUSE_CTRL         0x0000
> +#define REG_EFUSE_DOUT         0x0004

For me the alignment of the above is all off after your patch.  Are
you sure you have your editor set to 8 spaces per tab?

>
>  struct rockchip_efuse_chip {
>         struct device *dev;
> @@ -40,8 +52,8 @@ struct rockchip_efuse_chip {
>         struct clk *clk;
>  };
>
> -static int rockchip_efuse_read(void *context, unsigned int offset,
> -                              void *val, size_t bytes)
> +static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
> +                                     void *val, size_t bytes)
>  {
>         struct rockchip_efuse_chip *efuse = context;
>         u8 *buf = val;
> @@ -53,27 +65,80 @@ static int rockchip_efuse_read(void *context, unsigned int offset,
>                 return ret;
>         }
>
> -       writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
> +       writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
>         udelay(1);
>         while (bytes--) {
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) &
> -                            (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
> +                            (~(RK3288_A_MASK << RK3288_A_SHIFT)),
>                              efuse->base + REG_EFUSE_CTRL);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) |
> -                            ((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
> +                            ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
>                              efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) |
> -                            EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
> +                            RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>                 *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) &
> -                    (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
> +                    (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>         }
>
>         /* Switch to standby mode */
> -       writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
> +       writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
> +
> +       clk_disable_unprepare(efuse->clk);
> +
> +       return 0;
> +}
> +
> +static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
> +                                     void *val, size_t bytes)
> +{
> +       struct rockchip_efuse_chip *efuse = context;
> +       unsigned int addr_start, addr_end, addr_offset, addr_len;
> +       u32 out_value;
> +       u8 *buf;
> +       int ret, i = 0;
> +
> +       ret = clk_prepare_enable(efuse->clk);
> +       if (ret < 0) {
> +               dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
> +               return ret;
> +       }
> +
> +       addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
> +       addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
> +       addr_offset = offset % RK3399_NBYTES;
> +       addr_len = addr_end - addr_start;
> +
> +       buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
> +       if (!buf)
> +               return -ENOMEM;

you forget to clk_disable_unprepare() here.

> +
> +       writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
> +              efuse->base + REG_EFUSE_CTRL);
> +       udelay(1);
> +       while (addr_len--) {
> +               writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
> +                       ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
> +                       efuse->base + REG_EFUSE_CTRL);
> +               udelay(1);
> +               out_value = readl(efuse->base + REG_EFUSE_DOUT);
> +               writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
> +                      efuse->base + REG_EFUSE_CTRL);
> +               udelay(1);
> +
> +               memcpy(&buf[i], &out_value, RK3399_NBYTES);
> +               i += RK3399_NBYTES;
> +       }
> +
> +       /* Switch to standby mode */
> +       writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
> +
> +       memcpy(val, buf + addr_offset, bytes);
> +
> +       kfree(buf);
>
>         clk_disable_unprepare(efuse->clk);
>
> @@ -89,7 +154,27 @@ static struct nvmem_config econfig = {
>  };
>
>  static const struct of_device_id rockchip_efuse_match[] = {
> -       { .compatible = "rockchip,rockchip-efuse", },
> +       /* deprecated but kept around for dts binding compatibility */
> +       {
> +               .compatible = "rockchip,rockchip-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3066a-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3188-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3288-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3399-efuse",
> +               .data = (void *)&rockchip_rk3399_efuse_read,
> +       },
>         { /* sentinel */},
>  };
>  MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
> @@ -99,6 +184,14 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
>         struct resource *res;
>         struct nvmem_device *nvmem;
>         struct rockchip_efuse_chip *efuse;
> +       const struct of_device_id *match;
> +       struct device *dev = &pdev->dev;
> +
> +       match = of_match_device(dev->driver->of_match_table, dev);
> +       if (!match || !match->data) {
> +               dev_err(dev, "failed to get match data\n");
> +               return -EINVAL;
> +       }
>
>         efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
>                              GFP_KERNEL);
> @@ -116,7 +209,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
>
>         efuse->dev = &pdev->dev;
>         econfig.size = resource_size(res);
> -       econfig.reg_read = rockchip_efuse_read;
> +       econfig.reg_read = match->data;
>         econfig.priv = efuse;
>         econfig.dev = efuse->dev;
>         nvmem = nvmem_register(&econfig);
> --
> 1.9.1
>
>

Re: [PATCH v4 3/3] nvmem: rockchip-efuse: add rk3399-efuse support

[Doug Anderson]

Hi,

On Mon, Aug 29, 2016 at 2:50 AM, Finley Xiao <finley.xiao@rock-chips.com> wrote:
> 1) the efuse timing of rk3399 is different from earlier SoCs.
> 2) rk3399-efuse is organized as 32bits by 32 one-time programmable
> electrical fuses, the efuse of earlier SoCs is organized as 32bits
> by 8 one-time programmable electrical fuses with random access interface.
>
> This patch adds a new read function for rk3399-efuse.
>
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  drivers/nvmem/rockchip-efuse.c | 131 +++++++++++++++++++++++++++++++++++------
>  1 file changed, 112 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
> index 4d3f391..1825fd3 100644
> --- a/drivers/nvmem/rockchip-efuse.c
> +++ b/drivers/nvmem/rockchip-efuse.c
> @@ -22,17 +22,29 @@
>  #include <linux/nvmem-provider.h>
>  #include <linux/slab.h>
>  #include <linux/of.h>
> +#include <linux/of_platform.h>
>  #include <linux/platform_device.h>
>
> -#define EFUSE_A_SHIFT                  6
> -#define EFUSE_A_MASK                   0x3ff
> -#define EFUSE_PGENB                    BIT(3)
> -#define EFUSE_LOAD                     BIT(2)
> -#define EFUSE_STROBE                   BIT(1)
> -#define EFUSE_CSB                      BIT(0)
> -
> -#define REG_EFUSE_CTRL                 0x0000
> -#define REG_EFUSE_DOUT                 0x0004
> +#define RK3288_A_SHIFT         6
> +#define RK3288_A_MASK          0x3ff
> +#define RK3288_PGENB           BIT(3)
> +#define RK3288_LOAD                    BIT(2)
> +#define RK3288_STROBE          BIT(1)
> +#define RK3288_CSB                     BIT(0)
> +
> +#define RK3399_A_SHIFT         16
> +#define RK3399_A_MASK          0x3ff
> +#define RK3399_NBYTES          4
> +#define RK3399_STROBSFTSEL     BIT(9)
> +#define RK3399_RSB                     BIT(7)
> +#define RK3399_PD                      BIT(5)
> +#define RK3399_PGENB           BIT(3)
> +#define RK3399_LOAD                    BIT(2)
> +#define RK3399_STROBE          BIT(1)
> +#define RK3399_CSB                     BIT(0)
> +
> +#define REG_EFUSE_CTRL         0x0000
> +#define REG_EFUSE_DOUT         0x0004

For me the alignment of the above is all off after your patch.  Are
you sure you have your editor set to 8 spaces per tab?

>
>  struct rockchip_efuse_chip {
>         struct device *dev;
> @@ -40,8 +52,8 @@ struct rockchip_efuse_chip {
>         struct clk *clk;
>  };
>
> -static int rockchip_efuse_read(void *context, unsigned int offset,
> -                              void *val, size_t bytes)
> +static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
> +                                     void *val, size_t bytes)
>  {
>         struct rockchip_efuse_chip *efuse = context;
>         u8 *buf = val;
> @@ -53,27 +65,80 @@ static int rockchip_efuse_read(void *context, unsigned int offset,
>                 return ret;
>         }
>
> -       writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
> +       writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
>         udelay(1);
>         while (bytes--) {
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) &
> -                            (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
> +                            (~(RK3288_A_MASK << RK3288_A_SHIFT)),
>                              efuse->base + REG_EFUSE_CTRL);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) |
> -                            ((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
> +                            ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
>                              efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) |
> -                            EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
> +                            RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>                 *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) &
> -                    (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
> +                    (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>         }
>
>         /* Switch to standby mode */
> -       writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
> +       writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
> +
> +       clk_disable_unprepare(efuse->clk);
> +
> +       return 0;
> +}
> +
> +static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
> +                                     void *val, size_t bytes)
> +{
> +       struct rockchip_efuse_chip *efuse = context;
> +       unsigned int addr_start, addr_end, addr_offset, addr_len;
> +       u32 out_value;
> +       u8 *buf;
> +       int ret, i = 0;
> +
> +       ret = clk_prepare_enable(efuse->clk);
> +       if (ret < 0) {
> +               dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
> +               return ret;
> +       }
> +
> +       addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
> +       addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
> +       addr_offset = offset % RK3399_NBYTES;
> +       addr_len = addr_end - addr_start;
> +
> +       buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
> +       if (!buf)
> +               return -ENOMEM;

you forget to clk_disable_unprepare() here.

> +
> +       writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
> +              efuse->base + REG_EFUSE_CTRL);
> +       udelay(1);
> +       while (addr_len--) {
> +               writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
> +                       ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
> +                       efuse->base + REG_EFUSE_CTRL);
> +               udelay(1);
> +               out_value = readl(efuse->base + REG_EFUSE_DOUT);
> +               writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
> +                      efuse->base + REG_EFUSE_CTRL);
> +               udelay(1);
> +
> +               memcpy(&buf[i], &out_value, RK3399_NBYTES);
> +               i += RK3399_NBYTES;
> +       }
> +
> +       /* Switch to standby mode */
> +       writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
> +
> +       memcpy(val, buf + addr_offset, bytes);
> +
> +       kfree(buf);
>
>         clk_disable_unprepare(efuse->clk);
>
> @@ -89,7 +154,27 @@ static struct nvmem_config econfig = {
>  };
>
>  static const struct of_device_id rockchip_efuse_match[] = {
> -       { .compatible = "rockchip,rockchip-efuse", },
> +       /* deprecated but kept around for dts binding compatibility */
> +       {
> +               .compatible = "rockchip,rockchip-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3066a-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3188-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3288-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3399-efuse",
> +               .data = (void *)&rockchip_rk3399_efuse_read,
> +       },
>         { /* sentinel */},
>  };
>  MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
> @@ -99,6 +184,14 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
>         struct resource *res;
>         struct nvmem_device *nvmem;
>         struct rockchip_efuse_chip *efuse;
> +       const struct of_device_id *match;
> +       struct device *dev = &pdev->dev;
> +
> +       match = of_match_device(dev->driver->of_match_table, dev);
> +       if (!match || !match->data) {
> +               dev_err(dev, "failed to get match data\n");
> +               return -EINVAL;
> +       }
>
>         efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
>                              GFP_KERNEL);
> @@ -116,7 +209,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
>
>         efuse->dev = &pdev->dev;
>         econfig.size = resource_size(res);
> -       econfig.reg_read = rockchip_efuse_read;
> +       econfig.reg_read = match->data;
>         econfig.priv = efuse;
>         econfig.dev = efuse->dev;
>         nvmem = nvmem_register(&econfig);
> --
> 1.9.1
>
>

[PATCH v4 3/3] nvmem: rockchip-efuse: add rk3399-efuse support

[Doug Anderson]

Hi,

On Mon, Aug 29, 2016 at 2:50 AM, Finley Xiao <finley.xiao@rock-chips.com> wrote:
> 1) the efuse timing of rk3399 is different from earlier SoCs.
> 2) rk3399-efuse is organized as 32bits by 32 one-time programmable
> electrical fuses, the efuse of earlier SoCs is organized as 32bits
> by 8 one-time programmable electrical fuses with random access interface.
>
> This patch adds a new read function for rk3399-efuse.
>
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  drivers/nvmem/rockchip-efuse.c | 131 +++++++++++++++++++++++++++++++++++------
>  1 file changed, 112 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
> index 4d3f391..1825fd3 100644
> --- a/drivers/nvmem/rockchip-efuse.c
> +++ b/drivers/nvmem/rockchip-efuse.c
> @@ -22,17 +22,29 @@
>  #include <linux/nvmem-provider.h>
>  #include <linux/slab.h>
>  #include <linux/of.h>
> +#include <linux/of_platform.h>
>  #include <linux/platform_device.h>
>
> -#define EFUSE_A_SHIFT                  6
> -#define EFUSE_A_MASK                   0x3ff
> -#define EFUSE_PGENB                    BIT(3)
> -#define EFUSE_LOAD                     BIT(2)
> -#define EFUSE_STROBE                   BIT(1)
> -#define EFUSE_CSB                      BIT(0)
> -
> -#define REG_EFUSE_CTRL                 0x0000
> -#define REG_EFUSE_DOUT                 0x0004
> +#define RK3288_A_SHIFT         6
> +#define RK3288_A_MASK          0x3ff
> +#define RK3288_PGENB           BIT(3)
> +#define RK3288_LOAD                    BIT(2)
> +#define RK3288_STROBE          BIT(1)
> +#define RK3288_CSB                     BIT(0)
> +
> +#define RK3399_A_SHIFT         16
> +#define RK3399_A_MASK          0x3ff
> +#define RK3399_NBYTES          4
> +#define RK3399_STROBSFTSEL     BIT(9)
> +#define RK3399_RSB                     BIT(7)
> +#define RK3399_PD                      BIT(5)
> +#define RK3399_PGENB           BIT(3)
> +#define RK3399_LOAD                    BIT(2)
> +#define RK3399_STROBE          BIT(1)
> +#define RK3399_CSB                     BIT(0)
> +
> +#define REG_EFUSE_CTRL         0x0000
> +#define REG_EFUSE_DOUT         0x0004

For me the alignment of the above is all off after your patch.  Are
you sure you have your editor set to 8 spaces per tab?

>
>  struct rockchip_efuse_chip {
>         struct device *dev;
> @@ -40,8 +52,8 @@ struct rockchip_efuse_chip {
>         struct clk *clk;
>  };
>
> -static int rockchip_efuse_read(void *context, unsigned int offset,
> -                              void *val, size_t bytes)
> +static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
> +                                     void *val, size_t bytes)
>  {
>         struct rockchip_efuse_chip *efuse = context;
>         u8 *buf = val;
> @@ -53,27 +65,80 @@ static int rockchip_efuse_read(void *context, unsigned int offset,
>                 return ret;
>         }
>
> -       writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
> +       writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
>         udelay(1);
>         while (bytes--) {
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) &
> -                            (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
> +                            (~(RK3288_A_MASK << RK3288_A_SHIFT)),
>                              efuse->base + REG_EFUSE_CTRL);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) |
> -                            ((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
> +                            ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
>                              efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) |
> -                            EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
> +                            RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>                 *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
>                 writel(readl(efuse->base + REG_EFUSE_CTRL) &
> -                    (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
> +                    (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
>                 udelay(1);
>         }
>
>         /* Switch to standby mode */
> -       writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
> +       writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
> +
> +       clk_disable_unprepare(efuse->clk);
> +
> +       return 0;
> +}
> +
> +static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
> +                                     void *val, size_t bytes)
> +{
> +       struct rockchip_efuse_chip *efuse = context;
> +       unsigned int addr_start, addr_end, addr_offset, addr_len;
> +       u32 out_value;
> +       u8 *buf;
> +       int ret, i = 0;
> +
> +       ret = clk_prepare_enable(efuse->clk);
> +       if (ret < 0) {
> +               dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
> +               return ret;
> +       }
> +
> +       addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
> +       addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
> +       addr_offset = offset % RK3399_NBYTES;
> +       addr_len = addr_end - addr_start;
> +
> +       buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
> +       if (!buf)
> +               return -ENOMEM;

you forget to clk_disable_unprepare() here.

> +
> +       writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
> +              efuse->base + REG_EFUSE_CTRL);
> +       udelay(1);
> +       while (addr_len--) {
> +               writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
> +                       ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
> +                       efuse->base + REG_EFUSE_CTRL);
> +               udelay(1);
> +               out_value = readl(efuse->base + REG_EFUSE_DOUT);
> +               writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
> +                      efuse->base + REG_EFUSE_CTRL);
> +               udelay(1);
> +
> +               memcpy(&buf[i], &out_value, RK3399_NBYTES);
> +               i += RK3399_NBYTES;
> +       }
> +
> +       /* Switch to standby mode */
> +       writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
> +
> +       memcpy(val, buf + addr_offset, bytes);
> +
> +       kfree(buf);
>
>         clk_disable_unprepare(efuse->clk);
>
> @@ -89,7 +154,27 @@ static struct nvmem_config econfig = {
>  };
>
>  static const struct of_device_id rockchip_efuse_match[] = {
> -       { .compatible = "rockchip,rockchip-efuse", },
> +       /* deprecated but kept around for dts binding compatibility */
> +       {
> +               .compatible = "rockchip,rockchip-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3066a-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3188-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3288-efuse",
> +               .data = (void *)&rockchip_rk3288_efuse_read,
> +       },
> +       {
> +               .compatible = "rockchip,rk3399-efuse",
> +               .data = (void *)&rockchip_rk3399_efuse_read,
> +       },
>         { /* sentinel */},
>  };
>  MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
> @@ -99,6 +184,14 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
>         struct resource *res;
>         struct nvmem_device *nvmem;
>         struct rockchip_efuse_chip *efuse;
> +       const struct of_device_id *match;
> +       struct device *dev = &pdev->dev;
> +
> +       match = of_match_device(dev->driver->of_match_table, dev);
> +       if (!match || !match->data) {
> +               dev_err(dev, "failed to get match data\n");
> +               return -EINVAL;
> +       }
>
>         efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
>                              GFP_KERNEL);
> @@ -116,7 +209,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
>
>         efuse->dev = &pdev->dev;
>         econfig.size = resource_size(res);
> -       econfig.reg_read = rockchip_efuse_read;
> +       econfig.reg_read = match->data;
>         econfig.priv = efuse;
>         econfig.dev = efuse->dev;
>         nvmem = nvmem_register(&econfig);
> --
> 1.9.1
>
>

Re: [PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Srinivas Kandagatla]

Hi Finley,


On 29/08/16 10:50, Finley Xiao wrote:
> As the timing and organization of efuse may be different
> between rockchip SoCs, so their read function may be different.
> We add different device tree compatible string for rockchip SoCs
> to match their own read function.
>
> V3->V4:
> - 3/3 change the type of out_value into u32 and buf into u8, their values
>   come from register, use u32 and u8 may be more readable.
>
> Finley Xiao (3):
>   nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
>   ARM: dts: rockchip: update compatible strings for Rockchip efuse
>   nvmem: rockchip-efuse: add rk3399-efuse support
>
I can take patch 1 and 3, but dts has to go via arm soc tree.

thanks,
srini
>  .../devicetree/bindings/nvmem/rockchip-efuse.txt   |  13 +-
>  arch/arm/boot/dts/rk3066a.dtsi                     |   2 +-
>  arch/arm/boot/dts/rk3188.dtsi                      |   2 +-
>  arch/arm/boot/dts/rk3288.dtsi                      |   2 +-
>  drivers/nvmem/rockchip-efuse.c                     | 131 ++++++++++++++++++---
>  5 files changed, 126 insertions(+), 24 deletions(-)
>

Re: [PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Srinivas Kandagatla]

Hi Finley,


On 29/08/16 10:50, Finley Xiao wrote:
> As the timing and organization of efuse may be different
> between rockchip SoCs, so their read function may be different.
> We add different device tree compatible string for rockchip SoCs
> to match their own read function.
>
> V3->V4:
> - 3/3 change the type of out_value into u32 and buf into u8, their values
>   come from register, use u32 and u8 may be more readable.
>
> Finley Xiao (3):
>   nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
>   ARM: dts: rockchip: update compatible strings for Rockchip efuse
>   nvmem: rockchip-efuse: add rk3399-efuse support
>
I can take patch 1 and 3, but dts has to go via arm soc tree.

thanks,
srini
>  .../devicetree/bindings/nvmem/rockchip-efuse.txt   |  13 +-
>  arch/arm/boot/dts/rk3066a.dtsi                     |   2 +-
>  arch/arm/boot/dts/rk3188.dtsi                      |   2 +-
>  arch/arm/boot/dts/rk3288.dtsi                      |   2 +-
>  drivers/nvmem/rockchip-efuse.c                     | 131 ++++++++++++++++++---
>  5 files changed, 126 insertions(+), 24 deletions(-)
>

[PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Srinivas Kandagatla]

Hi Finley,


On 29/08/16 10:50, Finley Xiao wrote:
> As the timing and organization of efuse may be different
> between rockchip SoCs, so their read function may be different.
> We add different device tree compatible string for rockchip SoCs
> to match their own read function.
>
> V3->V4:
> - 3/3 change the type of out_value into u32 and buf into u8, their values
>   come from register, use u32 and u8 may be more readable.
>
> Finley Xiao (3):
>   nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
>   ARM: dts: rockchip: update compatible strings for Rockchip efuse
>   nvmem: rockchip-efuse: add rk3399-efuse support
>
I can take patch 1 and 3, but dts has to go via arm soc tree.

thanks,
srini
>  .../devicetree/bindings/nvmem/rockchip-efuse.txt   |  13 +-
>  arch/arm/boot/dts/rk3066a.dtsi                     |   2 +-
>  arch/arm/boot/dts/rk3188.dtsi                      |   2 +-
>  arch/arm/boot/dts/rk3288.dtsi                      |   2 +-
>  drivers/nvmem/rockchip-efuse.c                     | 131 ++++++++++++++++++---
>  5 files changed, 126 insertions(+), 24 deletions(-)
>

Re: [PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Heiko Stübner]

Hi srini,

Am Donnerstag, 1. September 2016, 21:02:23 schrieb Srinivas Kandagatla:
> On 29/08/16 10:50, Finley Xiao wrote:
> > As the timing and organization of efuse may be different
> > between rockchip SoCs, so their read function may be different.
> > We add different device tree compatible string for rockchip SoCs
> > to match their own read function.
> > 
> > V3->V4:
> > - 3/3 change the type of out_value into u32 and buf into u8, their values
> > 
> >   come from register, use u32 and u8 may be more readable.
> > 
> > Finley Xiao (3):
> >   nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
> >   ARM: dts: rockchip: update compatible strings for Rockchip efuse
> >   nvmem: rockchip-efuse: add rk3399-efuse support
> 
> I can take patch 1 and 3, but dts has to go via arm soc tree.

that is really fine, and also what I somehow expect :-) .

So once you picked these two (I guess after Doug's comments are fixed) I'll 
pick up the dts patch.


Heiko

Re: [PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Heiko Stübner]

Hi srini,

Am Donnerstag, 1. September 2016, 21:02:23 schrieb Srinivas Kandagatla:
> On 29/08/16 10:50, Finley Xiao wrote:
> > As the timing and organization of efuse may be different
> > between rockchip SoCs, so their read function may be different.
> > We add different device tree compatible string for rockchip SoCs
> > to match their own read function.
> > 
> > V3->V4:
> > - 3/3 change the type of out_value into u32 and buf into u8, their values
> > 
> >   come from register, use u32 and u8 may be more readable.
> > 
> > Finley Xiao (3):
> >   nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
> >   ARM: dts: rockchip: update compatible strings for Rockchip efuse
> >   nvmem: rockchip-efuse: add rk3399-efuse support
> 
> I can take patch 1 and 3, but dts has to go via arm soc tree.

that is really fine, and also what I somehow expect :-) .

So once you picked these two (I guess after Doug's comments are fixed) I'll 
pick up the dts patch.


Heiko

[PATCH v4 0/3] nvmem: rockchip-efuse: support more rockchip SoCs

[Heiko Stübner]

Hi srini,

Am Donnerstag, 1. September 2016, 21:02:23 schrieb Srinivas Kandagatla:
> On 29/08/16 10:50, Finley Xiao wrote:
> > As the timing and organization of efuse may be different
> > between rockchip SoCs, so their read function may be different.
> > We add different device tree compatible string for rockchip SoCs
> > to match their own read function.
> > 
> > V3->V4:
> > - 3/3 change the type of out_value into u32 and buf into u8, their values
> > 
> >   come from register, use u32 and u8 may be more readable.
> > 
> > Finley Xiao (3):
> >   nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
> >   ARM: dts: rockchip: update compatible strings for Rockchip efuse
> >   nvmem: rockchip-efuse: add rk3399-efuse support
> 
> I can take patch 1 and 3, but dts has to go via arm soc tree.

that is really fine, and also what I somehow expect :-) .

So once you picked these two (I guess after Doug's comments are fixed) I'll 
pick up the dts patch.


Heiko