PLX 9050 chip

PLX 9050 chip

[Rich Bodo]

Hi,

Does anyone on this list have experience with the PLX 9050 PCI bus
interface chip?  I am having this strange problem when reading from
registers in a xilinx across the local bus.  I can read pci config
registers, local config registers, and even the xilinx registes, until I
do a write to the xilinx.  After that, I can no longer read from
anywhere on the local bus.  I have implemented the PLX workarounds
mentioned in their FAQ and Errata.  Looking at a scope, I can see that I
am reading and writing to the local bus, but I get squat back from the
plx for reads.

I also want to make sure I am not re-inventing the wheel.  Grepping
through the kernel I found:

Some 9060 drivers
Lots of multi-port serial cards that use the 9050, are based on serial.c
and read their config from an eeprom. 

I am working on a card that will use a lot of the features of the 9050,
including burst mode across the local bus.  I also implement all the
workarounds in software and don't have an eeprom to work with, so I have
to do a little extra setup.  There is a neat PLX supplied tool called
PLXmon that I am able to run under FreeDOS to get and set register
values, I am thinking of writing a linux version.

-Rich

-- 
OST - the open source telecom corporation
Rich Bodo | rsb@ostel.com | 650-964-4-OST

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Re: PLX 9050 chip

[Benjamin LaHaise]

On Thu, 16 Sep 1999, Rich Bodo wrote:

> Does anyone on this list have experience with the PLX 9050 PCI bus
> interface chip?  I am having this strange problem when reading from
...

I'd suggest calling PLX tech support -- they're actually helpful in
answering questions.  From experience, I found that the PLX chips simply
have too many configuration registers that you must choose the correct
settings for, but once you get it right they work quite well.

		-ben


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