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From: Ryan Bradetich <rbradetich@uswest.net>
To: Parisc Linux <parisc-linux@thepuffingroup.com>
Subject: [parisc-linux] Questions understanding exec_kernel
Date: Tue, 21 Sep 1999 19:12:06 -0600	[thread overview]
Message-ID: <37E82CE6.3A5DFFB0@uswest.net> (raw)

Hello hackers:

I'm still trying to debug why I can load the kernel from exec_kernel (in
arch/parisc/boot/boot_code/ipl_s.S)


I've snipped the relevent section of code and have some questions
reguarding it.  (Pleae remember I'm, this is my first attempt with
PA-RISC, and I've been learning by reading the PA-RISC 1.1 Architecture
and Instruction Set Reference Manual, HP Assembler Reference Manual,
various comments throughout the code, and trial and error.)

/*
 *  exec_kernel(entry_point, &commandline, Kernel_FreeMemStart,
half_bss_size );
 *  exec_kernel() calls our kernel...
 */

 .EXPORT exec_kernel,code
 .PROC
 .CALLINFO
 .ENTRY
exec_kernel
 mtsm     %r0                 ; Disable traps and interrupts.

 mtctl    %r0,        %cr17   ; Clear two-level IIA Space Queue
 mtctl    %r0,        %cr17   ;    effectively setting kernel space.
 [Question: Page 5-149 from the PA-RISC 1.1 Architecture and Instruction
Set Reference Manual states: "Level 0:  If the target control register
is CR 8, 9, 12, 13, 17, or 20, this instructin executes as a null
instruction."  I am assuming we are running at level 0 since the rfi
command required running at level 0, so what is the difference between a
null instruction and a nop?]

 mtctl    %arg0,      %cr18   ; Stuff entry point into head of IIA
 ldo      4(%arg0),   %arg0   ;    Offset Queue, and entry point + 4
 mtctl    %arg0,      %cr18   ;    into tail of IIA Offset Queue.

 ldi      0x9,        %arg0   ; Set PSW Q & I bits (collect intrpt
 mtctl    %arg0,      %ipsw   ;    state, allow external intrpts).

 copy     %arg2,      %arg0   ; commandline to arg1
 [Note:  I think the comment is incorrect... we are actually copying the
Kernel_FreeMemStart into arg0 ... Am I missunderstanding the comment?]
                              ; arg3 is not changed..
 .EXIT
 rfi    ; begin execution of kernel.
 nop
 [Question: Page 5-139 from the PA-RISC 1.1 Architecture and Instruction
Set Reference Manual states: "Execution of an RFI instruction when any
of the PSW !, I, or R bits are ones is an undefined operation."  We are
explicitly setting the Q & I bits before calling the rfi command.  I
don't understand how this works ... ]
 .PROCEND

Thanks,
-Ryan

             reply	other threads:[~1999-09-22  1:16 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-09-22  1:12 Ryan Bradetich [this message]
1999-09-22  4:26 ` [parisc-linux] Questions understanding exec_kernel Grant Grundler
1999-09-22  6:45   ` [parisc-linux] C360 boot problem Hannu Martikka
1999-09-22 13:34     ` Philipp Rumpf
1999-09-22 13:32   ` [parisc-linux] Questions understanding exec_kernel Philipp Rumpf
1999-09-22 12:46 ` Hai Vo-Ba
1999-09-22 13:36   ` Philipp Rumpf
1999-09-22 13:29 ` Philipp Rumpf

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