* [parisc-linux] Questions understanding exec_kernel
@ 1999-09-22 1:12 Ryan Bradetich
1999-09-22 4:26 ` Grant Grundler
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Ryan Bradetich @ 1999-09-22 1:12 UTC (permalink / raw)
To: Parisc Linux
Hello hackers:
I'm still trying to debug why I can load the kernel from exec_kernel (in
arch/parisc/boot/boot_code/ipl_s.S)
I've snipped the relevent section of code and have some questions
reguarding it. (Pleae remember I'm, this is my first attempt with
PA-RISC, and I've been learning by reading the PA-RISC 1.1 Architecture
and Instruction Set Reference Manual, HP Assembler Reference Manual,
various comments throughout the code, and trial and error.)
/*
* exec_kernel(entry_point, &commandline, Kernel_FreeMemStart,
half_bss_size );
* exec_kernel() calls our kernel...
*/
.EXPORT exec_kernel,code
.PROC
.CALLINFO
.ENTRY
exec_kernel
mtsm %r0 ; Disable traps and interrupts.
mtctl %r0, %cr17 ; Clear two-level IIA Space Queue
mtctl %r0, %cr17 ; effectively setting kernel space.
[Question: Page 5-149 from the PA-RISC 1.1 Architecture and Instruction
Set Reference Manual states: "Level 0: If the target control register
is CR 8, 9, 12, 13, 17, or 20, this instructin executes as a null
instruction." I am assuming we are running at level 0 since the rfi
command required running at level 0, so what is the difference between a
null instruction and a nop?]
mtctl %arg0, %cr18 ; Stuff entry point into head of IIA
ldo 4(%arg0), %arg0 ; Offset Queue, and entry point + 4
mtctl %arg0, %cr18 ; into tail of IIA Offset Queue.
ldi 0x9, %arg0 ; Set PSW Q & I bits (collect intrpt
mtctl %arg0, %ipsw ; state, allow external intrpts).
copy %arg2, %arg0 ; commandline to arg1
[Note: I think the comment is incorrect... we are actually copying the
Kernel_FreeMemStart into arg0 ... Am I missunderstanding the comment?]
; arg3 is not changed..
.EXIT
rfi ; begin execution of kernel.
nop
[Question: Page 5-139 from the PA-RISC 1.1 Architecture and Instruction
Set Reference Manual states: "Execution of an RFI instruction when any
of the PSW !, I, or R bits are ones is an undefined operation." We are
explicitly setting the Q & I bits before calling the rfi command. I
don't understand how this works ... ]
.PROCEND
Thanks,
-Ryan
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [parisc-linux] Questions understanding exec_kernel
1999-09-22 1:12 [parisc-linux] Questions understanding exec_kernel Ryan Bradetich
@ 1999-09-22 4:26 ` Grant Grundler
1999-09-22 6:45 ` [parisc-linux] C360 boot problem Hannu Martikka
1999-09-22 13:32 ` [parisc-linux] Questions understanding exec_kernel Philipp Rumpf
1999-09-22 12:46 ` Hai Vo-Ba
1999-09-22 13:29 ` Philipp Rumpf
2 siblings, 2 replies; 8+ messages in thread
From: Grant Grundler @ 1999-09-22 4:26 UTC (permalink / raw)
To: Ryan Bradetich; +Cc: Parisc Linux
Ryan Bradetich wrote:
> [Question: Page 5-149 from the PA-RISC 1.1 Architecture and Instruction
> Set Reference Manual states: "Level 0: If the target control register
> is CR 8, 9, 12, 13, 17, or 20, this instructin executes as a null
> instruction." I am assuming we are running at level 0 since the rfi
> command required running at level 0, so what is the difference between a
> null instruction and a nop?]
That's an easy one:
Nullfied instructions are simple ignored - output discarded.
Branch instructions have a "nullify" flag - the PA1.1 book
probably talks more about details here.
NOP is an instruction which is executed but does nothing useful.
(eg OR R0, R0, R0) Often used to get precise timing in a loop
or patch out unwanted instructions for self modifing code.
Someone else will have to tackle the RFI question....
grant
^ permalink raw reply [flat|nested] 8+ messages in thread
* [parisc-linux] C360 boot problem
1999-09-22 4:26 ` Grant Grundler
@ 1999-09-22 6:45 ` Hannu Martikka
1999-09-22 13:34 ` Philipp Rumpf
1999-09-22 13:32 ` [parisc-linux] Questions understanding exec_kernel Philipp Rumpf
1 sibling, 1 reply; 8+ messages in thread
From: Hannu Martikka @ 1999-09-22 6:45 UTC (permalink / raw)
To: Parisc Linux
Hi!
I downloaded the latest kernel(+ramdisk) from CVS and tried it on my C360.
It does not print anything on screen but just blinks the leds. Here's what
it looks like:
Leds: 1234
II
I I
I I
and then from the begining...
I guess it is trying to tell me something, but what?
- Goodi
"The linuX Files -- The Source is Out There."
ø,¸¸,ø¤º°`°º¤ø,¸¸,ø¤º°`°º¤ø,¸¸,ø¤º°`°º¤ø,¸¸,ø¤º°`°º¤ø¤º°`°º¤ø,¸¸,ø¤º°
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [parisc-linux] Questions understanding exec_kernel
1999-09-22 1:12 [parisc-linux] Questions understanding exec_kernel Ryan Bradetich
1999-09-22 4:26 ` Grant Grundler
@ 1999-09-22 12:46 ` Hai Vo-Ba
1999-09-22 13:36 ` Philipp Rumpf
1999-09-22 13:29 ` Philipp Rumpf
2 siblings, 1 reply; 8+ messages in thread
From: Hai Vo-Ba @ 1999-09-22 12:46 UTC (permalink / raw)
To: rbradetich; +Cc: parisc-linux
> .EXIT
> rfi ; begin execution of kernel.
> nop
> [Question: Page 5-139 from the PA-RISC 1.1 Architecture and Instruction
> Set Reference Manual states: "Execution of an RFI instruction when any
> of the PSW !, I, or R bits are ones is an undefined operation." We are
> explicitly setting the Q & I bits before calling the rfi command. I
> don't understand how this works ... ]
> .PROCEND
If I remember right, RFI followed by a NOP is an idiom to tell the CPU
to start fetching instructions from an absolute address pointed to by the
IVA so we usually want to that with interrupts enabled (Q & I bits set).
--Hai
>
> ---------------------------------------------------------------------------
> To unsubscribe: send e-mail to parisc-linux-request@thepuffingroup.com with
> `unsubscribe' as the subject.
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [parisc-linux] Questions understanding exec_kernel
1999-09-22 1:12 [parisc-linux] Questions understanding exec_kernel Ryan Bradetich
1999-09-22 4:26 ` Grant Grundler
1999-09-22 12:46 ` Hai Vo-Ba
@ 1999-09-22 13:29 ` Philipp Rumpf
2 siblings, 0 replies; 8+ messages in thread
From: Philipp Rumpf @ 1999-09-22 13:29 UTC (permalink / raw)
To: Ryan Bradetich; +Cc: Parisc Linux
> /*
> * exec_kernel(entry_point, &commandline, Kernel_FreeMemStart,
> half_bss_size );
> * exec_kernel() calls our kernel...
> */
>
> .EXPORT exec_kernel,code
> .PROC
> .CALLINFO
> .ENTRY
> exec_kernel
> mtsm %r0 ; Disable traps and interrupts.
>
> mtctl %r0, %cr17 ; Clear two-level IIA Space Queue
> mtctl %r0, %cr17 ; effectively setting kernel space.
> [Question: Page 5-149 from the PA-RISC 1.1 Architecture and Instruction
> Set Reference Manual states: "Level 0: If the target control register
> is CR 8, 9, 12, 13, 17, or 20, this instructin executes as a null
> instruction." I am assuming we are running at level 0 since the rfi
> command required running at level 0, so what is the difference between a
> null instruction and a nop?]
Level 0 refers to the hardware here. Level 0 hardware basically has no MMU,
so Linux will never run on it (does HP/UX ?)
> copy %arg2, %arg0 ; commandline to arg1
> [Note: I think the comment is incorrect... we are actually copying the
> Kernel_FreeMemStart into arg0 ... Am I missunderstanding the comment?]
No, looks like the comment did not get changed when the instruction did.
> ; arg3 is not changed..
> .EXIT
> rfi ; begin execution of kernel.
> nop
> [Question: Page 5-139 from the PA-RISC 1.1 Architecture and Instruction
> Set Reference Manual states: "Execution of an RFI instruction when any
> of the PSW !, I, or R bits are ones is an undefined operation." We are
> explicitly setting the Q & I bits before calling the rfi command. I
> don't understand how this works ... ]
We did execute mtsm 0 which sets the system mask (which includes the Q, I and
R bits) to 0.
Philipp Rumpf
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [parisc-linux] Questions understanding exec_kernel
1999-09-22 4:26 ` Grant Grundler
1999-09-22 6:45 ` [parisc-linux] C360 boot problem Hannu Martikka
@ 1999-09-22 13:32 ` Philipp Rumpf
1 sibling, 0 replies; 8+ messages in thread
From: Philipp Rumpf @ 1999-09-22 13:32 UTC (permalink / raw)
To: Grant Grundler; +Cc: Ryan Bradetich, Parisc Linux
> > [Question: Page 5-149 from the PA-RISC 1.1 Architecture and Instruction
> > Set Reference Manual states: "Level 0: If the target control register
> > is CR 8, 9, 12, 13, 17, or 20, this instructin executes as a null
> > instruction." I am assuming we are running at level 0 since the rfi
> > command required running at level 0, so what is the difference between a
> > null instruction and a nop?]
There is none. Null instructions (here) refer to instructions ignored since
they don't apply to the specific hardware. Nops are usually regular forms of
arithmetic / logical instructions that happen to do nothing.
> That's an easy one:
> Nullfied instructions are simple ignored - output discarded.
Except we're not talking about nullified instructions :)
Philipp Rumpf
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [parisc-linux] C360 boot problem
1999-09-22 6:45 ` [parisc-linux] C360 boot problem Hannu Martikka
@ 1999-09-22 13:34 ` Philipp Rumpf
0 siblings, 0 replies; 8+ messages in thread
From: Philipp Rumpf @ 1999-09-22 13:34 UTC (permalink / raw)
To: Hannu Martikka; +Cc: Parisc Linux
> I downloaded the latest kernel(+ramdisk) from CVS and tried it on my C360.
> It does not print anything on screen but just blinks the leds. Here's what
> it looks like:
>
> Leds: 1234
> II
> I I
> I I
> and then from the begining...
>
> I guess it is trying to tell me something, but what?
Can you try to get the PIM contents and search for the symbols closest to
IAOQ / CR18 in your System.map ?
Philipp Rumpf
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [parisc-linux] Questions understanding exec_kernel
1999-09-22 12:46 ` Hai Vo-Ba
@ 1999-09-22 13:36 ` Philipp Rumpf
0 siblings, 0 replies; 8+ messages in thread
From: Philipp Rumpf @ 1999-09-22 13:36 UTC (permalink / raw)
To: Hai Vo-Ba; +Cc: rbradetich, parisc-linux
> If I remember right, RFI followed by a NOP is an idiom to tell the CPU
> to start fetching instructions from an absolute address pointed to by the
> IVA so we usually want to that with interrupts enabled (Q & I bits set).
Are you sure ? It never did that on the machines I tested on so far (712,
A180C and indirectly 715).
Philipp Rumpf
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~1999-09-22 13:34 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
1999-09-22 1:12 [parisc-linux] Questions understanding exec_kernel Ryan Bradetich
1999-09-22 4:26 ` Grant Grundler
1999-09-22 6:45 ` [parisc-linux] C360 boot problem Hannu Martikka
1999-09-22 13:34 ` Philipp Rumpf
1999-09-22 13:32 ` [parisc-linux] Questions understanding exec_kernel Philipp Rumpf
1999-09-22 12:46 ` Hai Vo-Ba
1999-09-22 13:36 ` Philipp Rumpf
1999-09-22 13:29 ` Philipp Rumpf
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