[RESEND PATCH 0/2] add support of u2phy for rk3328

[RESEND PATCH 0/2] add support of u2phy for rk3328

[Meng Dongyang]

Resend this series to involve maintainer of phy documentation

The config information of RK3328 about address and port property
is different from before platform. So add config information in the
data of match table and documentation of the device tree bindings
of u2phy.

Meng Dongyang (2):
  Documentation: bindings: add DT documentation for u2phy and u2phy grf
  phy: rockchip-inno-usb2: add support of u2phy for rk3328

 .../bindings/phy/phy-rockchip-inno-usb2.txt        | 47 ++++++++++++++++++++++
 drivers/phy/phy-rockchip-inno-usb2.c               | 21 ++++++++++
 2 files changed, 68 insertions(+)

-- 
1.9.1

[RESEND PATCH 0/2] add support of u2phy for rk3328

[Meng Dongyang]

Resend this series to involve maintainer of phy documentation

The config information of RK3328 about address and port property
is different from before platform. So add config information in the
data of match table and documentation of the device tree bindings
of u2phy.

Meng Dongyang (2):
  Documentation: bindings: add DT documentation for u2phy and u2phy grf
  phy: rockchip-inno-usb2: add support of u2phy for rk3328

 .../bindings/phy/phy-rockchip-inno-usb2.txt        | 47 ++++++++++++++++++++++
 drivers/phy/phy-rockchip-inno-usb2.c               | 21 ++++++++++
 2 files changed, 68 insertions(+)

-- 
1.9.1

[RESEND PATCH 1/2] Documentation: bindings: add DT documentation for u2phy and u2phy grf

[Meng Dongyang]

Due to the u2phy registers are separated from general grf, we need to
add u2phy grf node and place u2phy node in it. And on some platform,
the 480m clock may need to assign clock parent in dts in stead of
clock driver. So this patch add u2phy grf node and property of
assigned-clocks and assigned-clock-parents to assign parent for 480m
clock.

Signed-off-by: Meng Dongyang <daniel.meng-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
 .../bindings/phy/phy-rockchip-inno-usb2.txt        | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
index 3c29c77..dda9f22 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
@@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
 
 Required properties (phy (parent) node):
  - compatible : should be one of the listed compatibles:
+	* "rockchip,rk3328-usb2phy"
 	* "rockchip,rk3366-usb2phy"
 	* "rockchip,rk3399-usb2phy"
  - reg : the address offset of grf for usb-phy configuration.
@@ -11,6 +12,11 @@ Required properties (phy (parent) node):
 Optional properties:
  - clocks : phandle + phy specifier pair, for the input clock of phy.
  - clock-names : input clock name of phy, must be "phyclk".
+ - assigned-clocks : phandle of usb 480m clock.
+ - assigned-clock-parents : parent of usb 480m clock, select between
+		 usb-phy output 480m and xin24m.
+		 Refer to clk/clock-bindings.txt for generic clock
+		 consumer properties.
 
 Required nodes : a sub-node is required for each port the phy provides.
 		 The sub-node name is used to identify host or otg port,
@@ -62,3 +68,44 @@ grf: syscon@ff770000 {
 		};
 	};
 };
+
+Required properties (usb2phy grf node):
+ - compatible : should be one of the listed compatibles:
+		"rockchip,rk3328-usb2phy-grf", "syscon", "simple-mfd";
+ - reg : the address offset of grf for usb-phy configuration.
+ - #address-cells : should be 1.
+ - #size-cells : should be 1.
+
+Required nodes : a sub-node is required for the phy provides.
+		 The sub-node name is used to identify each phy,
+		 and shall be the following entries:
+
+Example:
+
+usb2phy_grf: syscon@ff450000 {
+	compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
+		     "simple-mfd";
+	reg = <0x0 0xff450000 0x0 0x10000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	u2phy: usb2-phy@100 {
+		compatible = "rockchip,rk3328-usb2phy";
+		reg = <0x100 0x10>;
+		clocks = <&xin24m>;
+		clock-names = "phyclk";
+		#clock-cells = <0>;
+		assigned-clocks = <&cru USB480M>;
+		assigned-clock-parents = <&u2phy>;
+		clock-output-names = "usb480m_phy";
+		status = "disabled";
+
+		u2phy_host: host-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			status = "disabled";
+		};
+	};
+};
+
-- 
1.9.1

[RESEND PATCH 1/2] Documentation: bindings: add DT documentation for u2phy and u2phy grf

[Meng Dongyang]

Due to the u2phy registers are separated from general grf, we need to
add u2phy grf node and place u2phy node in it. And on some platform,
the 480m clock may need to assign clock parent in dts in stead of
clock driver. So this patch add u2phy grf node and property of
assigned-clocks and assigned-clock-parents to assign parent for 480m
clock.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
---
 .../bindings/phy/phy-rockchip-inno-usb2.txt        | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
index 3c29c77..dda9f22 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
@@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
 
 Required properties (phy (parent) node):
  - compatible : should be one of the listed compatibles:
+	* "rockchip,rk3328-usb2phy"
 	* "rockchip,rk3366-usb2phy"
 	* "rockchip,rk3399-usb2phy"
  - reg : the address offset of grf for usb-phy configuration.
@@ -11,6 +12,11 @@ Required properties (phy (parent) node):
 Optional properties:
  - clocks : phandle + phy specifier pair, for the input clock of phy.
  - clock-names : input clock name of phy, must be "phyclk".
+ - assigned-clocks : phandle of usb 480m clock.
+ - assigned-clock-parents : parent of usb 480m clock, select between
+		 usb-phy output 480m and xin24m.
+		 Refer to clk/clock-bindings.txt for generic clock
+		 consumer properties.
 
 Required nodes : a sub-node is required for each port the phy provides.
 		 The sub-node name is used to identify host or otg port,
@@ -62,3 +68,44 @@ grf: syscon@ff770000 {
 		};
 	};
 };
+
+Required properties (usb2phy grf node):
+ - compatible : should be one of the listed compatibles:
+		"rockchip,rk3328-usb2phy-grf", "syscon", "simple-mfd";
+ - reg : the address offset of grf for usb-phy configuration.
+ - #address-cells : should be 1.
+ - #size-cells : should be 1.
+
+Required nodes : a sub-node is required for the phy provides.
+		 The sub-node name is used to identify each phy,
+		 and shall be the following entries:
+
+Example:
+
+usb2phy_grf: syscon@ff450000 {
+	compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
+		     "simple-mfd";
+	reg = <0x0 0xff450000 0x0 0x10000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	u2phy: usb2-phy@100 {
+		compatible = "rockchip,rk3328-usb2phy";
+		reg = <0x100 0x10>;
+		clocks = <&xin24m>;
+		clock-names = "phyclk";
+		#clock-cells = <0>;
+		assigned-clocks = <&cru USB480M>;
+		assigned-clock-parents = <&u2phy>;
+		clock-output-names = "usb480m_phy";
+		status = "disabled";
+
+		u2phy_host: host-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			status = "disabled";
+		};
+	};
+};
+
-- 
1.9.1

Re: [RESEND PATCH 1/2] Documentation: bindings: add DT documentation for u2phy and u2phy grf

[Heiko Stuebner]

Hi Daniel,

Am Mittwoch, 1. März 2017, 18:34:22 CET schrieb Meng Dongyang:
> Due to the u2phy registers are separated from general grf, we need to
> add u2phy grf node and place u2phy node in it. And on some platform,
> the 480m clock may need to assign clock parent in dts in stead of
> clock driver. So this patch add u2phy grf node and property of
> assigned-clocks and assigned-clock-parents to assign parent for 480m
> clock.
> 
> Signed-off-by: Meng Dongyang <daniel.meng-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
>  .../bindings/phy/phy-rockchip-inno-usb2.txt        | 47
> ++++++++++++++++++++++ 1 file changed, 47 insertions(+)
> 
> diff --git
> a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt index
> 3c29c77..dda9f22 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> @@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
> 
>  Required properties (phy (parent) node):
>   - compatible : should be one of the listed compatibles:
> +	* "rockchip,rk3328-usb2phy"
>  	* "rockchip,rk3366-usb2phy"
>  	* "rockchip,rk3399-usb2phy"
>   - reg : the address offset of grf for usb-phy configuration.
> @@ -11,6 +12,11 @@ Required properties (phy (parent) node):
>  Optional properties:
>   - clocks : phandle + phy specifier pair, for the input clock of phy.
>   - clock-names : input clock name of phy, must be "phyclk".
> + - assigned-clocks : phandle of usb 480m clock.
> + - assigned-clock-parents : parent of usb 480m clock, select between
> +		 usb-phy output 480m and xin24m.
> +		 Refer to clk/clock-bindings.txt for generic clock
> +		 consumer properties.
> 
>  Required nodes : a sub-node is required for each port the phy provides.
>  		 The sub-node name is used to identify host or otg port,

this block looks good


> @@ -62,3 +68,44 @@ grf: syscon@ff770000 {
>  		};
>  	};
>  };


> +
> +Required properties (usb2phy grf node):
> + - compatible : should be one of the listed compatibles:
> +		"rockchip,rk3328-usb2phy-grf", "syscon", "simple-mfd";
> + - reg : the address offset of grf for usb-phy configuration.
> + - #address-cells : should be 1.
> + - #size-cells : should be 1.
> +
> +Required nodes : a sub-node is required for the phy provides.
> +		 The sub-node name is used to identify each phy,
> +		 and shall be the following entries:
> +
> +Example:
> +
> +usb2phy_grf: syscon@ff450000 {
> +	compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
> +		     "simple-mfd";
> +	reg = <0x0 0xff450000 0x0 0x10000>;
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	u2phy: usb2-phy@100 {
> +		compatible = "rockchip,rk3328-usb2phy";
> +		reg = <0x100 0x10>;
> +		clocks = <&xin24m>;
> +		clock-names = "phyclk";
> +		#clock-cells = <0>;
> +		assigned-clocks = <&cru USB480M>;
> +		assigned-clock-parents = <&u2phy>;
> +		clock-output-names = "usb480m_phy";
> +		status = "disabled";
> +
> +		u2phy_host: host-port {
> +			#phy-cells = <0>;
> +			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "linestate";
> +			status = "disabled";
> +		};
> +	};
> +};
> +

please don't add this here.

I've looked it up in the TRM and usb2phy-grf are still just "General Register 
Files", which also include some other registers besides this phy - so 
structure-wise this is good.
But please document the new grf-compatible in the regular
Documentation/devicetree/bindings/soc/rockchip/grf.txt .

And there is no need for a duplicate example, as it is the same structure as 
before, so maybe just add the assigned-clocks parts to the existing example.


Thanks
Heiko

Re: [RESEND PATCH 1/2] Documentation: bindings: add DT documentation for u2phy and u2phy grf

[Heiko Stuebner]

Hi Daniel,

Am Mittwoch, 1. März 2017, 18:34:22 CET schrieb Meng Dongyang:
> Due to the u2phy registers are separated from general grf, we need to
> add u2phy grf node and place u2phy node in it. And on some platform,
> the 480m clock may need to assign clock parent in dts in stead of
> clock driver. So this patch add u2phy grf node and property of
> assigned-clocks and assigned-clock-parents to assign parent for 480m
> clock.
> 
> Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
> ---
>  .../bindings/phy/phy-rockchip-inno-usb2.txt        | 47
> ++++++++++++++++++++++ 1 file changed, 47 insertions(+)
> 
> diff --git
> a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt index
> 3c29c77..dda9f22 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> @@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
> 
>  Required properties (phy (parent) node):
>   - compatible : should be one of the listed compatibles:
> +	* "rockchip,rk3328-usb2phy"
>  	* "rockchip,rk3366-usb2phy"
>  	* "rockchip,rk3399-usb2phy"
>   - reg : the address offset of grf for usb-phy configuration.
> @@ -11,6 +12,11 @@ Required properties (phy (parent) node):
>  Optional properties:
>   - clocks : phandle + phy specifier pair, for the input clock of phy.
>   - clock-names : input clock name of phy, must be "phyclk".
> + - assigned-clocks : phandle of usb 480m clock.
> + - assigned-clock-parents : parent of usb 480m clock, select between
> +		 usb-phy output 480m and xin24m.
> +		 Refer to clk/clock-bindings.txt for generic clock
> +		 consumer properties.
> 
>  Required nodes : a sub-node is required for each port the phy provides.
>  		 The sub-node name is used to identify host or otg port,

this block looks good


> @@ -62,3 +68,44 @@ grf: syscon@ff770000 {
>  		};
>  	};
>  };


> +
> +Required properties (usb2phy grf node):
> + - compatible : should be one of the listed compatibles:
> +		"rockchip,rk3328-usb2phy-grf", "syscon", "simple-mfd";
> + - reg : the address offset of grf for usb-phy configuration.
> + - #address-cells : should be 1.
> + - #size-cells : should be 1.
> +
> +Required nodes : a sub-node is required for the phy provides.
> +		 The sub-node name is used to identify each phy,
> +		 and shall be the following entries:
> +
> +Example:
> +
> +usb2phy_grf: syscon@ff450000 {
> +	compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
> +		     "simple-mfd";
> +	reg = <0x0 0xff450000 0x0 0x10000>;
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	u2phy: usb2-phy@100 {
> +		compatible = "rockchip,rk3328-usb2phy";
> +		reg = <0x100 0x10>;
> +		clocks = <&xin24m>;
> +		clock-names = "phyclk";
> +		#clock-cells = <0>;
> +		assigned-clocks = <&cru USB480M>;
> +		assigned-clock-parents = <&u2phy>;
> +		clock-output-names = "usb480m_phy";
> +		status = "disabled";
> +
> +		u2phy_host: host-port {
> +			#phy-cells = <0>;
> +			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "linestate";
> +			status = "disabled";
> +		};
> +	};
> +};
> +

please don't add this here.

I've looked it up in the TRM and usb2phy-grf are still just "General Register 
Files", which also include some other registers besides this phy - so 
structure-wise this is good.
But please document the new grf-compatible in the regular
Documentation/devicetree/bindings/soc/rockchip/grf.txt .

And there is no need for a duplicate example, as it is the same structure as 
before, so maybe just add the assigned-clocks parts to the existing example.


Thanks
Heiko

[RESEND PATCH 2/2] phy: rockchip-inno-usb2: add support of u2phy for rk3328

[Meng Dongyang]

Add u2phy config information in the data of match table for
rk3328.

Signed-off-by: Meng Dongyang <daniel.meng-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
 drivers/phy/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 4ea95c2..cf2729c 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -1141,6 +1141,26 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	return ret;
 }
 
+static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.phy_tuning	= rk3328_usb2phy_tuning,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 15, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
 	{
 		.reg = 0x700,
@@ -1223,6 +1243,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 };
 
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
+	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
 	{}
-- 
1.9.1

[RESEND PATCH 2/2] phy: rockchip-inno-usb2: add support of u2phy for rk3328

[Meng Dongyang]

Add u2phy config information in the data of match table for
rk3328.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
---
 drivers/phy/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 4ea95c2..cf2729c 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -1141,6 +1141,26 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	return ret;
 }
 
+static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.phy_tuning	= rk3328_usb2phy_tuning,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 15, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
 	{
 		.reg = 0x700,
@@ -1223,6 +1243,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 };
 
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
+	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
 	{}
-- 
1.9.1

Re: [RESEND PATCH 2/2] phy: rockchip-inno-usb2: add support of u2phy for rk3328

[Heiko Stuebner]

Am Mittwoch, 1. März 2017, 18:34:23 CET schrieb Meng Dongyang:
> Add u2phy config information in the data of match table for
> rk3328.
> 
> Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

in general looks good, so
Reviewed-by: Heiko Stuebner <heiko@sntech.de>

one question below


>  drivers/phy/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/phy/phy-rockchip-inno-usb2.c
> b/drivers/phy/phy-rockchip-inno-usb2.c index 4ea95c2..cf2729c 100644
> --- a/drivers/phy/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/phy-rockchip-inno-usb2.c
> @@ -1141,6 +1141,26 @@ static int rockchip_usb2phy_probe(struct
> platform_device *pdev) return ret;
>  }
> 
> +static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
> +	{
> +		.reg = 0x100,
> +		.num_ports	= 2,
> +		.phy_tuning	= rk3328_usb2phy_tuning,
> +		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_HOST] = {
> +				.phy_sus	= { 0x104, 15, 0, 0, 0x1d1 },
> +				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
> +				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
> +				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
> +				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
> +				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
> +			}
> +		},
> +	},

The TRM also talks about the otg-port, so is there a reason for not including 
it here?


Heiko

> +	{ /* sentinel */ }
> +};
> +
>  static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
>  	{
>  		.reg = 0x700,
> @@ -1223,6 +1243,7 @@ static int rockchip_usb2phy_probe(struct
> platform_device *pdev) };
> 
>  static const struct of_device_id rockchip_usb2phy_dt_match[] = {
> +	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
>  	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
>  	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
>  	{}

Re: [RESEND PATCH 2/2] phy: rockchip-inno-usb2: add support of u2phy for rk3328

[kbuild test robot]

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Hi Meng,

[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.10 next-20170302]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Meng-Dongyang/Documentation-bindings-add-DT-documentation-for-u2phy-and-u2phy-grf/20170302-223541
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: xtensa-allmodconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=xtensa 

All errors (new ones prefixed by >>):

>> drivers/phy/phy-rockchip-inno-usb2.c:1143:3: error: unknown field 'phy_tuning' specified in initializer
      .phy_tuning = rk3328_usb2phy_tuning,
      ^
>> drivers/phy/phy-rockchip-inno-usb2.c:1143:17: error: 'rk3328_usb2phy_tuning' undeclared here (not in a function)
      .phy_tuning = rk3328_usb2phy_tuning,
                    ^

vim +/phy_tuning +1143 drivers/phy/phy-rockchip-inno-usb2.c

  1137	}
  1138	
  1139	static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
  1140		{
  1141			.reg = 0x100,
  1142			.num_ports	= 2,
> 1143			.phy_tuning	= rk3328_usb2phy_tuning,
  1144			.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
  1145			.port_cfgs	= {
  1146				[USB2PHY_PORT_HOST] = {

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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Re: [RESEND PATCH 2/2] phy: rockchip-inno-usb2: add support of u2phy for rk3328

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 1662 bytes --]

Hi Meng,

[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.10 next-20170302]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Meng-Dongyang/Documentation-bindings-add-DT-documentation-for-u2phy-and-u2phy-grf/20170302-223541
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: xtensa-allmodconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=xtensa 

All errors (new ones prefixed by >>):

>> drivers/phy/phy-rockchip-inno-usb2.c:1143:3: error: unknown field 'phy_tuning' specified in initializer
      .phy_tuning = rk3328_usb2phy_tuning,
      ^
>> drivers/phy/phy-rockchip-inno-usb2.c:1143:17: error: 'rk3328_usb2phy_tuning' undeclared here (not in a function)
      .phy_tuning = rk3328_usb2phy_tuning,
                    ^

vim +/phy_tuning +1143 drivers/phy/phy-rockchip-inno-usb2.c

  1137	}
  1138	
  1139	static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
  1140		{
  1141			.reg = 0x100,
  1142			.num_ports	= 2,
> 1143			.phy_tuning	= rk3328_usb2phy_tuning,
  1144			.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
  1145			.port_cfgs	= {
  1146				[USB2PHY_PORT_HOST] = {

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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