Re: sysmips call and glibc atomic set

[Joe deBlaquiere <jadb@redhat.com>]

Ralf, firstly, thank you for the answers :)

Ralf Baechle wrote:

> 
> Ok, but since the kernel disables MIPS III you're limited to MIPS II anyway ...
> 

This makes sense...

> 
> 
> Read the ISA manual; sc will fail if the LL-bit in c0_status is cleared
> which will be cleared when the interrupt returns using the eret instruction.
> 

I tried to find a MIPSIII manual from mips.com but all I could find was 
mips32 and mips64 (which are not the same as MIPSII/MIPSIII/MIPSIV).

> 
> 
> Not having swap doesn't mean you're safe.  Think of any kind of previously
> unmapped page.
> 

Is there a reason why it doesn't just force that page to be mapped first?

> 
>> QUESTION 2) Wouldn't it be better to pass back the initial value of 
>> *arg1 in *arg3 and return zero or negative error code?
> 
> 
> The semantics of this syscall were previously defined by Risc/OS and later
> on continued to be used by IRIX.
> 
> 
>> 	case MIPS_ATOMIC_SET: {
>> 		/* This is broken in case of page faults and SMP ...
>> 		    Risc/OS faults after maximum 20 tries with EAGAIN.  */
>> 		unsigned int tmp;
>> 
>> 		p = (int *) arg1;
>> 		errno = verify_area(VERIFY_WRITE, p, sizeof(*p));
>> 		if (errno)
>> 			return errno;
>> 		errno = 0;
>> 		save_and_cli(flags);
>> 		errno |= __get_user(tmp, p);
>> 		errno |= __put_user(arg2, p);
>> 		restore_flags(flags);
>> 
>> 		if (errno)
>> 			return tmp;
>> 
>> 		return tmp;             /* This is broken ...  */
>>          }
>> 
>> QUESTION 3) I notice that the code for this particular case of sysmips 
>> has changed recently. The old code looked more like the 'll/sc' version 
>> of glibc above. I would think that the 'll/sc' code would be better on 
>> SMP systems.
> 
> 
> Don't think about SMP without ll/sc.  There's algorithems available for
> that but their complexity leaves them a unpractical, theoretical construct.
> 
> 
>> Is there a good reason why this reverted?
> 

Looking at 2.4.0-test5 I see the ll/sc code, but -test12 doesn't use it. 
I was just curious at why it was taken out.

> 
> Above code will break if the old content of memory has bit 31 set or you take
> pagefaults.  The latter problem is a problem even on UP - think multi-
> threading.
> 
> Finally, post such things to one of the MIPS-related mailing lists.  If
> you're unlucky nobody of the MIPS'ers might see your posting on l-k.
> 
>   Ralf


-- 
Joe deBlaquiere
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