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From: Martin Dalecki <dalecki@evision-ventures.com>
To: Jeff Garzik <jgarzik@mandrakesoft.com>
Cc: John Langford <jcl@cs.cmu.edu>,
	Alan Cox <alan@lxorguk.ukuu.org.uk>,
	linux-kernel@vger.kernel.org, ahaas@neosoft.com,
	dave@zarzycki.org, ben.de.rydt@pandora.be
Subject: Re: BUG: 2.4.18 & ALI15X3 DMA hang on boot
Date: Sat, 23 Mar 2002 14:47:05 +0100	[thread overview]
Message-ID: <3C9C8759.2000704@evision-ventures.com> (raw)
In-Reply-To: <200203221956.g2MJuhK32671@gs176.sp.cs.cmu.edu> <3C9C7EF9.8020307@evision-ventures.com> <3C9C868D.5030406@mandrakesoft.com>

Jeff Garzik wrote:
> Martin Dalecki wrote:
> 
>> John Langford wrote:
>>
>>> I went nuts with printk statements and managed to isolate the hang to
>>> one particular line of code.  The final printk in this code fragment
>>> never gets executed.                 } else if (m5229_revision >= 
>>> 0xC3) {
>>>                 /*
>>>                          * 1553/1535 (m1533, 0x79, bit 1)
>>>                          */
>>>                         printk("ata66_ali15x3           } else if 
>>> (m5229_revisi\on >= 0xC3) {\n");
>>>                         pci_write_config_byte(isa_dev, 0x79, tmpbyte 
>>> | 0x02);
>>
>>
>>
>> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 
>>
>>
>> pci_write_config to isa_dev???? This looks at least suspicious.
>> You may very well check whatever isa_dev is trully a PCI device
>> handle or just some random IO base for ISA bus!
> 
> 
> 
> Nope, look at the code and comments around "isa_dev"   :)

OK OK - this was just a blind guess without looking at the actual
code :-).

> isa_dev is the PCI device structure for the ALi ISA bridge... very 
> definitely a PCI device.

Sure i know.

> some background:
> It is normal in some situations that you need to examine or set PCI 
> config registers for the ISA bridge, when dealing with some IDE 
> motherboards.  The southbridge is typically the chip that actually 
> implements IDE on your motherboard.  Even though IDE is normally 
> exported as a separate PCI device, you still have to deal with the ATA 
> register blocks at hardcoded legacy ISA addresses 0x1f0 and 0x170.  So, 
> when you write the ATA registers for channel 0 or channel 1, you are 
> writing to 0x1f? or 0x17?, the ISA bridge is most likely the portion of 
> the southbridge chip actually decoding those addresses for you.

Thank you for elaborating on this, but I did already know this...


  reply	other threads:[~2002-03-23 13:48 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-03-21 20:47 BUG: 2.4.18 & ALI15X3 DMA hang on boot John Langford
2002-03-21 22:17 ` Alan Cox
2002-03-21 22:41   ` John Langford
2002-03-22  0:47   ` Dave Zarzycki
2002-03-22  1:43     ` John Langford
2002-03-22 20:46     ` John Langford
2002-03-23 13:25       ` Martin Dalecki
2002-03-23 14:19         ` John Langford
2002-03-23 14:22           ` Martin Dalecki
2002-03-23 14:51             ` Art Haas
2002-03-23 19:49             ` Dave Zarzycki
2002-03-24 22:47               ` Martin Dalecki
2002-03-22 10:55   ` Martin Dalecki
2002-03-22 11:24     ` Andre Hedrick
2002-03-22 11:50       ` Martin Dalecki
2002-03-22 15:59         ` John Langford
2002-03-23  5:16         ` Andre Hedrick
2002-03-23 13:05           ` Martin Dalecki
2002-03-25  2:26             ` Andre Hedrick
2002-03-22 13:25       ` Jens Axboe
2002-03-22 14:49       ` Alan Cox
2002-03-22 20:53         ` Andre Hedrick
2002-03-22 21:52           ` Andre Hedrick
2002-03-23  3:51           ` Ian Molton
2002-03-23  3:57             ` Ian Molton
2002-03-22 19:56     ` John Langford
2002-03-22 21:53       ` Vojtech Pavlik
2002-03-23 13:11       ` Martin Dalecki
2002-03-23 13:43         ` Jeff Garzik
2002-03-23 13:47           ` Martin Dalecki [this message]
2002-03-23 20:23         ` Vojtech Pavlik
2002-03-23 21:43         ` Andre Hedrick
2002-03-24 22:50           ` Martin Dalecki
2002-03-25  1:26             ` Andre Hedrick
2002-03-25  9:24               ` Vojtech Pavlik
2002-03-25  9:40                 ` Andre Hedrick

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