Performance on PPC8xx using string and multiple load instructions?

Performance on PPC8xx using string and multiple load instructions?

[Conn Clark]

Hello,

	Does anyone know how using the -mstring and -mmultiple GCC
code optimization switches affect performance on the PPC8xx ? The
book I have on PPC assembly says the use of the string and
load-multiple instrutions may be signifigantly slower than the
multiple instruction equivalent on some processors. It does not tell
me which processors or why. I think it might be due to ther fact
that multiple instructions can be paired in multi instruction
pipelined chips. Since the 8xx has only a sigle pipeline I was
wondering if this was the case.


	In the kernel source they use the -mmultiple and -mstring
switches in the architecture dependant code. This may be done to
reduce codeIf these are
instructions signifigantly slower on some processors is this a good
idea to have them as default optimizations for all processors?

	If anybody ever benchmarked code with these instructions
on an 8xx processor or other processor I would like to see the
results.

Thanks in advance

	Conn


--

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  If you live at home long enough, your parents will move out.
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Conn Clark
Engineering Stooge				clark@esteem.com
Electronic Systems Technology Inc.		www.esteem.com


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