[U-Boot-Users] How To Use gdb w/ u-boot source tree

[U-Boot-Users] How To Use gdb w/ u-boot source tree

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNOEKACDAA.jwalden@digitalatlantic.com>
Jerry Walden wrote:
>
> Sorry - I did not make myself clear -
> Instead of using gdb as a command line debugger, I was hoping to
> use an IDE style debugger that can show source (comments etc), so
> I can do source level debugging.

That does not make any difference, or does it? fro example,  use  DDD
as  GUI  frontend  with  GDB  - but it's still GDB that will actually
perform the debugging, so why shoud it behave differently?

[Please, keep the list Cc:ed for the benefit of other readers...]

Best regards, and a Happy New Year!

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Time is fluid ... like a river with currents, eddies, backwash.
	-- Spock, "The City on the Edge of Forever", stardate 3134.0

[U-Boot-Users] How To Use gdb w/ u-boot source tree

[Jerry Walden]

I am quite new with these tools, it looked to me like gdb is just a
command line debugger, and cannot do source level debugging without
some other front end on top of it.

I must have made some incorrect assumptions.

Thanks

Jerry

-----Original Message-----
From: wd@denx.de [mailto:wd at denx.de]
Sent: Tuesday, December 31, 2002 12:46 PM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] How To Use gdb w/ u-boot source tree 


In message <EGEGIJHKDKJGAJMGIDPNOEKACDAA.jwalden@digitalatlantic.com>
Jerry Walden wrote:
>
> Sorry - I did not make myself clear -
> Instead of using gdb as a command line debugger, I was hoping to
> use an IDE style debugger that can show source (comments etc), so
> I can do source level debugging.

That does not make any difference, or does it? fro example,  use  DDD
as  GUI  frontend  with  GDB  - but it's still GDB that will actually
perform the debugging, so why shoud it behave differently?

[Please, keep the list Cc:ed for the benefit of other readers...]

Best regards, and a Happy New Year!

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Time is fluid ... like a river with currents, eddies, backwash.
	-- Spock, "The City on the Edge of Forever", stardate 3134.0

[U-Boot-Users] How To Use gdb w/ u-boot source tree

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNOEKFCDAA.jwalden@digitalatlantic.com> you wrote:
> I am quite new with these tools, it looked to me like gdb is just a
> command line debugger, and cannot do source level debugging without
> some other front end on top of it.

The term "command line debugger" makes no sense to me. 

GDB is a full-fledged source level debugger which uses a command line
interface. Of course you can do _all_ source  level  debugging  using
just  GDB  without  any  of  the  frontends  that provide things like
graphical user interfaces. Usually you can do MORE things,  and  work
faster with plain GDB (assuming that you know your tools).

Best regards, and a Happy New Year!

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
I perceive a possibility of an immediate  chronological  sequence  of
events which includes a violence.
                        - Terry Pratchett, _The Dark Side of the Sun_

[U-Boot-Users] PPC405GP - uboot - can't get past stackloop

[Jerry Walden]

Greetings:

	I have managed to learn how to use GDB, and DDD with the BDI-2000 to start
to debug
      my bootrom.  I can load source, and symbols etc...

	So - here is where I am stuck.  First, I am using u-boot with the
WALNUT405GP config.
	My board is a custom board with a 405GPr on it.  The memory map looks the
same as
	the development kit (or at least we tried our best).

	Now - I start tracing from the _start, and I get to:

	..stackloop
		stwu	r4, -4(r2)
		bdnz	..stackloop



	If I set a breakpoint after the bdnz, the debugger never breaks - it is
though it is in
	an infinite loop.

	If I "interrupt" in DDD, the following message is displayed:

	Program received signal SIGSTOP, Stopped(Signal)
		0x00000700 in ??()

	Any hint as to what might be going wrong?

	Thanks

	Jerry

[U-Boot-Users] PPC405GP - uboot - can't get past stackloop

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNEEAECEAA.jwalden@digitalatlantic.com> you wrote:
> 
> 	Now - I start tracing from the _start, and I get to:
> 
> 	..stackloop
> 		stwu	r4, -4(r2)
> 		bdnz	..stackloop

Stop right before "..stackloop" and verify that  the  stack  area  is
really  readable  and  writable, i. e. check if your initial RAM area
(in data cache or OCM ?) is configured correctly and working.

> 	If I set a breakpoint after the bdnz, the debugger never breaks - it is
> though it is in
> 	an infinite loop.

...because the CPU never gets there, because it's taking an exception
before?

> 	If I "interrupt" in DDD, the following message is displayed:
> 
> 	Program received signal SIGSTOP, Stopped(Signal)
> 		0x00000700 in ??()

Right, an exception happened.

> 	Any hint as to what might be going wrong?

Your initial RAM area is configured incorrectly and does not work?


Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
We are drowning in information but starved for knowledge.
                                         -- John Naisbitt, Megatrends

[U-Boot-Users] PPC405GP - uboot - can't get past stackloop

[Jerry Walden]

Yes - you are absolutly correct.
Somewhere after about 1000 iterations of placing 0xdeaddead into what is
supposed to be the temporary stack frame, I get a machine exception.

So - now I know my memory is not configured correctly.  My hardware guy is
not
here, however I see that he has defined 64MB starting at 0x70000000.
However if
I change the value in my config file (CFG_INIT_RAM_ADDR) from 0x4000000 to
0x7000000
I get an immediate fault the first time a store is attempted in that
region - so
r4 has something like 0x70001f48 in it, and I get the fault the very first
time
I execute the stwu instruction.  However with the BDI, I can change memory
at 0x7000000 - 0x7fffffff all day long without a complaint.  So obviously
the
code I am running at the very start of start.S is not setting something up
properly.  Question is, what is it?

-----Original Message-----
From: wd@denx.de [mailto:wd at denx.de]
Sent: Sunday, January 05, 2003 3:03 PM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] PPC405GP - uboot - can't get past stackloop


In message <EGEGIJHKDKJGAJMGIDPNEEAECEAA.jwalden@digitalatlantic.com> you
wrote:
>
> 	Now - I start tracing from the _start, and I get to:
>
> 	..stackloop
> 		stwu	r4, -4(r2)
> 		bdnz	..stackloop

Stop right before "..stackloop" and verify that  the  stack  area  is
really  readable  and  writable, i. e. check if your initial RAM area
(in data cache or OCM ?) is configured correctly and working.

> 	If I set a breakpoint after the bdnz, the debugger never breaks - it is
> though it is in
> 	an infinite loop.

...because the CPU never gets there, because it's taking an exception
before?

> 	If I "interrupt" in DDD, the following message is displayed:
>
> 	Program received signal SIGSTOP, Stopped(Signal)
> 		0x00000700 in ??()

Right, an exception happened.

> 	Any hint as to what might be going wrong?

Your initial RAM area is configured incorrectly and does not work?


Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
We are drowning in information but starved for knowledge.
                                         -- John Naisbitt, Megatrends

[U-Boot-Users] PPC405GP - uboot - can't get past stackloop

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNMEAHCEAA.jwalden@digitalatlantic.com> you wrote:
> Yes - you are absolutly correct.

Been there myself often enough before ;-)

> Somewhere after about 1000 iterations of placing 0xdeaddead into what is
> supposed to be the temporary stack frame, I get a machine exception.
> 
> So - now I know my memory is not configured correctly.  My hardware guy is

Probably not your _memory_.

> not
> here, however I see that he has defined 64MB starting at 0x70000000.

Ignore that. RAM should always start at 0x0000.

> However if
> I change the value in my config file (CFG_INIT_RAM_ADDR) from 0x4000000 to
> 0x7000000

Be careful! The initial memory is NOT in  RAM!!!  It  used  the  data
cache  or OCM - don't know the design of your board. If in doubt, use
the data cache.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
This all sounds complicated, but it mostly does excatly what you  ex-
pect. It's just difficult for us to explain what you expect...
                       - L. Wall & R. L. Schwartz, _Programming Perl_

[U-Boot-Users] PPC405GP - uboot - can't get past stackloop

[Jerry Walden]

>Be careful! The initial memory is NOT in  RAM!!!  It  used  the  data
>cache  or OCM - don't know the design of your board. If in doubt, use
>the data cache.

[U-Boot-Users] PPC405GP - uboot - can't get past stackloop

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNCEBDCEAA.jwalden@digitalatlantic.com> you wrote:
> >Be careful! The initial memory is NOT in  RAM!!!  It  used  the  data
> >cache  or OCM - don't know the design of your board. If in doubt, use
> >the data cache.

Actually you must  be  using  the  data  cache  for  initial  data  -
otherwise you would not enter "stackloop" at all.

> So if I read correctly, the OCM for the 405GP is not a function of how the
> board is "wired", but how I set it up programmatically.  However it seems
> that you are indicating that it depends on the design of my board.  Can
> you please help provide clarification.

Sorry for not being clear - for me the design  of  a  board  inclused
hardware  and software issues - for example the memory map, which may
be dictated by hardware (address decoders  etc.),  but  often  is  at
least partially adjustable by software.

Did you verify that your stack space (in data cache) can be read  and
written?

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
An Elephant is a mouse with an Operating System.              - Knuth

[U-Boot-Users] relocate code

[Jerry Walden]

Greetings:

It looks like I have made enough progress in programming the various
registers of the PPC405GPr to get
"relocate_code".  My problem is now this - I continue after the "return" in
relocate_code (which I
realize is not meant to return).  So now I type cont, and check to see if
there is any action on the
UART, and there is none - so I tell the BDI to halt, and the pc is at 0x70C.

How can I trace down a problem, after "relocate_code" is complete?

Thanks

Jerry

[U-Boot-Users] relocate code

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNGEEHCFAA.jwalden@digitalatlantic.com> you wrote:
> 
> How can I trace down a problem, after "relocate_code" is complete?

Fix your RAM init sequence.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
"Flight Reservation systems decide whether or not you exist. If  your
information  isn't in their database, then you simply don't get to go
anywhere."                                            - Arthur Miller

[U-Boot-Users] RE: relocate code

[Jerry Walden]

Hello:

I get a program exception after "relocate_code" "returns" -
I realize this means that I have not programmed my SDRAM 
properly, or there is a fundamental hardware problem, however
what is the next function that is supposed to execute after
"relocate_code"?

[U-Boot-Users] RE: relocate code

[Chris Hallinan]

The code continues at the label in_ram: (for 4xx, at least) and
eventually calls board_init_r.  (Ram-based board init, as opposed to
flash-based.)

-Chris Hallinan
DS4.COM, Inc.


> -----Original Message-----
> From: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]On
> Behalf Of Jerry
> Walden
> Sent: Tuesday, January 21, 2003 10:21 AM
> To: u-boot-users at lists.sourceforge.net
> Subject: [U-Boot-Users] RE: relocate code
>
>
>
> Hello:
>
> I get a program exception after "relocate_code" "returns" -
> I realize this means that I have not programmed my SDRAM
> properly, or there is a fundamental hardware problem, however
> what is the next function that is supposed to execute after
> "relocate_code"?
>
>
> -------------------------------------------------------
> This SF.net email is sponsored by: Scholarships for Techies!
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>

[U-Boot-Users] Memory Bank x (nothingness)?

[Jerry Walden]

Greetings -

I have a custom PPC405GPr board, and I am trying to bring u-boot up on it.

	/*-----------------------------------------------------------------------
*/
	/* Setup temporary stack in DCACHE or OCM if needed for SDRAM SPD. */
	/*-----------------------------------------------------------------------
*/
	/*-----------------------------------------------------------------------
*/
	/* Memory Bank x (nothingness) initialization 1GB+64MEG */
	/* used as temporary stack pointer for stage0  */
	/*-----------------------------------------------------------------------
*/
	li	r4,PBxAP
	mtdcr	ebccfga,r4
	lis	r4,0x0380
	ori	r4,r4,0x0480
	mtdcr	ebccfgd,r4

The Walnut config has CFG_INIT_DCACHE_INIT_CS = 4

In our custom board do not have anything attached to bank 4 -

Does DCACHE for the processors cache or programmers private use?
How can I (or how should I) re-write/add/subtract the above code to
accomplish
what it is trying to do (which is not clear to me).

Thanks

Jerry Walden

[U-Boot-Users] RE: More On Memory Bank x (nothingness)?

[Jerry Walden]

To add more detail to my previous question - The Walnut config has
CFG_INIT_DCACHE_INIT_CS = 4, however if we look at the schematic for the
Walnut board we do not see anything hooked up to the peripheral bus on
chip select 4, so what am I missing?

Can someone explain what the difference is between DCACHE and OCM for the
405GP?

Since our board certainly does not have any memory on CS=4, then do I have
to go through and set up the stack in OCM?

If I have to set up the stack in OCM, is see in start.S that the following
section
of code are executed:
What should CFG_OCM_DATA_ADDR be, and to what does it refer?

What should CFG_INIT_RAM_ADDR be based on the above answer?

#if defined(CFG_OCM_DATA_ADDR) && defined(CFG_OCM_DATA_SIZE)
	/********************************************************************
	 * Setup OCM - On Chip Memory
	 *******************************************************************/
	/* Setup OCM */
 	lis	r0, 0x7FFF
 	ori	r0, r0, 0xFFFF
 	mfdcr	r3, ocmiscntl 		/* get instr-side IRAM config */
 	mfdcr	r4, ocmdscntl	/* get data-side IRAM config */
 	and	r3, r3, r0	/* disable data-side IRAM */
 	and	r4, r4, r0	/* disable data-side IRAM */
 	mtdcr	ocmiscntl, r3	/* set instr-side IRAM config */
 	mtdcr	ocmdscntl, r4	/* set data-side IRAM config */
 	isync

	addis	r3, 0, CFG_OCM_DATA_ADDR at h /* OCM location */
	mtdcr	ocmdsarc, r3
	addis	r4, 0, 0xC000		/* OCM data area enabled */
	mtdcr	ocmdscntl, r4
 	isync
#endif
	/*
	 * Stack in OCM.
	 */

	/* Set up Stack at top of OCM */
	lis	r1, (CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET)@h
	ori	r1, r1, (CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET)@l

	/* Set up a zeroized stack frame so that backtrace works right */
	li	r0, 0
	stwu	r0, -4(r1)
	stwu	r0, -4(r1)

	/*
	 * Set up a dummy frame to store reset vector as return address.
	 * this causes stack underflow to reset board.
	 */
	stwu	r1, -8(r1)		/* Save back chain and move SP */
	lis	r0, RESET_VECTOR at h	/* Address of reset vector */
	ori	r0, r0, RESET_VECTOR at l
	stwu	r1, -8(r1)		/* Save back chain and move SP */
	stw	r0, +12(r1)		/* Save return addr (underflow vect) */
Jerry

-----Original Message-----
From: Jerry Walden [mailto:jwalden at digitalatlantic.com]
Sent: Monday, February 10, 2003 2:26 PM
To: u-boot-users at lists.sourceforge.net
Subject: Memory Bank x (nothingness)?


Greetings -

I have a custom PPC405GPr board, and I am trying to bring u-boot up on it.

	/*-----------------------------------------------------------------------
*/
	/* Setup temporary stack in DCACHE or OCM if needed for SDRAM SPD. */
	/*-----------------------------------------------------------------------
*/
	/*-----------------------------------------------------------------------
*/
	/* Memory Bank x (nothingness) initialization 1GB+64MEG */
	/* used as temporary stack pointer for stage0  */
	/*-----------------------------------------------------------------------
*/
	li	r4,PBxAP
	mtdcr	ebccfga,r4
	lis	r4,0x0380
	ori	r4,r4,0x0480
	mtdcr	ebccfgd,r4

The Walnut config has CFG_INIT_DCACHE_INIT_CS = 4

In our custom board do not have anything attached to bank 4 -

Does DCACHE for the processors cache or programmers private use?
How can I (or how should I) re-write/add/subtract the above code to
accomplish
what it is trying to do (which is not clear to me).

Thanks

Jerry Walden

[U-Boot-Users] RE: More On Memory Bank x (nothingness)?

[Vladimir Gurevich]

Jerry,

I guess the point is EXACTLY to have a CS, which doesn't have anything 
connected to it. The idea is to use a certain address space, which is
cached. Thus, you don't have to have real memory there, it is all 
in the cache anyway. They chose CS4 to make sure that even if something 
goes to the bus, there are no unpleasant side effects, since CS4 is not used.

As I said in the previous email, I also had some problems using this
piece of code and quickly moved on to use OCM, just because I knew that
another bootloader used it anyway.

Happy hacking,
Vladimir

[U-Boot-Users] RE: More On Memory Bank x (nothingness)?

[Chris Hallinan]

Correct me if I'm wrong, folks, but the way I understand it is this:
Using DCACHE as initial RAM for Stack, etc, does not require any
physical RAM backing up the cache.  The cleverness is that the cache
is being used as a temporary supply of necessary storage before the
SDRAM controller is setup.  It's beyond the scope of this list to
expain the details, but you can see how this works by studying the
cache architecture and operation in the architecture and
processor-specific manuals.

OCM is On Chip Memory, which I believe the 405GP has 4K.  It is
another option for the system designer to use as an initial
stack/ram area prior to SDRAM being available.  Either option should
work for you.  Using CS 4 should be fine if your board designers
haven't used it for something that would cause you grief during the
initial boot!  It is frequently not used.

CFG_INIT_RAM_ADDR should be somewhere that won't interfere with your
processor/board/system design.  The default value you will find in
any recent u-boot distribution in Walnut405.h should work for you.
I'd set it to a value larger than your SDRAM module. If you have a
64MB SDRAM module, set it above 400_0000.  Just make sure your board
has no resources that are supposed to respond to that address!  That
code in start.S has been around a while and should work as is when
you get the config right.

-Chris Hallinan
DS4.COM, Inc.



> -----Original Message-----
> From: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]On
> Behalf Of Jerry
> Walden
> Sent: Monday, February 10, 2003 3:54 PM
> To: u-boot-users at lists.sourceforge.net
> Subject: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
>
>
> To add more detail to my previous question - The Walnut config has
> CFG_INIT_DCACHE_INIT_CS = 4, however if we look at the
> schematic for the
> Walnut board we do not see anything hooked up to the
> peripheral bus on
> chip select 4, so what am I missing?
>
> Can someone explain what the difference is between DCACHE
> and OCM for the
> 405GP?
>
> Since our board certainly does not have any memory on
> CS=4, then do I have
> to go through and set up the stack in OCM?
>
> If I have to set up the stack in OCM, is see in start.S
> that the following
> section
> of code are executed:
> What should CFG_OCM_DATA_ADDR be, and to what does it refer?
>
> What should CFG_INIT_RAM_ADDR be based on the above answer?
>
> #if defined(CFG_OCM_DATA_ADDR) && defined(CFG_OCM_DATA_SIZE)
>
> /*********************************************************
> ***********
> 	 * Setup OCM - On Chip Memory
>
> **********************************************************
> *********/
> 	/* Setup OCM */
>  	lis	r0, 0x7FFF
>  	ori	r0, r0, 0xFFFF
>  	mfdcr	r3, ocmiscntl 		/* get instr-side
> IRAM config */
>  	mfdcr	r4, ocmdscntl	/* get data-side IRAM config */
>  	and	r3, r3, r0	/* disable data-side IRAM */
>  	and	r4, r4, r0	/* disable data-side IRAM */
>  	mtdcr	ocmiscntl, r3	/* set instr-side IRAM config */
>  	mtdcr	ocmdscntl, r4	/* set data-side IRAM config */
>  	isync
>
> 	addis	r3, 0, CFG_OCM_DATA_ADDR at h /* OCM location */
> 	mtdcr	ocmdsarc, r3
> 	addis	r4, 0, 0xC000		/* OCM data area enabled */
> 	mtdcr	ocmdscntl, r4
>  	isync
> #endif
> 	/*
> 	 * Stack in OCM.
> 	 */
>
> 	/* Set up Stack at top of OCM */
> 	lis	r1, (CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET)@h
> 	ori	r1, r1, (CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET)@l
>
> 	/* Set up a zeroized stack frame so that backtrace
> works right */
> 	li	r0, 0
> 	stwu	r0, -4(r1)
> 	stwu	r0, -4(r1)
>
> 	/*
> 	 * Set up a dummy frame to store reset vector as
> return address.
> 	 * this causes stack underflow to reset board.
> 	 */
> 	stwu	r1, -8(r1)		/* Save back chain
> and move SP */
> 	lis	r0, RESET_VECTOR at h	/* Address of reset
> vector */
> 	ori	r0, r0, RESET_VECTOR at l
> 	stwu	r1, -8(r1)		/* Save back chain
> and move SP */
> 	stw	r0, +12(r1)		/* Save return addr
> (underflow vect) */
> Jerry
>
> -----Original Message-----
> From: Jerry Walden [mailto:jwalden at digitalatlantic.com]
> Sent: Monday, February 10, 2003 2:26 PM
> To: u-boot-users at lists.sourceforge.net
> Subject: Memory Bank x (nothingness)?
>
>
> Greetings -
>
> I have a custom PPC405GPr board, and I am trying to bring
> u-boot up on it.
>
>
> /*--------------------------------------------------------
> ---------------
> */
> 	/* Setup temporary stack in DCACHE or OCM if needed
> for SDRAM SPD. */
>
> /*--------------------------------------------------------
> ---------------
> */
>
> /*--------------------------------------------------------
> ---------------
> */
> 	/* Memory Bank x (nothingness) initialization 1GB+64MEG */
> 	/* used as temporary stack pointer for stage0  */
>
> /*--------------------------------------------------------
> ---------------
> */
> 	li	r4,PBxAP
> 	mtdcr	ebccfga,r4
> 	lis	r4,0x0380
> 	ori	r4,r4,0x0480
> 	mtdcr	ebccfgd,r4
>
> The Walnut config has CFG_INIT_DCACHE_INIT_CS = 4
>
> In our custom board do not have anything attached to bank 4 -
>
> Does DCACHE for the processors cache or programmers private use?
> How can I (or how should I) re-write/add/subtract the
> above code to
> accomplish
> what it is trying to do (which is not clear to me).
>
> Thanks
>
> Jerry Walden
>
>
>
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[U-Boot-Users] RE: More On Memory Bank x (nothingness)?

[Wolfgang Denk]

In message <NEBBKJPFOLJNBMFNKBIIGEMFDEAA.clh@net1plus.com> you wrote:
> Correct me if I'm wrong, folks, but the way I understand it is this:
> Using DCACHE as initial RAM for Stack, etc, does not require any
> physical RAM backing up the cache.  The cleverness is that the cache
> is being used as a temporary supply of necessary storage before the
> SDRAM controller is setup.  It's beyond the scope of this list to
> expain the details, but you can see how this works by studying the
> cache architecture and operation in the architecture and
> processor-specific manuals.
> 
> OCM is On Chip Memory, which I believe the 405GP has 4K.  It is
> another option for the system designer to use as an initial
> stack/ram area prior to SDRAM being available.  Either option should
> work for you.  Using CS 4 should be fine if your board designers
> haven't used it for something that would cause you grief during the
> initial boot!  It is frequently not used.
> 
> CFG_INIT_RAM_ADDR should be somewhere that won't interfere with your
> processor/board/system design.  The default value you will find in
> any recent u-boot distribution in Walnut405.h should work for you.
> I'd set it to a value larger than your SDRAM module. If you have a
> 64MB SDRAM module, set it above 400_0000.  Just make sure your board
> has no resources that are supposed to respond to that address!  That
> code in start.S has been around a while and should work as is when
> you get the config right.

Chris, thanks for this excellent (and 100% correct)  summary.  May  I
add this to the README file?

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Be careful what you wish for. You never know who will be listening.
                                      - Terry Pratchett, _Soul Music_

[U-Boot-Users] RE: More On Memory Bank x (nothingness)?

[Chris Hallinan]

> Chris, thanks for this excellent (and 100% correct)  
> summary.  May  I
> add this to the README file?

Please do!  

-Chris Hallinan
DS4.COM, Inc.

[U-Boot-Users] Memory Bank x (nothingness)?

[Vladimir Gurevich]

Hi Jerry,

I also have Walnut-based board, but found that it is much easier to 
use OCM instead. 

Here is a relevant piece of my config file:

/* use on chip memory ( OCM ) for temperary stack until sdram is tested */
#define CFG_TEMP_STACK_OCM        1

/* On Chip Memory location */
#define CFG_OCM_DATA_ADDR	0x50000000
#define CFG_OCM_DATA_SIZE	0x1000

#define CFG_INIT_RAM_ADDR	CFG_OCM_DATA_ADDR 
#define CFG_INIT_RAM_END	CFG_OCM_DATA_SIZE

Happy hacking,
Vladimir


Jerry Walden wrote:
> Greetings -
> 
> I have a custom PPC405GPr board, and I am trying to bring u-boot up on it.
> 
> 	/*-----------------------------------------------------------------------
> */
> 	/* Setup temporary stack in DCACHE or OCM if needed for SDRAM SPD. */
> 	/*-----------------------------------------------------------------------
> */
> 	/*-----------------------------------------------------------------------
> */
> 	/* Memory Bank x (nothingness) initialization 1GB+64MEG */
> 	/* used as temporary stack pointer for stage0  */
> 	/*-----------------------------------------------------------------------
> */
> 	li	r4,PBxAP
> 	mtdcr	ebccfga,r4
> 	lis	r4,0x0380
> 	ori	r4,r4,0x0480
> 	mtdcr	ebccfgd,r4
> 
> The Walnut config has CFG_INIT_DCACHE_INIT_CS = 4
> 
> In our custom board do not have anything attached to bank 4 -
> 
> Does DCACHE for the processors cache or programmers private use?
> How can I (or how should I) re-write/add/subtract the above code to
> accomplish
> what it is trying to do (which is not clear to me).
> 
> Thanks
> 
> Jerry Walden
> 
> 
> 
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[U-Boot-Users] Memory Bank x (nothingness)?

[Wolfgang Denk]

In message <3E48165F.5030600@paulidav.org> you wrote:
> 
> I also have Walnut-based board, but found that it is much easier to 
> use OCM instead. 

It may be easier to understand, at first.

Once the idea of using the data cache as some type of memory (that is
not mapped to any real existing memory device) sinks  in,  using  the
cache seems a clever idea.

Note: the "not mapped to any real existing memory device" part refers
to the fact that CS4 is used in sme  configurations  to  refer  to  a
non-existing memory device.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
It may be bad manners to talk with your mouth full, but it isn't  too
good either if you speak when your head is empty.

[U-Boot-Users] Loading the Linux Kernel

[Jerry Walden]

Greetings:

My board does not have an ethernet interface on it, so it seems that the
only
way I can copy m Linux kernel is via the loadb command - this works, however
it takes about 15 minutes.

My board also has a CompactFlash device on it wired up for "True IDE" mode.
I have combined this with the u-boot ide driver, and it works like a trained
pig.

Originally, I had intended on making changes to the Linux kernel,
downloading the
kernel to DRAM on the board by making the uimage target, and using kermit to
load the binary into RAM, however this process is rather cumbersome and
lengthy.

I have a BDI-2000, can I run the bootrom init code, and then "halt" using
the
BDI, and then use the BDI to load the kernel image into ram?

Thanks

Jerry

[U-Boot-Users] Loading the Linux Kernel

[Wolfgang Denk]

Hi Jerry,

in message <EGEGIJHKDKJGAJMGIDPNOEPDCIAA.jwalden@digitalatlantic.com> you wrote:
> 
> My board does not have an ethernet interface on it, so it seems that the
> only
> way I can copy m Linux kernel is via the loadb command - this works, however
> it takes about 15 minutes.

You must be doing something badly wrong. It should be  more  than  10
times  faster.  I  just  veryfied  that the download of a 606109 byte
image on a MPC8xx at a console baudrate of 115200 bps takes less than
70 seconds (1 minute 8.7 sec to be exact).

On faster systems, you can probably also up the console baudrate.

> I have a BDI-2000, can I run the bootrom init code, and then "halt" using
> the
> BDI, and then use the BDI to load the kernel image into ram?

Yes, of course you can. Run U-Boot, and when  it  displays  a  prompt
type  "halt"  at  the  BDI, then use the load command to download the
image, and then type "go" to continue in U-Boot (probably to  run  an
"imi" command to verify the download.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
"It's like deja vu all over again."                      - Yogi Berra

[U-Boot-Users] Expanding the Linux Kernel

[Jerry Walden]

Hello -

I have built my Linux kernel for the PPC 405GPr based upon using
Monta Vista Linux, and the BSP and tools that shipped with the
Monta Vista kit.

I have built the pImage target, and have a file called vmlinux.PPCBoot
on my machine.

First I power up the board and bring up u-boot.

Then I use the BDI-2000 to halt the processor.
Next I use the BDI-2000 to download the kernel as follows:
   load 0x010000000 vmlinux.PPCBoot BIN
Next I start the ROM Monitor up by entering the "go" command from the BDI.
Next in my minicom window, I use the u-boot imi command as follows:
   imi 0x01000000

the result is:

Image Name:		Linux-2.4.17-mvl-walnut
Image Type:		PowerPC Linux Kernel Image (gzip compressed)
Data Size:		590251 Bytes = 576.4 KB
Load Address:	00000000
Entry Point:	00000000
Verifying Checksum: ...ok

Now here is the problem - when I invoke the u-boot command bootm as follows:

bootm 0x01000000

The result is as follows:
Image Name:		Linux-2.4.17-mvl-walnut
Image Type:		PowerPC Linux Kernel Image (gzip compressed)
Data Size:		590251 Bytes = 576.4 KB
Load Address:	00000000
Entry Point:	00000000
Verifying Checksum: ...ok
Error: Inflate returned -3

If I drill down into the root cause of this message, I get to
a function called "inflate_blocks" in this function is the following code:

case LENS:
	NEEDBITS(32)
      if (((~b)>>16) != (b & 0xffff))
	{
		****This Fails!!!
	}

any ideas what could be wrong?

Thanks

Jerry

[U-Boot-Users] Expanding the Linux Kernel

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNIEAOCJAA.jwalden@digitalatlantic.com> you wrote:
> 
> Now here is the problem - when I invoke the u-boot command bootm as follows:
> 
> bootm 0x01000000
> 
> The result is as follows:
> Image Name:		Linux-2.4.17-mvl-walnut
> Image Type:		PowerPC Linux Kernel Image (gzip compressed)
> Data Size:		590251 Bytes = 576.4 KB
> Load Address:	00000000
> Entry Point:	00000000
> Verifying Checksum: ...ok
> Error: Inflate returned -3

Two ideas:

* Test if your image is OK:

	bash$ dd if=vmlinux.PPCBoot of=/tmp/vmlinux.gz bs=64 skip=1
	bash$ gzip -vt /tmp/vmlinux.gz

* Try downloading to a lower address, like 0x200000

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
   You are not permitted to kill a woman who has wronged you, but
   nothing forbids you to reflect that she is growing older every
   minute. You are avenged fourteen hundred and forty times a day.
                                                -- Ambrose Bierce

[U-Boot-Users] Expanding the Linux Kernel

[Jerry Walden]

>Two ideas:
>
>* Test if your image is OK:
>
>	bash$ dd if=vmlinux.PPCBoot of=/tmp/vmlinux.gz bs=64 skip=1
>	bash$ gzip -vt /tmp/vmlinux.gz

The image verified

>* Try downloading to a lower address, like 0x200000
This works!

Thanks Much!

Jerry

-----Original Message-----
From: u-boot-users-admin@lists.sourceforge.net
[mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Wolfgang
Denk
Sent: Tuesday, March 11, 2003 5:35 PM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] Expanding the Linux Kernel


In message <EGEGIJHKDKJGAJMGIDPNIEAOCJAA.jwalden@digitalatlantic.com> you
wrote:
>
> Now here is the problem - when I invoke the u-boot command bootm as
follows:
>
> bootm 0x01000000
>
> The result is as follows:
> Image Name:		Linux-2.4.17-mvl-walnut
> Image Type:		PowerPC Linux Kernel Image (gzip compressed)
> Data Size:		590251 Bytes = 576.4 KB
> Load Address:	00000000
> Entry Point:	00000000
> Verifying Checksum: ...ok
> Error: Inflate returned -3

Two ideas:

* Test if your image is OK:

	bash$ dd if=vmlinux.PPCBoot of=/tmp/vmlinux.gz bs=64 skip=1
	bash$ gzip -vt /tmp/vmlinux.gz

* Try downloading to a lower address, like 0x200000

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
   You are not permitted to kill a woman who has wronged you, but
   nothing forbids you to reflect that she is growing older every
   minute. You are avenged fourteen hundred and forty times a day.
                                                -- Ambrose Bierce


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[U-Boot-Users] Expanding the Linux Kernel

[Wolfgang Denk]

Hi Jerry,

in message <EGEGIJHKDKJGAJMGIDPNAEBOCJAA.jwalden@digitalatlantic.com> you wrote:
> 
> >* Try downloading to a lower address, like 0x200000
> This works!

The kernel probably maps only the first 8 MB of memory; see also  the
comment on "initrd_high" in the U-Boot  README.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Remember:  Silly is a state of Mind, Stupid is a way of Life.
- Dave Butler

[U-Boot-Users] 405gp vs. 405gpr

[Jerry Walden]

For a while I was running my 405gpr in 405gp code with u-boot.
I just figured out that the data cache on the gpr is 16k, and the
data cache on the gp is 8k.  Probably no surprise to most people,
in any case I made the necessary changes to my code on now u-boot
runs great in gpr mode.



Jerry 

[U-Boot-Users] 405gp vs. 405gpr

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNMEINCLAA.jwalden@digitalatlantic.com> you wrote:
> For a while I was running my 405gpr in 405gp code with u-boot.
> I just figured out that the data cache on the gpr is 16k, and the
> data cache on the gp is 8k.  Probably no surprise to most people,
> in any case I made the necessary changes to my code on now u-boot
> runs great in gpr mode.

You forgot to attach your patch.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
It is necessary to have purpose.
	-- Alice #1, "I, Mudd", stardate 4513.3

[U-Boot-Users] 405gp vs. 405gpr

[Stefan Roese]

Hi Jerry!

No patch should be necessary here! What change did you make?

We are running 405gp's _and_ 405gpr's with the same code. The necessary
changes were made a long time ago...

Best regards,
Stefan.

> -----Urspr?ngliche Nachricht-----
> Von: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]Im Auftrag von Wolfgang
> Denk
> Gesendet: Dienstag, 29. April 2003 00:52
> An: jwalden at digitalatlantic.com
> Cc: u-boot-users at lists.sourceforge.net
> Betreff: Re: [U-Boot-Users] 405gp vs. 405gpr
>
>
> In message
> <EGEGIJHKDKJGAJMGIDPNMEINCLAA.jwalden@digitalatlantic.com> you wrote:
> > For a while I was running my 405gpr in 405gp code with u-boot.
> > I just figured out that the data cache on the gpr is 16k, and the
> > data cache on the gp is 8k.  Probably no surprise to most people,
> > in any case I made the necessary changes to my code on now u-boot
> > runs great in gpr mode.
>
> You forgot to attach your patch.
>
> Best regards,
>
> Wolfgang Denk
>
> --
> Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
> Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
> It is necessary to have purpose.
> 	-- Alice #1, "I, Mudd", stardate 4513.3
>
>
> -------------------------------------------------------
> This sf.net email is sponsored by:ThinkGeek
> Welcome to geek heaven.
> http://thinkgeek.com/sf
> _______________________________________________
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>
>

[U-Boot-Users] 405gp vs. 405gpr

[Jerry Walden]

Yes - it probably does not need a patch - it
is just a configuration setting:

#define CFG_DCACHE_SIZE 0x4000

This is used in invalidate cache, and flush dcache.

Jerry Walden


-----Original Message-----
From: Stefan Roese [mailto:stefan.roese at esd-electronics.com]
Sent: Tuesday, April 29, 2003 8:40 AM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] 405gp vs. 405gpr


Hi Jerry!

No patch should be necessary here! What change did you make?

We are running 405gp's _and_ 405gpr's with the same code. The necessary
changes were made a long time ago...

Best regards,
Stefan.

> -----Urspr?ngliche Nachricht-----
> Von: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]Im Auftrag von Wolfgang
> Denk
> Gesendet: Dienstag, 29. April 2003 00:52
> An: jwalden at digitalatlantic.com
> Cc: u-boot-users at lists.sourceforge.net
> Betreff: Re: [U-Boot-Users] 405gp vs. 405gpr
>
>
> In message
> <EGEGIJHKDKJGAJMGIDPNMEINCLAA.jwalden@digitalatlantic.com> you wrote:
> > For a while I was running my 405gpr in 405gp code with u-boot.
> > I just figured out that the data cache on the gpr is 16k, and the
> > data cache on the gp is 8k.  Probably no surprise to most people,
> > in any case I made the necessary changes to my code on now u-boot
> > runs great in gpr mode.
>
> You forgot to attach your patch.
>
> Best regards,
>
> Wolfgang Denk
>
> --
> Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
> Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
> It is necessary to have purpose.
> 	-- Alice #1, "I, Mudd", stardate 4513.3
>
>
> -------------------------------------------------------
> This sf.net email is sponsored by:ThinkGeek
> Welcome to geek heaven.
> http://thinkgeek.com/sf
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> https://lists.sourceforge.net/lists/listinfo/u-boot-users
>
>

[U-Boot-Users] 405gp vs. 405gpr

[Stefan Roese]

> Yes - it probably does not need a patch - it
> is just a configuration setting:
>
> #define CFG_DCACHE_SIZE 0x4000

Ahhh, I see! The walnut board still had the old (ppc405gp) 8 kbyte setting.

All PPC405GP board maintainers should set this config-option to 16 kbyte to
be "PPC405GPr ready"!

Best regards,
Stefan.

[U-Boot-Users] Original PPC Boot Rom for IBM405GPr Eval Board

[Jerry Walden]

Greetings:

I did something stupid....

Now that I have that out of the way -

I removed the flash bios from the eval kit, and built a u-boot.bin for the
walnut board.
I placed the rom back into the eval kit, and I do not get any response from
the serial
port (I did get a response with the old ROM).

Now I'd like to go back and see if I can get the eval kit working with the
original
rom (I think it was open-bios), however I cannot find a pre-built version,
or even
source on the CDs that came with the eval kit -

anyone out there have any ideas?

Jerry Walden

[U-Boot-Users] 405Gpr

[Jerry Walden]

Greetings!

We have u-boot up and running with a serial console (we do not have an
on-board
phy).

So the next obvious step is to get the Linux kernel to boot.

Question is, should I put the Linux kernel in the boot rom and load from
there,
or should I place it in the SanDisk CompactFlash device we have on our
board.

The boot rom we are using (Am29LV40B) has 512K available, and the u-boot
code
that I have generated is about 175K.

Jerry

[U-Boot-Users] 405Gpr

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNOENOCHAA.jwalden@digitalatlantic.com> you wrote:
> 
> Question is, should I put the Linux kernel in the boot rom and load from
> there,
> or should I place it in the SanDisk CompactFlash device we have on our
> board.
> 
> The boot rom we are using (Am29LV40B) has 512K available, and the u-boot
> code
> that I have generated is about 175K.

512 - 175 = 337 kB. This is too  small  for  a  Linux  kernel  image,
leaving you little choice.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
"A fractal is by definition a set for which the Hausdorff Besicovitch
dimension strictly exceeds the topological dimension."
- Mandelbrot, _The Fractal Geometry of Nature_

[U-Boot-Users] 405Gpr

[Jerry Walden]

okay - makes sense.

So I have a few simple questions:

1)Is there a preffered place that I can put the initialization of
my CompactFlash card?

2)When I bootm xxxx_xxxx where xxxx_xxxx is in the CompactFlash - do I need
to
write a special read routine?  The only mode (I think) I can place the
CompactFlash
device in is PC Card Memory Mode.  As I read the specs for this device, it
looks like
I'll need a loop before I read each word like:

while (not ready) {
  read CompactFlash Status Register
  mask what I read back
  if (mask == 0x00yy)
     ready = TRUE
}
read_a_16bit word.

Since the CompactFlash is a 16 bit device, do I need to change the bootm
code so that
I get all 32 bits?

Thanks


Jerry Walden

-----Original Message-----
From: u-boot-users-admin@lists.sourceforge.net
[mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Wolfgang
Denk
Sent: Thursday, February 27, 2003 12:05 PM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] 405Gpr


In message <EGEGIJHKDKJGAJMGIDPNOENOCHAA.jwalden@digitalatlantic.com> you
wrote:
>
> Question is, should I put the Linux kernel in the boot rom and load from
> there,
> or should I place it in the SanDisk CompactFlash device we have on our
> board.
>
> The boot rom we are using (Am29LV40B) has 512K available, and the u-boot
> code
> that I have generated is about 175K.

512 - 175 = 337 kB. This is too  small  for  a  Linux  kernel  image,
leaving you little choice.

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
"A fractal is by definition a set for which the Hausdorff Besicovitch
dimension strictly exceeds the topological dimension."
- Mandelbrot, _The Fractal Geometry of Nature_


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[U-Boot-Users] 405Gpr

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNOEOGCHAA.jwalden@digitalatlantic.com> you wrote:
> 
> So I have a few simple questions:
> 
> 1)Is there a preffered place that I can put the initialization of
> my CompactFlash card?

Make it fit into the existing IDE interface.

> 2)When I bootm xxxx_xxxx where xxxx_xxxx is in the CompactFlash - do I need
> to
> write a special read routine?  The only mode (I think) I can place the
> CompactFlash
> device in is PC Card Memory Mode.  As I read the specs for this device, it
> looks like
> I'll need a loop before I read each word like:

Make it fit into the existing IDE interface.

Than you can use "disk read ..." etc. to load the image into RAM, and use
standard commands like imi or bootm.

> Since the CompactFlash is a 16 bit device, do I need to change the bootm
> code so that
> I get all 32 bits?

bootm has nothing to do with it. "bootm" is - as the name suggests  -
a  command to boot an image that is in _m_memory. You use a different
command to load the image to memory, like loads or tftp or  disk  (or
even "eeprom read" :-)

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
I've got a bad feeling about this.

[U-Boot-Users] 405Gpr

[Jerry Walden]

>Make it fit into the existing IDE interface.

This seems to simple - I think I need to

1) place the CompactFlash device in "True IDE Mode"
2) define CFG_CMD_IDE
3) define CFG_ATA_DATA_OFFSET, CFG_ATA_REG_OFFSET, CFG_ATA_ALT_OFFSET

Then if I have studied the code enough - it looks like that is all I
need - is there anything obvious that I left out?

Jerry

-----Original Message-----
From: u-boot-users-admin@lists.sourceforge.net
[mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Wolfgang
Denk
Sent: Thursday, February 27, 2003 5:23 PM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] 405Gpr


In message <EGEGIJHKDKJGAJMGIDPNOEOGCHAA.jwalden@digitalatlantic.com> you
wrote:
>
> So I have a few simple questions:
>
> 1)Is there a preffered place that I can put the initialization of
> my CompactFlash card?

Make it fit into the existing IDE interface.

> 2)When I bootm xxxx_xxxx where xxxx_xxxx is in the CompactFlash - do I
need
> to
> write a special read routine?  The only mode (I think) I can place the
> CompactFlash
> device in is PC Card Memory Mode.  As I read the specs for this device, it
> looks like
> I'll need a loop before I read each word like:

Make it fit into the existing IDE interface.

Than you can use "disk read ..." etc. to load the image into RAM, and use
standard commands like imi or bootm.

> Since the CompactFlash is a 16 bit device, do I need to change the bootm
> code so that
> I get all 32 bits?

bootm has nothing to do with it. "bootm" is - as the name suggests  -
a  command to boot an image that is in _m_memory. You use a different
command to load the image to memory, like loads or tftp or  disk  (or
even "eeprom read" :-)

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
I've got a bad feeling about this.


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[U-Boot-Users] Placing boot image an CompactFlash

[Jerry Walden]

Hello:

I am now at the point where I am going to try to boot Linux on
my 405gpr board.  My boot device is a SanDisk CompactFlash device
that is seen by u-boot as an IDE driver - had to re-wire the compact flash
so that it operates in "true-ide" mode, and changed IDE driver a bit.

I did a make pImage (for some reason there is no uImage target in 2.4.18).

Now - how do I get the pImage file, and write it to the compact flash? 

I have a PCMCIA adapter so I can access the card from a PC, however I
am not sure what utility I would use, or if there is a preffered method
to doing this.

Thanks for any help

Jerry 

[U-Boot-Users] Placing boot image an CompactFlash

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNIEDOCIAA.jwalden@digitalatlantic.com> you wrote:
> 
> Now - how do I get the pImage file, and write it to the compact flash? 

RTFD.

Please see section ``7.3.3. Using PC Card "disks"  with  PPCBoot  and
Linux'' in http://www.denx.de/re/DPLG.html

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
"On two occasions I have been  asked  [by  members  of  Parliament!],
'Pray,  Mr.  Babbage, if you put into the machine wrong figures, will
the right answers come out?' I am not able rightly to  apprehend  the
kind of confusion of ideas that could provoke such a question."
- Charles Babbage

[U-Boot-Users] Placing boot image an CompactFlash

[Jerry Walden]

Cool - thanks for pointing to the documents - didn't know they were there.

Still section 7.3.3. refers to PC-CARD devices, and the focus seems
to be on PCMCIA - I do not have a PC-CARD device - just CompactFlash
wired up for "true-ide mode" placed in a CompactFlash socket on the
board - there is no PCMCIA.

I have been able to make the IDE driver work in conjunction with the
CompactFlash device.

Sorry if I was not clear last message, but the question is how to I get the
Linux kernel on the CompactFlash device in the first place.

I mentioned that I had a PCCard adapter for the CompactFlash that I can
use to place the CompactFlash into the PCMCIA slot on my Windoze laptop
just in case anyone needed to know.

Jerry

-----Original Message-----
From: u-boot-users-admin@lists.sourceforge.net
[mailto:u-boot-users-admin at lists.sourceforge.net]On Behalf Of Wolfgang
Denk
Sent: Monday, March 03, 2003 6:25 PM
To: jwalden at digitalatlantic.com
Cc: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] Placing boot image an CompactFlash


In message <EGEGIJHKDKJGAJMGIDPNIEDOCIAA.jwalden@digitalatlantic.com> you
wrote:
>
> Now - how do I get the pImage file, and write it to the compact flash?

RTFD.

Please see section ``7.3.3. Using PC Card "disks"  with  PPCBoot  and
Linux'' in http://www.denx.de/re/DPLG.html

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
"On two occasions I have been  asked  [by  members  of  Parliament!],
'Pray,  Mr.  Babbage, if you put into the machine wrong figures, will
the right answers come out?' I am not able rightly to  apprehend  the
kind of confusion of ideas that could provoke such a question."
- Charles Babbage


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[U-Boot-Users] Placing boot image an CompactFlash

[Wolfgang Denk]

In message <EGEGIJHKDKJGAJMGIDPNIEEBCIAA.jwalden@digitalatlantic.com> you wrote:
> 
> Still section 7.3.3. refers to PC-CARD devices, and the focus seems
> to be on PCMCIA - I do not have a PC-CARD device - just CompactFlash
> wired up for "true-ide mode" placed in a CompactFlash socket on the
> board - there is no PCMCIA.
> 
> I have been able to make the IDE driver work in conjunction with the
> CompactFlash device.

If you have the IDE driver working there is no difference at all.

> Sorry if I was not clear last message, but the question is how to I get the
> Linux kernel on the CompactFlash device in the first place.

This is explained in the document I pointed you at. At ;east  one  of
the  many  options (using U-Boot's "ide write" command to write it to
"dick").

> I mentioned that I had a PCCard adapter for the CompactFlash that I can
> use to place the CompactFlash into the PCMCIA slot on my Windoze laptop
> just in case anyone needed to know.

What for? You have U-Boot and Linux, that's all you  need.

The only useful thing you can do  with  your  Windoze  laptop  is  to
install  an  operating system on it, something with "nux" or "BSD" in
the name :-)

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Heavier than air flying machines are impossible.
                    -- Lord Kelvin, President, Royal Society, c. 1895

[U-Boot-Users] ppcboot version number

[Jerry Walden]

Greetings:

I have an 405GPr eval kit from IBM.  I am tracing through the 
code in the boot rom, and I'm trying to find out if they (IBM)
used a specific version from the source tree - is there a version
string in memory, or is my assumption that IBM used ppc-boot incorrect?

Thanks

Jerry

[U-Boot-Users] ppcboot version number

[Stefan Roese]

Hi Jerry,

since the 405GP eval board (walnut) uses IBM OpenBios as boot monitor, I
would assume that the 405GPr eval board will use the same firmware.

U-Boot/PPCBoot from IBM would be nice though...

Best regards,
Stefan.

> -----Urspr?ngliche Nachricht-----
> Von: u-boot-users-admin at lists.sourceforge.net
> [mailto:u-boot-users-admin at lists.sourceforge.net]Im Auftrag von Jerry
> Walden
> Gesendet: Donnerstag, 2. Januar 2003 20:53
> An: ppcboot-users at lists.sourceforge.net
> Cc: u-boot-users at lists.sourceforge.net
> Betreff: [U-Boot-Users] ppcboot version number
>
>
> Greetings:
>
> I have an 405GPr eval kit from IBM.  I am tracing through the
> code in the boot rom, and I'm trying to find out if they (IBM)
> used a specific version from the source tree - is there a version
> string in memory, or is my assumption that IBM used ppc-boot incorrect?
>
> Thanks
>
> Jerry
>
>
>
>
> -------------------------------------------------------
> This sf.net email is sponsored by:ThinkGeek
> Welcome to geek heaven.
> http://thinkgeek.com/sf
> _______________________________________________
> U-Boot-Users mailing list
> U-Boot-Users at lists.sourceforge.net
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>
>