driver design question

[phil@edgedesign.us (Philip Edelbrock)]

 Good discussion.  Let me toss a few very quick comments:

Jean Delvare wrote:

> And I don't quite agree. We are already caching since we limit the
>
>frequency at which new data can be obtained. [...]
>
Quick note: The refresh frequency limit was introduced because the 
hardware would give bad results if you polled it too fast.  So, 
depending on what the datasheet for the chip says, we adjust the max 
polling frequency to match.  So this was to ensure accurate results from 
the hardware, not as a performace optimization.

> Hardly anything I can say against this, you're of course right. It's
>
>more about having a "beautiful" driver than anything else.
>  
>
My idea of the ideal driver is that it is almost transparent to the 
hardware.  The less caching, the better.

Now, your point about reducing a significant amount of latency is a good 
one.  That's a reasonable reason for such an optimization.  I'm not sure 
if it is a strong enough reason, though.  I think we'd need to do a 
little math to figure out exactly how much it 'costs' to read limits and 
what it would save us to poll them less frequently.


Phil