driver design question

[ppokorny@penguincomputing.com (Philip Pokorny)]

Mark M. Hoffman wrote:
> * Philip Edelbrock <phil@edgedesign.us> [2003-07-29 09:50:45 -0700]:
> 
>>Jean Delvare wrote:
>>My idea of the ideal driver is that it is almost transparent to the 
>>hardware.  The less caching, the better.
> 
> Much as I try, I can't jump off the fence here.  OOH, it seems wasteful to
> keep re-reading what are almost certainly non-volatile h/w registers.  OTOH,
> what are we optimizing here? - a special purpose slow bus that has nothing
> better to do (I2C); or an insignificant amount of ISA port IO.

Don't under-estimate the delays associated with doing ISA port I/O.  It 
can take *thousands* of clock cycles to perform just one port I/O 
instruction.  The kernel even uses I/O to port 0x80 as a short timing delay.

:v)

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Philip Pokorny, Director of Engineering
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