From: Marc Zyngier <maz@kernel.org>
To: James Morse <james.morse@arm.com>
Cc: kvm@vger.kernel.org, kernel-team@android.com,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/8] KVM: arm64: Map AArch32 cp14 register to AArch64 sysregs
Date: Tue, 10 Nov 2020 10:27:54 +0000 [thread overview]
Message-ID: <3a8a34dc2aa45c5cb6acbc9debd65691@kernel.org> (raw)
In-Reply-To: <1830d62e-ac47-9b84-6375-baed62f8486e@arm.com>
On 2020-11-03 18:29, James Morse wrote:
> Hi Marc,
>
> On 02/11/2020 19:16, Marc Zyngier wrote:
>> Similarly to what has been done on the cp15 front, repaint the
>> debug registers to use their AArch64 counterparts. This results
>> in some simplification as we can remove the 32bit-specific
>> accessors.
>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 137818793a4a..c41e7ca60c8c 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -361,26 +361,30 @@ static bool trap_debug_regs(struct kvm_vcpu
>> *vcpu,
>> -#define DBGBXVR(n) \
>> - { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n }
>> +#define DBG_BCR_BVR_WCR_WVR(n) \
>> + /* DBGBVRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n
>> }, \
>
> Just to check I understand what is going on here: This BVR AA32(LO) is
> needed because the
> dbg_bvr array is shared with the DBGBXVR registers...
>
>
>> + /* DBGBCRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n
>> }, \
>> + /* DBGWVRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n
>> }, \
>> + /* DBGWCRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
>
> ... these don't have an alias, but its harmless.
This is a bug-for-bug translation of the original code. I guess I'll
drop
that altogether.
>
> [...]
>
>> @@ -1931,7 +1896,9 @@ static const struct sys_reg_desc cp15_regs[] = {
>> /* DFSR */
>> { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1
>> },
>> { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL,
>> IFSR32_EL2 },
>> + /* ADFSR */
>> { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1
>> },
>> + /* AIFSR */
>> { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1
>> },
>> /* DFAR */
>> { AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL,
>> FAR_EL1 },
>
> I guess these were meant for the previous patch.
Yup, I'll move that.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: James Morse <james.morse@arm.com>
Cc: kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/8] KVM: arm64: Map AArch32 cp14 register to AArch64 sysregs
Date: Tue, 10 Nov 2020 10:27:54 +0000 [thread overview]
Message-ID: <3a8a34dc2aa45c5cb6acbc9debd65691@kernel.org> (raw)
In-Reply-To: <1830d62e-ac47-9b84-6375-baed62f8486e@arm.com>
On 2020-11-03 18:29, James Morse wrote:
> Hi Marc,
>
> On 02/11/2020 19:16, Marc Zyngier wrote:
>> Similarly to what has been done on the cp15 front, repaint the
>> debug registers to use their AArch64 counterparts. This results
>> in some simplification as we can remove the 32bit-specific
>> accessors.
>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 137818793a4a..c41e7ca60c8c 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -361,26 +361,30 @@ static bool trap_debug_regs(struct kvm_vcpu
>> *vcpu,
>> -#define DBGBXVR(n) \
>> - { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n }
>> +#define DBG_BCR_BVR_WCR_WVR(n) \
>> + /* DBGBVRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n
>> }, \
>
> Just to check I understand what is going on here: This BVR AA32(LO) is
> needed because the
> dbg_bvr array is shared with the DBGBXVR registers...
>
>
>> + /* DBGBCRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n
>> }, \
>> + /* DBGWVRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n
>> }, \
>> + /* DBGWCRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
>
> ... these don't have an alias, but its harmless.
This is a bug-for-bug translation of the original code. I guess I'll
drop
that altogether.
>
> [...]
>
>> @@ -1931,7 +1896,9 @@ static const struct sys_reg_desc cp15_regs[] = {
>> /* DFSR */
>> { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1
>> },
>> { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL,
>> IFSR32_EL2 },
>> + /* ADFSR */
>> { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1
>> },
>> + /* AIFSR */
>> { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1
>> },
>> /* DFAR */
>> { AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL,
>> FAR_EL1 },
>
> I guess these were meant for the previous patch.
Yup, I'll move that.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: James Morse <james.morse@arm.com>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com
Subject: Re: [PATCH 4/8] KVM: arm64: Map AArch32 cp14 register to AArch64 sysregs
Date: Tue, 10 Nov 2020 10:27:54 +0000 [thread overview]
Message-ID: <3a8a34dc2aa45c5cb6acbc9debd65691@kernel.org> (raw)
In-Reply-To: <1830d62e-ac47-9b84-6375-baed62f8486e@arm.com>
On 2020-11-03 18:29, James Morse wrote:
> Hi Marc,
>
> On 02/11/2020 19:16, Marc Zyngier wrote:
>> Similarly to what has been done on the cp15 front, repaint the
>> debug registers to use their AArch64 counterparts. This results
>> in some simplification as we can remove the 32bit-specific
>> accessors.
>
>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>> index 137818793a4a..c41e7ca60c8c 100644
>> --- a/arch/arm64/kvm/sys_regs.c
>> +++ b/arch/arm64/kvm/sys_regs.c
>> @@ -361,26 +361,30 @@ static bool trap_debug_regs(struct kvm_vcpu
>> *vcpu,
>> -#define DBGBXVR(n) \
>> - { Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_xvr, NULL, n }
>> +#define DBG_BCR_BVR_WCR_WVR(n) \
>> + /* DBGBVRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n
>> }, \
>
> Just to check I understand what is going on here: This BVR AA32(LO) is
> needed because the
> dbg_bvr array is shared with the DBGBXVR registers...
>
>
>> + /* DBGBCRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n
>> }, \
>> + /* DBGWVRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n
>> }, \
>> + /* DBGWCRn */ \
>> + { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }
>
> ... these don't have an alias, but its harmless.
This is a bug-for-bug translation of the original code. I guess I'll
drop
that altogether.
>
> [...]
>
>> @@ -1931,7 +1896,9 @@ static const struct sys_reg_desc cp15_regs[] = {
>> /* DFSR */
>> { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, ESR_EL1
>> },
>> { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL,
>> IFSR32_EL2 },
>> + /* ADFSR */
>> { Op1( 0), CRn( 5), CRm( 1), Op2( 0), access_vm_reg, NULL, AFSR0_EL1
>> },
>> + /* AIFSR */
>> { Op1( 0), CRn( 5), CRm( 1), Op2( 1), access_vm_reg, NULL, AFSR1_EL1
>> },
>> /* DFAR */
>> { AA32(LO), Op1( 0), CRn( 6), CRm( 0), Op2( 0), access_vm_reg, NULL,
>> FAR_EL1 },
>
> I guess these were meant for the previous patch.
Yup, I'll move that.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-11-10 10:28 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 19:16 [PATCH 0/8] KVM: arm64: Kill the copro array Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 1/8] KVM: arm64: Move AArch32 exceptions over to AArch64 sysregs Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
2020-11-10 10:01 ` Marc Zyngier
2020-11-10 10:01 ` Marc Zyngier
2020-11-10 10:01 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 2/8] KVM: arm64: Add AArch32 mapping annotation Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 3/8] KVM: arm64: Map AArch32 cp15 register to AArch64 sysregs Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
2020-11-10 10:14 ` Marc Zyngier
2020-11-10 10:14 ` Marc Zyngier
2020-11-10 10:14 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 4/8] KVM: arm64: Map AArch32 cp14 " Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
2020-11-10 10:27 ` Marc Zyngier [this message]
2020-11-10 10:27 ` Marc Zyngier
2020-11-10 10:27 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 5/8] KVM: arm64: Drop is_32bit trap attribute Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 6/8] KVM: arm64: Drop is_aarch32 " Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 7/8] KVM: arm64: Drop legacy copro shadow register Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` [PATCH 8/8] KVM: arm64: Drop kvm_coproc.h Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-02 19:16 ` Marc Zyngier
2020-11-03 18:29 ` [PATCH 0/8] KVM: arm64: Kill the copro array James Morse
2020-11-03 18:29 ` James Morse
2020-11-03 18:29 ` James Morse
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