From: Krzysztof Kozlowski <krzk@kernel.org>
To: Matthew Gerlach <matthew.gerlach@linux.intel.com>,
lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
dinguyen@kernel.org, joyce.ooi@intel.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: matthew.gerlach@altera.com, peter.colberg@altera.com
Subject: Re: [PATCH v6 4/7] arm64: dts: agilex: refactor shared dts into dtsi
Date: Wed, 12 Feb 2025 06:59:12 +0100 [thread overview]
Message-ID: <3c6cb77a-6e12-4e6c-a197-11a63b3dc74d@kernel.org> (raw)
In-Reply-To: <20250211151725.4133582-5-matthew.gerlach@linux.intel.com>
On 11/02/2025 16:17, Matthew Gerlach wrote:
> Move common device tree from socfpga_agilex_socdk*.dts to
> socfpga_agilex_socdk.dtsi.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> ---
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dtsi
> new file mode 100644
> index 000000000000..e0f3ff60aa33
> --- /dev/null
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dtsi
> @@ -0,0 +1,65 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2019, Intel Corporation
> + */
> +
> +/ {
> + model = "SoCFPGA Agilex SoCDK";
> + compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
That's not correct. Compatible is not being shared between different
boards. Different boards have different compatible.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-02-12 5:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 15:17 [PATCH v6 0/7] Add PCIe Root Port support for Agilex family of chips Matthew Gerlach
2025-02-11 15:17 ` [PATCH v6 1/7] dt-bindings: PCI: altera: Add binding for Agilex Matthew Gerlach
2025-02-11 15:17 ` [PATCH v6 2/7] arm64: dts: agilex: Fix fixed-clock schema warnings Matthew Gerlach
2025-02-12 5:56 ` Krzysztof Kozlowski
2025-02-13 17:37 ` matthew.gerlach
2025-02-13 18:03 ` Krzysztof Kozlowski
2025-02-11 15:17 ` [PATCH v6 3/7] arm64: dts: agilex: move bus@80000000 to socfpga_agilex.dtsi Matthew Gerlach
2025-02-12 5:57 ` Krzysztof Kozlowski
2025-02-11 15:17 ` [PATCH v6 4/7] arm64: dts: agilex: refactor shared dts into dtsi Matthew Gerlach
2025-02-12 5:59 ` Krzysztof Kozlowski [this message]
2025-02-11 15:17 ` [PATCH v6 5/7] arm64: dts: agilex: add dtsi for PCIe Root Port Matthew Gerlach
2025-02-11 15:17 ` [PATCH v6 6/7] arm64: dts: agilex: add dts enabling " Matthew Gerlach
2025-02-12 6:00 ` Krzysztof Kozlowski
2025-02-11 15:17 ` [PATCH v6 7/7] PCI: altera: Add Agilex support Matthew Gerlach
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