From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: Cezary Rojewski <cezary.rojewski@intel.com>, alsa-devel@alsa-project.org
Cc: upstream@semihalf.com, harshapriya.n@intel.com, rad@semihalf.com,
tiwai@suse.com, hdegoede@redhat.com, broonie@kernel.org,
amadeuszx.slawinski@linux.intel.com, cujomalainey@chromium.org,
lma@semihalf.com
Subject: Re: [RFC 08/13] ASoC: Intel: avs: Declare path and its components
Date: Mon, 21 Mar 2022 13:14:19 -0500 [thread overview]
Message-ID: <3e063161-d37f-4a2c-c545-e3e93afee682@linux.intel.com> (raw)
In-Reply-To: <7d87bda9-75aa-47e1-986e-cd2366a4636e@intel.com>
>>> +struct avs_path {
>>> + u32 dma_id;
>>
>> that is very surprising...
>>
>> This would seem to limit the concept of an avs path to a single host DMA
>> channel, which somewhat contradicts that there can be multiple pipelines
>> in the same path, or that a path can contain mixers.
>>
>> And even if this is a single dma, what does this represent? the
>> stream_tag? the BE DMA for SSP/DMIC?
>>
>> Please clarify the concepts first, it's frustrating to discover this at
>> patch 8.
>
> A single path is tied to either FE or BE. So at most to a single,
> user-visible endpoint if it's FE. If there are more FEs, then we move to
> NxFE <-> 1xBE scenario. You can have many pipelines forming the path -
> most of the pipelines do not contain module connected to any gateway
> (HDA/SSP/DMIC etc.) anyway.
This should have been explained in the cover letter.
Assuming that there's a single Back-End that can handle all possible
routing cases is a very narrow interpretation of how DPCM is supposed to
be used, and it adds quite a few opens on routing changes that can't be
handled with regular triggers. What happens when not all interfaces are
handled by the DSP 'gateway' is also interesting.
next prev parent reply other threads:[~2022-03-21 19:11 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-07 13:25 [RFC 00/13] ASoC: Intel: avs: Topology and path management Cezary Rojewski
2022-02-07 13:25 ` [RFC 01/13] ASoC: Intel: avs: Declare vendor tokens Cezary Rojewski
2022-02-07 13:25 ` [RFC 02/13] ASoC: Intel: avs: Add topology parsing infrastructure Cezary Rojewski
2022-02-25 17:20 ` Pierre-Louis Bossart
2022-03-21 10:25 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 03/13] ASoC: Intel: avs: Parse module-extension tuples Cezary Rojewski
2022-02-25 17:24 ` Pierre-Louis Bossart
2022-03-21 10:33 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 04/13] ASoC: Intel: avs: Parse pplcfg and binding tuples Cezary Rojewski
2022-02-25 17:40 ` Pierre-Louis Bossart
2022-03-21 10:53 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 05/13] ASoC: Intel: avs: Parse pipeline and module tuples Cezary Rojewski
2022-02-25 18:51 ` Pierre-Louis Bossart
2022-03-21 15:14 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 06/13] ASoC: Intel: avs: Parse path and path templates tuples Cezary Rojewski
2022-02-25 19:09 ` Pierre-Louis Bossart
2022-03-21 16:15 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 07/13] ASoC: Intel: avs: Add topology loading operations Cezary Rojewski
2022-02-25 19:17 ` Pierre-Louis Bossart
2022-03-21 16:28 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 08/13] ASoC: Intel: avs: Declare path and its components Cezary Rojewski
2022-02-25 19:25 ` Pierre-Louis Bossart
2022-03-21 17:01 ` Cezary Rojewski
2022-03-21 18:14 ` Pierre-Louis Bossart [this message]
2022-02-07 13:25 ` [RFC 09/13] ASoC: Intel: avs: Path creation and freeing Cezary Rojewski
2022-02-25 19:36 ` Pierre-Louis Bossart
2022-03-21 17:19 ` Cezary Rojewski
2022-03-21 17:53 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 10/13] ASoC: Intel: avs: Path state management Cezary Rojewski
2022-02-25 19:42 ` Pierre-Louis Bossart
2022-03-21 17:31 ` Cezary Rojewski
2022-02-07 13:25 ` [RFC 11/13] ASoC: Intel: avs: Arm paths after creating them Cezary Rojewski
2022-02-07 13:25 ` [RFC 12/13] ASoC: Intel: avs: Prepare modules before bindings them Cezary Rojewski
2022-02-07 13:25 ` [RFC 13/13] ASoC: Intel: avs: Configure modules according to their type Cezary Rojewski
2022-02-25 21:35 ` [RFC 00/13] ASoC: Intel: avs: Topology and path management Pierre-Louis Bossart
2022-02-26 0:22 ` Mark Brown
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3e063161-d37f-4a2c-c545-e3e93afee682@linux.intel.com \
--to=pierre-louis.bossart@linux.intel.com \
--cc=alsa-devel@alsa-project.org \
--cc=amadeuszx.slawinski@linux.intel.com \
--cc=broonie@kernel.org \
--cc=cezary.rojewski@intel.com \
--cc=cujomalainey@chromium.org \
--cc=harshapriya.n@intel.com \
--cc=hdegoede@redhat.com \
--cc=lma@semihalf.com \
--cc=rad@semihalf.com \
--cc=tiwai@suse.com \
--cc=upstream@semihalf.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.