Re: [RFC 3/6] Documentation: dt: add bindings for ti bb2d

[Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>]

On 11/17/2016 08:44 PM, Robert Nelson wrote:
> From: Gowtham Tammana <g-tammana-l0cyMroinI0@public.gmane.org>
>
> Add documentation for device tree bindings description for
> 2D GPU blitter module present in Texas Instruments family of SoCs.
>
> Signed-off-by: Gowtham Tammana <g-tammana-l0cyMroinI0@public.gmane.org>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen-l0cyMroinI0@public.gmane.org>
> ---

Might want to point at the source of the patch -> just for the record, 
this came from TI vendor kernel..
>  Documentation/devicetree/bindings/gpu/ti-bb2d.txt | 27 +++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpu/ti-bb2d.txt
>
> diff --git a/Documentation/devicetree/bindings/gpu/ti-bb2d.txt b/Documentation/devicetree/bindings/gpu/ti-bb2d.txt
> new file mode 100644
> index 0000000..af47488
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/ti-bb2d.txt
> @@ -0,0 +1,27 @@
> +* Texas Instruments BB2D blitter module
> +
> +This binding describes the 2D BitBlit (BB2D) graphics accelerator
> +subsystem based on the GC320 core from Vivante Corporation available
> +in Texas Instruments SoCs.
> +
> +Required properties:
> +  - compatible: value should take the following format:
> +        "ti,<soc>-bb2d", "vivante,<gpuversion>"
> +    accepted values:
> +     (a) "ti,dra7-bb2d", "vivante,gc320" for TI DRA7xx / AM57x
> +
> +  - reg : base address and length of BB2D IP registers
> +  - interrupts : BB2D interrupt line number
> +  - ti,hwmods : name of the hwmod associated with BB2D module
> +  - clocks : handle to BB2D functional clock
> +  - clock-names : fclk
> +
> +Example for DRA7x SoC:
> +        bb2d: bb2d@59000000 {
> +            compatible = "ti,dra7-bb2d", "vivante,gc320";
> +            reg = <0x59000000 0x0700>;
> +            interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> +            ti,hwmods = "bb2d";
> +            clocks = <&dpll_core_h24x2_ck>;
> +            clock-names = "fclk";
> +        };
>


-- 
Regards,
Nishanth Menon
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