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From: Reinette Chatre <reinette.chatre@intel.com>
To: Chen Yu <yu.c.chen@intel.com>, <tony.luck@intel.com>
Cc: <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
	<tglx@kernel.org>, <bp@alien8.de>, <mingo@redhat.com>,
	<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
	<dave.martin@arm.com>, <james.morse@arm.com>,
	<fenghuay@nvidia.com>, <babu.moger@amd.com>,
	<anil.keshavamurthy@broadcom.com>
Subject: Re: [PATCH v4 3/6] x86/resctrl: Rename prev_msr to prev_mon_val
Date: Thu, 18 Jun 2026 16:39:04 -0700	[thread overview]
Message-ID: <3ee018f0-689d-4175-bfd2-dda62a4aa45b@intel.com> (raw)
In-Reply-To: <2e9bd6a1a012b937e9205908ab6bbb09a21e0f71.1781332698.git.yu.c.chen@intel.com>

Hi Chenyu,

On 6/13/26 12:57 AM, Chen Yu wrote:
> Rename the prev_msr field in struct arch_mbm_state to prev_mon_val.

This change as described seems out of place when considering the following
from cover letter:
 This patch set focuses on the first part: enabling MMIO-based access for        
 Cache Monitoring Technology (CMT), *while CAT/MBM/MBA are still using MSR*.

It is thus confusing to find a change related to switching MBM to use MSR
in a series that claims that it does not do this.

The patch looks fine but reading the changelog and the first few hunks makes
this patch look out of place. Could you please update the changelog to be 
accurate about what this patch does?

> With ERDT, the previous monitor value may come from an MMIO
> register rather than from an MSR, so the "msr" suffix is no longer
> accurate. The new name describes the field by its meaning (the
> previous monitor value) instead of by the access method.
> 
> This is preparation for ERDT support, which reads monitoring
> counters via MMIO.
> 
> No functional change.
> 
Reinette

  reply	other threads:[~2026-06-18 23:39 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-13  7:56 [PATCH v4 0/6] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
2026-06-13  7:56 ` [PATCH v4 1/6] x86/resctrl: Parse ACPI ERDT table and map RMDD domains by L3 cache ID Chen Yu
2026-06-18 23:37   ` Reinette Chatre
2026-06-22  9:07     ` Chen, Yu C
2026-06-22 21:28       ` Reinette Chatre
2026-06-23  6:29         ` Chen, Yu C
2026-06-23 11:43           ` Chen, Yu C
2026-06-23 16:46             ` Reinette Chatre
2026-06-13  7:57 ` [PATCH v4 2/6] x86/resctrl: Parse ACPI CMRC table Chen Yu
2026-06-13  7:57 ` [PATCH v4 3/6] x86/resctrl: Rename prev_msr to prev_mon_val Chen Yu
2026-06-18 23:39   ` Reinette Chatre [this message]
2026-06-22 12:42     ` Chen, Yu C
2026-06-22 21:29       ` Reinette Chatre
2026-06-23  7:48         ` Chen, Yu C
2026-06-23 16:47           ` Reinette Chatre
2026-06-13  7:57 ` [PATCH v4 4/6] x86/resctrl: Refactor the monitor read function Chen Yu
2026-06-13  7:57 ` [PATCH v4 5/6] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Chen Yu
2026-06-13  7:57 ` [PATCH v4 6/6] x86/resctrl: Add support for L3 occupancy monitoring via RMID MMIO read Chen Yu
2026-06-18 23:40   ` Reinette Chatre
2026-06-22 14:09     ` Chen, Yu C
2026-06-22 21:30       ` Reinette Chatre
2026-06-23  5:00         ` Chen, Yu C
2026-06-23 16:48           ` Reinette Chatre

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