* [PATCH v3 0/4] Add gt_to_guc() helper
@ 2023-12-06 20:46 ` Andi Shyti
0 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, Andi Shyti, dri-devel, Nirmoy Das
Hi,
this is just a resend of this series:
https://patchwork.freedesktop.org/series/125583/
but I removed patch one that introduces guc_to_i915()
Thanks,
Andi
Changelog:
==========
v2 -> v3:
- Remove patch 1 that contained guc_to_i915()
v1 -> v2:
- add the gt_to_guc() helper and change files in:
- i915/gt/
- i915/gt/uc
- i915/
Andi Shyti (4):
drm/i915/gt: Create the gt_to_guc() wrapper
drm/i915/guc: Use the new gt_to_guc() wrapper
drm/i915: Use the new gt_to_guc() wrapper
drm/i915/guc: Use the ce_to_guc() wrapper whenever possible
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 +--
drivers/gpu/drm/i915/gt/intel_ggtt.c | 9 ++----
drivers/gpu/drm/i915/gt/intel_gt.h | 5 ++++
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 6 ++--
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 8 ++---
drivers/gpu/drm/i915/gt/intel_rc6.c | 4 +--
drivers/gpu/drm/i915/gt/intel_rps.c | 2 +-
drivers/gpu/drm/i915/gt/intel_tlb.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 ++--
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 +--
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 3 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_capture.c | 6 ++--
.../gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 30 +++++++++----------
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +--
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +--
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +-
drivers/gpu/drm/i915/i915_debugfs_params.c | 2 +-
.../i915/selftests/intel_scheduler_helpers.c | 4 +--
21 files changed, 57 insertions(+), 54 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 16+ messages in thread* [Intel-gfx] [PATCH v3 1/4] drm/i915/gt: Create the gt_to_guc() wrapper
2023-12-06 20:46 ` Andi Shyti
@ 2023-12-06 20:46 ` Andi Shyti
-1 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel, Nirmoy Das
We already have guc_to_gt() and getting to guc from the GT it
requires some mental effort. Add the gt_to_guc().
Given the reference to the "gt", the gt_to_guc() will return the
pinter to the "guc".
Update all the files under the gt/ directory.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_ggtt.c | 9 +++------
drivers/gpu/drm/i915/gt/intel_gt.h | 5 +++++
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_rc6.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 2 +-
drivers/gpu/drm/i915/gt/intel_tlb.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 +++---
10 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 40687806d22a..bede7f09d4af 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -589,7 +589,7 @@ u64 intel_clamp_preempt_timeout_ms(struct intel_engine_cs *engine, u64 value)
* NB: The GuC API only supports 32bit values. However, the limit is further
* reduced due to internal calculations which would otherwise overflow.
*/
- if (intel_guc_submission_is_wanted(&engine->gt->uc.guc))
+ if (intel_guc_submission_is_wanted(gt_to_guc(engine->gt)))
value = min_t(u64, value, guc_policy_max_preempt_timeout_ms());
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
@@ -610,7 +610,7 @@ u64 intel_clamp_timeslice_duration_ms(struct intel_engine_cs *engine, u64 value)
* NB: The GuC API only supports 32bit values. However, the limit is further
* reduced due to internal calculations which would otherwise overflow.
*/
- if (intel_guc_submission_is_wanted(&engine->gt->uc.guc))
+ if (intel_guc_submission_is_wanted(gt_to_guc(engine->gt)))
value = min_t(u64, value, guc_policy_max_exec_quantum_ms());
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 21a7e3191c18..aa1e9249d393 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -230,11 +230,8 @@ static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
struct intel_uncore *uncore = gt->uncore;
intel_wakeref_t wakeref;
- with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
- struct intel_guc *guc = >->uc.guc;
-
- intel_guc_invalidate_tlb_guc(guc);
- }
+ with_intel_runtime_pm_if_active(uncore->rpm, wakeref)
+ intel_guc_invalidate_tlb_guc(gt_to_guc(gt));
}
static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
@@ -245,7 +242,7 @@ static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
gen8_ggtt_invalidate(ggtt);
list_for_each_entry(gt, &ggtt->gt_list, ggtt_link) {
- if (intel_guc_tlb_invalidation_is_available(>->uc.guc))
+ if (intel_guc_tlb_invalidation_is_available(gt_to_guc(gt)))
guc_ggtt_ct_invalidate(gt);
else if (GRAPHICS_VER(i915) >= 12)
intel_uncore_write_fw(gt->uncore,
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index b0e453e27ea8..d7c859039828 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -118,6 +118,11 @@ static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
return container_of(gsc, struct intel_gt, gsc);
}
+static inline struct intel_guc *gt_to_guc(struct intel_gt *gt)
+{
+ return >->uc.guc;
+}
+
void intel_gt_common_init_early(struct intel_gt *gt);
int intel_root_gt_init_early(struct drm_i915_private *i915);
int intel_gt_assign_ggtt(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 77fb57223465..ad4c51f18d3a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -68,9 +68,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
struct intel_gt *media_gt = gt->i915->media_gt;
if (instance == OTHER_GUC_INSTANCE)
- return guc_irq_handler(>->uc.guc, iir);
+ return guc_irq_handler(gt_to_guc(gt), iir);
if (instance == OTHER_MEDIA_GUC_INSTANCE && media_gt)
- return guc_irq_handler(&media_gt->uc.guc, iir);
+ return guc_irq_handler(gt_to_guc(media_gt), iir);
if (instance == OTHER_GTPM_INSTANCE)
return gen11_rps_irq_handler(>->rps, iir);
@@ -442,7 +442,7 @@ void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl)
iir = raw_reg_read(regs, GEN8_GT_IIR(2));
if (likely(iir)) {
gen6_rps_irq_handler(>->rps, iir);
- guc_irq_handler(>->uc.guc, iir >> 16);
+ guc_irq_handler(gt_to_guc(gt), iir >> 16);
raw_reg_write(regs, GEN8_GT_IIR(2), iir);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index 7114c116e928..37e8d50c99ed 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -538,7 +538,7 @@ static bool rps_eval(void *data)
{
struct intel_gt *gt = data;
- if (intel_guc_slpc_is_used(>->uc.guc))
+ if (intel_guc_slpc_is_used(gt_to_guc(gt)))
return false;
else
return HAS_RPS(gt->i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
index f0dea54880af..8b7813cac33e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
@@ -456,7 +456,7 @@ static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj,
char *buff)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
return sysfs_emit(buff, "%u\n", slpc->ignore_eff_freq);
}
@@ -466,7 +466,7 @@ static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj,
const char *buff, size_t count)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
int err;
u32 val;
@@ -587,7 +587,7 @@ static ssize_t media_freq_factor_show(struct kobject *kobj,
char *buff)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
intel_wakeref_t wakeref;
u32 mode;
@@ -618,7 +618,7 @@ static ssize_t media_freq_factor_store(struct kobject *kobj,
const char *buff, size_t count)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
u32 factor, mode;
int err;
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 7090e4be29cb..ee14d376ca7b 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -109,7 +109,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
* thus allowing GuC to control RC6 entry/exit fully instead.
* We will not set the HW ENABLE and EI bits
*/
- if (!intel_guc_rc_enable(>->uc.guc))
+ if (!intel_guc_rc_enable(gt_to_guc(gt)))
rc6->ctl_enable = GEN6_RC_CTL_RC6_ENABLE;
else
rc6->ctl_enable =
@@ -569,7 +569,7 @@ static void __intel_rc6_disable(struct intel_rc6 *rc6)
struct intel_gt *gt = rc6_to_gt(rc6);
/* Take control of RC6 back from GuC */
- intel_guc_rc_disable(>->uc.guc);
+ intel_guc_rc_disable(gt_to_guc(gt));
intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
if (GRAPHICS_VER(i915) >= 9)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 4feef874e6d6..9c6812257ac2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -52,7 +52,7 @@ static struct intel_guc_slpc *rps_to_slpc(struct intel_rps *rps)
{
struct intel_gt *gt = rps_to_gt(rps);
- return >->uc.guc.slpc;
+ return >_to_guc(gt)->slpc;
}
static bool rps_uses_slpc(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 4bb13d1890e3..756e9ebbc725 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -132,7 +132,7 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno)
return;
with_intel_gt_pm_if_awake(gt, wakeref) {
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
mutex_lock(>->tlb.invalidate_lock);
if (tlb_seqno_passed(gt, seqno))
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index 302d0540295d..4ecc4ae74a54 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -53,7 +53,7 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
static int slpc_set_freq(struct intel_gt *gt, u32 freq)
{
int err;
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
err = slpc_set_max_freq(slpc, freq);
if (err) {
@@ -182,7 +182,7 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
{
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
struct {
u64 power;
int freq;
@@ -262,7 +262,7 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
static int run_test(struct intel_gt *gt, int test_type)
{
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
struct intel_rps *rps = >->rps;
struct intel_engine_cs *engine;
enum intel_engine_id id;
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 1/4] drm/i915/gt: Create the gt_to_guc() wrapper
@ 2023-12-06 20:46 ` Andi Shyti
0 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, Andi Shyti, dri-devel, Nirmoy Das
We already have guc_to_gt() and getting to guc from the GT it
requires some mental effort. Add the gt_to_guc().
Given the reference to the "gt", the gt_to_guc() will return the
pinter to the "guc".
Update all the files under the gt/ directory.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_ggtt.c | 9 +++------
drivers/gpu/drm/i915/gt/intel_gt.h | 5 +++++
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_rc6.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 2 +-
drivers/gpu/drm/i915/gt/intel_tlb.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 +++---
10 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 40687806d22a..bede7f09d4af 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -589,7 +589,7 @@ u64 intel_clamp_preempt_timeout_ms(struct intel_engine_cs *engine, u64 value)
* NB: The GuC API only supports 32bit values. However, the limit is further
* reduced due to internal calculations which would otherwise overflow.
*/
- if (intel_guc_submission_is_wanted(&engine->gt->uc.guc))
+ if (intel_guc_submission_is_wanted(gt_to_guc(engine->gt)))
value = min_t(u64, value, guc_policy_max_preempt_timeout_ms());
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
@@ -610,7 +610,7 @@ u64 intel_clamp_timeslice_duration_ms(struct intel_engine_cs *engine, u64 value)
* NB: The GuC API only supports 32bit values. However, the limit is further
* reduced due to internal calculations which would otherwise overflow.
*/
- if (intel_guc_submission_is_wanted(&engine->gt->uc.guc))
+ if (intel_guc_submission_is_wanted(gt_to_guc(engine->gt)))
value = min_t(u64, value, guc_policy_max_exec_quantum_ms());
value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 21a7e3191c18..aa1e9249d393 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -230,11 +230,8 @@ static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
struct intel_uncore *uncore = gt->uncore;
intel_wakeref_t wakeref;
- with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
- struct intel_guc *guc = >->uc.guc;
-
- intel_guc_invalidate_tlb_guc(guc);
- }
+ with_intel_runtime_pm_if_active(uncore->rpm, wakeref)
+ intel_guc_invalidate_tlb_guc(gt_to_guc(gt));
}
static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
@@ -245,7 +242,7 @@ static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
gen8_ggtt_invalidate(ggtt);
list_for_each_entry(gt, &ggtt->gt_list, ggtt_link) {
- if (intel_guc_tlb_invalidation_is_available(>->uc.guc))
+ if (intel_guc_tlb_invalidation_is_available(gt_to_guc(gt)))
guc_ggtt_ct_invalidate(gt);
else if (GRAPHICS_VER(i915) >= 12)
intel_uncore_write_fw(gt->uncore,
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index b0e453e27ea8..d7c859039828 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -118,6 +118,11 @@ static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
return container_of(gsc, struct intel_gt, gsc);
}
+static inline struct intel_guc *gt_to_guc(struct intel_gt *gt)
+{
+ return >->uc.guc;
+}
+
void intel_gt_common_init_early(struct intel_gt *gt);
int intel_root_gt_init_early(struct drm_i915_private *i915);
int intel_gt_assign_ggtt(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 77fb57223465..ad4c51f18d3a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -68,9 +68,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
struct intel_gt *media_gt = gt->i915->media_gt;
if (instance == OTHER_GUC_INSTANCE)
- return guc_irq_handler(>->uc.guc, iir);
+ return guc_irq_handler(gt_to_guc(gt), iir);
if (instance == OTHER_MEDIA_GUC_INSTANCE && media_gt)
- return guc_irq_handler(&media_gt->uc.guc, iir);
+ return guc_irq_handler(gt_to_guc(media_gt), iir);
if (instance == OTHER_GTPM_INSTANCE)
return gen11_rps_irq_handler(>->rps, iir);
@@ -442,7 +442,7 @@ void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl)
iir = raw_reg_read(regs, GEN8_GT_IIR(2));
if (likely(iir)) {
gen6_rps_irq_handler(>->rps, iir);
- guc_irq_handler(>->uc.guc, iir >> 16);
+ guc_irq_handler(gt_to_guc(gt), iir >> 16);
raw_reg_write(regs, GEN8_GT_IIR(2), iir);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index 7114c116e928..37e8d50c99ed 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -538,7 +538,7 @@ static bool rps_eval(void *data)
{
struct intel_gt *gt = data;
- if (intel_guc_slpc_is_used(>->uc.guc))
+ if (intel_guc_slpc_is_used(gt_to_guc(gt)))
return false;
else
return HAS_RPS(gt->i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
index f0dea54880af..8b7813cac33e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
@@ -456,7 +456,7 @@ static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj,
char *buff)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
return sysfs_emit(buff, "%u\n", slpc->ignore_eff_freq);
}
@@ -466,7 +466,7 @@ static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj,
const char *buff, size_t count)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
int err;
u32 val;
@@ -587,7 +587,7 @@ static ssize_t media_freq_factor_show(struct kobject *kobj,
char *buff)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
intel_wakeref_t wakeref;
u32 mode;
@@ -618,7 +618,7 @@ static ssize_t media_freq_factor_store(struct kobject *kobj,
const char *buff, size_t count)
{
struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
u32 factor, mode;
int err;
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 7090e4be29cb..ee14d376ca7b 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -109,7 +109,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
* thus allowing GuC to control RC6 entry/exit fully instead.
* We will not set the HW ENABLE and EI bits
*/
- if (!intel_guc_rc_enable(>->uc.guc))
+ if (!intel_guc_rc_enable(gt_to_guc(gt)))
rc6->ctl_enable = GEN6_RC_CTL_RC6_ENABLE;
else
rc6->ctl_enable =
@@ -569,7 +569,7 @@ static void __intel_rc6_disable(struct intel_rc6 *rc6)
struct intel_gt *gt = rc6_to_gt(rc6);
/* Take control of RC6 back from GuC */
- intel_guc_rc_disable(>->uc.guc);
+ intel_guc_rc_disable(gt_to_guc(gt));
intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
if (GRAPHICS_VER(i915) >= 9)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 4feef874e6d6..9c6812257ac2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -52,7 +52,7 @@ static struct intel_guc_slpc *rps_to_slpc(struct intel_rps *rps)
{
struct intel_gt *gt = rps_to_gt(rps);
- return >->uc.guc.slpc;
+ return >_to_guc(gt)->slpc;
}
static bool rps_uses_slpc(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 4bb13d1890e3..756e9ebbc725 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -132,7 +132,7 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno)
return;
with_intel_gt_pm_if_awake(gt, wakeref) {
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
mutex_lock(>->tlb.invalidate_lock);
if (tlb_seqno_passed(gt, seqno))
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index 302d0540295d..4ecc4ae74a54 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -53,7 +53,7 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
static int slpc_set_freq(struct intel_gt *gt, u32 freq)
{
int err;
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
err = slpc_set_max_freq(slpc, freq);
if (err) {
@@ -182,7 +182,7 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
{
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
struct {
u64 power;
int freq;
@@ -262,7 +262,7 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
static int run_test(struct intel_gt *gt, int test_type)
{
- struct intel_guc_slpc *slpc = >->uc.guc.slpc;
+ struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
struct intel_rps *rps = >->rps;
struct intel_engine_cs *engine;
enum intel_engine_id id;
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v3 1/4] drm/i915/gt: Create the gt_to_guc() wrapper
2023-12-06 20:46 ` Andi Shyti
(?)
@ 2023-12-21 9:19 ` Nirmoy Das
-1 siblings, 0 replies; 16+ messages in thread
From: Nirmoy Das @ 2023-12-21 9:19 UTC (permalink / raw)
To: Andi Shyti, John Harrison; +Cc: intel-gfx, dri-devel
On 12/6/2023 9:46 PM, Andi Shyti wrote:
> We already have guc_to_gt() and getting to guc from the GT it
> requires some mental effort. Add the gt_to_guc().
>
> Given the reference to the "gt", the gt_to_guc() will return the
> pinter to the "guc".
>
> Update all the files under the gt/ directory.
>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 9 +++------
> drivers/gpu/drm/i915/gt/intel_gt.h | 5 +++++
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 6 +++---
> drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 8 ++++----
> drivers/gpu/drm/i915/gt/intel_rc6.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_tlb.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 +++---
> 10 files changed, 25 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 40687806d22a..bede7f09d4af 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -589,7 +589,7 @@ u64 intel_clamp_preempt_timeout_ms(struct intel_engine_cs *engine, u64 value)
> * NB: The GuC API only supports 32bit values. However, the limit is further
> * reduced due to internal calculations which would otherwise overflow.
> */
> - if (intel_guc_submission_is_wanted(&engine->gt->uc.guc))
> + if (intel_guc_submission_is_wanted(gt_to_guc(engine->gt)))
> value = min_t(u64, value, guc_policy_max_preempt_timeout_ms());
>
> value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
> @@ -610,7 +610,7 @@ u64 intel_clamp_timeslice_duration_ms(struct intel_engine_cs *engine, u64 value)
> * NB: The GuC API only supports 32bit values. However, the limit is further
> * reduced due to internal calculations which would otherwise overflow.
> */
> - if (intel_guc_submission_is_wanted(&engine->gt->uc.guc))
> + if (intel_guc_submission_is_wanted(gt_to_guc(engine->gt)))
> value = min_t(u64, value, guc_policy_max_exec_quantum_ms());
>
> value = min_t(u64, value, jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT));
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 21a7e3191c18..aa1e9249d393 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -230,11 +230,8 @@ static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
> struct intel_uncore *uncore = gt->uncore;
> intel_wakeref_t wakeref;
>
> - with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
> - struct intel_guc *guc = >->uc.guc;
> -
> - intel_guc_invalidate_tlb_guc(guc);
> - }
> + with_intel_runtime_pm_if_active(uncore->rpm, wakeref)
> + intel_guc_invalidate_tlb_guc(gt_to_guc(gt));
> }
>
> static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> @@ -245,7 +242,7 @@ static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
> gen8_ggtt_invalidate(ggtt);
>
> list_for_each_entry(gt, &ggtt->gt_list, ggtt_link) {
> - if (intel_guc_tlb_invalidation_is_available(>->uc.guc))
> + if (intel_guc_tlb_invalidation_is_available(gt_to_guc(gt)))
> guc_ggtt_ct_invalidate(gt);
> else if (GRAPHICS_VER(i915) >= 12)
> intel_uncore_write_fw(gt->uncore,
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index b0e453e27ea8..d7c859039828 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -118,6 +118,11 @@ static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
> return container_of(gsc, struct intel_gt, gsc);
> }
>
> +static inline struct intel_guc *gt_to_guc(struct intel_gt *gt)
> +{
> + return >->uc.guc;
> +}
> +
> void intel_gt_common_init_early(struct intel_gt *gt);
> int intel_root_gt_init_early(struct drm_i915_private *i915);
> int intel_gt_assign_ggtt(struct intel_gt *gt);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index 77fb57223465..ad4c51f18d3a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -68,9 +68,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
> struct intel_gt *media_gt = gt->i915->media_gt;
>
> if (instance == OTHER_GUC_INSTANCE)
> - return guc_irq_handler(>->uc.guc, iir);
> + return guc_irq_handler(gt_to_guc(gt), iir);
> if (instance == OTHER_MEDIA_GUC_INSTANCE && media_gt)
> - return guc_irq_handler(&media_gt->uc.guc, iir);
> + return guc_irq_handler(gt_to_guc(media_gt), iir);
>
> if (instance == OTHER_GTPM_INSTANCE)
> return gen11_rps_irq_handler(>->rps, iir);
> @@ -442,7 +442,7 @@ void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl)
> iir = raw_reg_read(regs, GEN8_GT_IIR(2));
> if (likely(iir)) {
> gen6_rps_irq_handler(>->rps, iir);
> - guc_irq_handler(>->uc.guc, iir >> 16);
> + guc_irq_handler(gt_to_guc(gt), iir >> 16);
> raw_reg_write(regs, GEN8_GT_IIR(2), iir);
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> index 7114c116e928..37e8d50c99ed 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> @@ -538,7 +538,7 @@ static bool rps_eval(void *data)
> {
> struct intel_gt *gt = data;
>
> - if (intel_guc_slpc_is_used(>->uc.guc))
> + if (intel_guc_slpc_is_used(gt_to_guc(gt)))
> return false;
> else
> return HAS_RPS(gt->i915);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> index f0dea54880af..8b7813cac33e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> @@ -456,7 +456,7 @@ static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj,
> char *buff)
> {
> struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
>
> return sysfs_emit(buff, "%u\n", slpc->ignore_eff_freq);
> }
> @@ -466,7 +466,7 @@ static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj,
> const char *buff, size_t count)
> {
> struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
> int err;
> u32 val;
>
> @@ -587,7 +587,7 @@ static ssize_t media_freq_factor_show(struct kobject *kobj,
> char *buff)
> {
> struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
> intel_wakeref_t wakeref;
> u32 mode;
>
> @@ -618,7 +618,7 @@ static ssize_t media_freq_factor_store(struct kobject *kobj,
> const char *buff, size_t count)
> {
> struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
> u32 factor, mode;
> int err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
> index 7090e4be29cb..ee14d376ca7b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> @@ -109,7 +109,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
> * thus allowing GuC to control RC6 entry/exit fully instead.
> * We will not set the HW ENABLE and EI bits
> */
> - if (!intel_guc_rc_enable(>->uc.guc))
> + if (!intel_guc_rc_enable(gt_to_guc(gt)))
> rc6->ctl_enable = GEN6_RC_CTL_RC6_ENABLE;
> else
> rc6->ctl_enable =
> @@ -569,7 +569,7 @@ static void __intel_rc6_disable(struct intel_rc6 *rc6)
> struct intel_gt *gt = rc6_to_gt(rc6);
>
> /* Take control of RC6 back from GuC */
> - intel_guc_rc_disable(>->uc.guc);
> + intel_guc_rc_disable(gt_to_guc(gt));
>
> intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
> if (GRAPHICS_VER(i915) >= 9)
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 4feef874e6d6..9c6812257ac2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -52,7 +52,7 @@ static struct intel_guc_slpc *rps_to_slpc(struct intel_rps *rps)
> {
> struct intel_gt *gt = rps_to_gt(rps);
>
> - return >->uc.guc.slpc;
> + return >_to_guc(gt)->slpc;
> }
>
> static bool rps_uses_slpc(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c b/drivers/gpu/drm/i915/gt/intel_tlb.c
> index 4bb13d1890e3..756e9ebbc725 100644
> --- a/drivers/gpu/drm/i915/gt/intel_tlb.c
> +++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
> @@ -132,7 +132,7 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno)
> return;
>
> with_intel_gt_pm_if_awake(gt, wakeref) {
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
>
> mutex_lock(>->tlb.invalidate_lock);
> if (tlb_seqno_passed(gt, seqno))
> diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
> index 302d0540295d..4ecc4ae74a54 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
> @@ -53,7 +53,7 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
> static int slpc_set_freq(struct intel_gt *gt, u32 freq)
> {
> int err;
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
>
> err = slpc_set_max_freq(slpc, freq);
> if (err) {
> @@ -182,7 +182,7 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
>
> static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
> {
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
> struct {
> u64 power;
> int freq;
> @@ -262,7 +262,7 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
>
> static int run_test(struct intel_gt *gt, int test_type)
> {
> - struct intel_guc_slpc *slpc = >->uc.guc.slpc;
> + struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
> struct intel_rps *rps = >->rps;
> struct intel_engine_cs *engine;
> enum intel_engine_id id;
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH v3 2/4] drm/i915/guc: Use the new gt_to_guc() wrapper
2023-12-06 20:46 ` Andi Shyti
@ 2023-12-06 20:46 ` Andi Shyti
-1 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel, Nirmoy Das
Get the guc reference from the gt using the gt_to_guc() helper.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 +--
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 3 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_capture.c | 6 ++--
.../gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 28 +++++++++----------
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +--
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +--
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +-
9 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index e2e42b3e0d5d..3b69bc6616bd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -298,7 +298,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
memcpy_toio(gsc->local_vaddr, src, gsc->fw.size);
memset_io(gsc->local_vaddr + gsc->fw.size, 0, gsc->local->size - gsc->fw.size);
- intel_guc_write_barrier(>->uc.guc);
+ intel_guc_write_barrier(gt_to_guc(gt));
i915_gem_object_unpin_map(gsc->fw.obj);
@@ -351,7 +351,7 @@ static int gsc_fw_query_compatibility_version(struct intel_gsc_uc *gsc)
void *vaddr;
int err;
- err = intel_guc_allocate_and_map_vma(>->uc.guc, GSC_VER_PKT_SZ * 2,
+ err = intel_guc_allocate_and_map_vma(gt_to_guc(gt), GSC_VER_PKT_SZ * 2,
&vma, &vaddr);
if (err) {
gt_err(gt, "failed to allocate vma for GSC version query\n");
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
index 40817ebcca71..a7d5465655f9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
@@ -358,7 +358,8 @@ static int proxy_channel_alloc(struct intel_gsc_uc *gsc)
void *vaddr;
int err;
- err = intel_guc_allocate_and_map_vma(>->uc.guc, GSC_PROXY_CHANNEL_SIZE,
+ err = intel_guc_allocate_and_map_vma(gt_to_guc(gt),
+ GSC_PROXY_CHANNEL_SIZE,
&vma, &vaddr);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 63724e17829a..1ef470e64604 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -956,7 +956,7 @@ u32 intel_guc_engine_usage_offset(struct intel_guc *guc)
struct iosys_map intel_guc_engine_usage_record_map(struct intel_engine_cs *engine)
{
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u8 guc_class = engine_class_to_guc_class(engine->class);
size_t offset = offsetof(struct __guc_ads_blob,
engine_usage.engines[guc_class][ilog2(engine->logical_mask)]);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index a4da0208c883..84a8807391c5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -1441,7 +1441,7 @@ int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf,
if (!cap || !ee->engine)
return -ENODEV;
- guc = &ee->engine->gt->uc.guc;
+ guc = gt_to_guc(ee->engine->gt);
i915_error_printf(ebuf, "global --- GuC Error Capture on %s command stream:\n",
ee->engine->name);
@@ -1543,7 +1543,7 @@ bool intel_guc_capture_is_matching_engine(struct intel_gt *gt,
if (!gt || !ce || !engine)
return false;
- guc = >->uc.guc;
+ guc = gt_to_guc(gt);
if (!guc->capture)
return false;
@@ -1573,7 +1573,7 @@ void intel_guc_capture_get_matching_node(struct intel_gt *gt,
if (!gt || !ee || !ce)
return;
- guc = >->uc.guc;
+ guc = gt_to_guc(gt);
if (!guc->capture)
return;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
index cc9569af7f0c..b67a15f74276 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
@@ -111,7 +111,7 @@ static bool has_table(struct drm_i915_private *i915)
static int guc_hwconfig_init(struct intel_gt *gt)
{
struct intel_hwconfig *hwconfig = >->info.hwconfig;
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
int ret;
if (!has_table(gt->i915))
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 04f8377fd7a3..4f51cc5f1604 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -391,7 +391,7 @@ static inline void set_context_guc_id_invalid(struct intel_context *ce)
static inline struct intel_guc *ce_to_guc(struct intel_context *ce)
{
- return &ce->engine->gt->uc.guc;
+ return gt_to_guc(ce->engine->gt);
}
static inline struct i915_priolist *to_priolist(struct rb_node *rb)
@@ -1233,7 +1233,7 @@ static void __get_engine_usage_record(struct intel_engine_cs *engine,
static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)
{
struct intel_engine_guc_stats *stats = &engine->stats.guc;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u32 last_switch, ctx_id, total;
lockdep_assert_held(&guc->timestamp.lock);
@@ -1298,7 +1298,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now)
struct intel_engine_guc_stats stats_saved, *stats = &engine->stats.guc;
struct i915_gpu_error *gpu_error = &engine->i915->gpu_error;
struct intel_gt *gt = engine->gt;
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
u64 total, gt_stamp_saved;
unsigned long flags;
u32 reset_count;
@@ -1525,7 +1525,7 @@ static void guc_fini_engine_stats(struct intel_guc *guc)
void intel_guc_busyness_park(struct intel_gt *gt)
{
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
if (!guc_submission_initialized(guc))
return;
@@ -1552,7 +1552,7 @@ void intel_guc_busyness_park(struct intel_gt *gt)
void intel_guc_busyness_unpark(struct intel_gt *gt)
{
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
unsigned long flags;
ktime_t unused;
@@ -2130,7 +2130,7 @@ static bool need_tasklet(struct intel_guc *guc, struct i915_request *rq)
static void guc_submit_request(struct i915_request *rq)
{
struct i915_sched_engine *sched_engine = rq->engine->sched_engine;
- struct intel_guc *guc = &rq->engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(rq->engine->gt);
unsigned long flags;
/* Will be called from irq-context when using foreign fences. */
@@ -2596,7 +2596,7 @@ static int __guc_context_set_context_policies(struct intel_guc *guc,
static int guc_context_policy_init_v70(struct intel_context *ce, bool loop)
{
struct intel_engine_cs *engine = ce->engine;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
struct context_policy policy;
u32 execution_quantum;
u32 preemption_timeout;
@@ -2672,7 +2672,7 @@ static u32 map_guc_prio_to_lrc_desc_prio(u8 prio)
static void prepare_context_registration_info_v69(struct intel_context *ce)
{
struct intel_engine_cs *engine = ce->engine;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u32 ctx_id = ce->guc_id.id;
struct guc_lrc_desc_v69 *desc;
struct intel_context *child;
@@ -2741,7 +2741,7 @@ static void prepare_context_registration_info_v70(struct intel_context *ce,
struct guc_ctxt_registration_info *info)
{
struct intel_engine_cs *engine = ce->engine;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u32 ctx_id = ce->guc_id.id;
GEM_BUG_ON(!engine->mask);
@@ -2804,7 +2804,7 @@ static int try_context_registration(struct intel_context *ce, bool loop)
{
struct intel_engine_cs *engine = ce->engine;
struct intel_runtime_pm *runtime_pm = engine->uncore->rpm;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
intel_wakeref_t wakeref;
u32 ctx_id = ce->guc_id.id;
bool context_registered;
@@ -4435,7 +4435,7 @@ static void guc_sched_engine_destroy(struct kref *kref)
int intel_guc_submission_setup(struct intel_engine_cs *engine)
{
struct drm_i915_private *i915 = engine->i915;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
/*
* The setup relies on several assumptions (e.g. irqs always enabled)
@@ -5193,7 +5193,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
void intel_guc_find_hung_context(struct intel_engine_cs *engine)
{
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
struct intel_context *ce;
struct i915_request *rq;
unsigned long index;
@@ -5255,7 +5255,7 @@ void intel_guc_dump_active_requests(struct intel_engine_cs *engine,
struct i915_request *hung_rq,
struct drm_printer *m)
{
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
struct intel_context *ce;
unsigned long index;
unsigned long flags;
@@ -5707,7 +5707,7 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- guc = &siblings[0]->gt->uc.guc;
+ guc = gt_to_guc(siblings[0]->gt);
ve->base.i915 = siblings[0]->i915;
ve->base.gt = siblings[0]->gt;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index ba9e07fc2b57..9b5141b422e5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -384,7 +384,7 @@ int intel_huc_init(struct intel_huc *huc)
if (HAS_ENGINE(gt, GSC0)) {
struct i915_vma *vma;
- vma = intel_guc_allocate_vma(>->uc.guc, PXP43_HUC_AUTH_INOUT_SIZE * 2);
+ vma = intel_guc_allocate_vma(gt_to_guc(gt), PXP43_HUC_AUTH_INOUT_SIZE * 2);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
huc_info(huc, "Failed to allocate heci pkt\n");
@@ -488,7 +488,7 @@ int intel_huc_wait_for_auth_complete(struct intel_huc *huc,
int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type)
{
struct intel_gt *gt = huc_to_gt(huc);
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
int ret;
if (!intel_uc_fw_is_loaded(&huc->fw))
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 362639162ed6..6ba7a659d54a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -807,7 +807,7 @@ static int try_firmware_load(struct intel_uc_fw *uc_fw, const struct firmware **
static int check_mtl_huc_guc_compatibility(struct intel_gt *gt,
struct intel_uc_fw_file *huc_selected)
{
- struct intel_uc_fw_file *guc_selected = >->uc.guc.fw.file_selected;
+ struct intel_uc_fw_file *guc_selected = >_to_guc(gt)->fw.file_selected;
struct intel_uc_fw_ver *huc_ver = &huc_selected->ver;
struct intel_uc_fw_ver *guc_ver = &guc_selected->ver;
bool new_huc, new_guc;
@@ -1209,7 +1209,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
* since its GGTT offset will be GuC accessible.
*/
GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE);
- vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE);
+ vma = intel_guc_allocate_vma(gt_to_guc(gt), PAGE_SIZE);
if (IS_ERR(vma))
return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
index c900aac85adb..68feb55654f7 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
@@ -144,7 +144,7 @@ static int intel_guc_scrub_ctbs(void *arg)
static int intel_guc_steal_guc_ids(void *arg)
{
struct intel_gt *gt = arg;
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
int ret, sv, context_index = 0;
intel_wakeref_t wakeref;
struct intel_engine_cs *engine;
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 2/4] drm/i915/guc: Use the new gt_to_guc() wrapper
@ 2023-12-06 20:46 ` Andi Shyti
0 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, Andi Shyti, dri-devel, Nirmoy Das
Get the guc reference from the gt using the gt_to_guc() helper.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 +--
drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 3 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_capture.c | 6 ++--
.../gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 28 +++++++++----------
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +--
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +--
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +-
9 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index e2e42b3e0d5d..3b69bc6616bd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -298,7 +298,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
memcpy_toio(gsc->local_vaddr, src, gsc->fw.size);
memset_io(gsc->local_vaddr + gsc->fw.size, 0, gsc->local->size - gsc->fw.size);
- intel_guc_write_barrier(>->uc.guc);
+ intel_guc_write_barrier(gt_to_guc(gt));
i915_gem_object_unpin_map(gsc->fw.obj);
@@ -351,7 +351,7 @@ static int gsc_fw_query_compatibility_version(struct intel_gsc_uc *gsc)
void *vaddr;
int err;
- err = intel_guc_allocate_and_map_vma(>->uc.guc, GSC_VER_PKT_SZ * 2,
+ err = intel_guc_allocate_and_map_vma(gt_to_guc(gt), GSC_VER_PKT_SZ * 2,
&vma, &vaddr);
if (err) {
gt_err(gt, "failed to allocate vma for GSC version query\n");
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
index 40817ebcca71..a7d5465655f9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
@@ -358,7 +358,8 @@ static int proxy_channel_alloc(struct intel_gsc_uc *gsc)
void *vaddr;
int err;
- err = intel_guc_allocate_and_map_vma(>->uc.guc, GSC_PROXY_CHANNEL_SIZE,
+ err = intel_guc_allocate_and_map_vma(gt_to_guc(gt),
+ GSC_PROXY_CHANNEL_SIZE,
&vma, &vaddr);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 63724e17829a..1ef470e64604 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -956,7 +956,7 @@ u32 intel_guc_engine_usage_offset(struct intel_guc *guc)
struct iosys_map intel_guc_engine_usage_record_map(struct intel_engine_cs *engine)
{
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u8 guc_class = engine_class_to_guc_class(engine->class);
size_t offset = offsetof(struct __guc_ads_blob,
engine_usage.engines[guc_class][ilog2(engine->logical_mask)]);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index a4da0208c883..84a8807391c5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -1441,7 +1441,7 @@ int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf,
if (!cap || !ee->engine)
return -ENODEV;
- guc = &ee->engine->gt->uc.guc;
+ guc = gt_to_guc(ee->engine->gt);
i915_error_printf(ebuf, "global --- GuC Error Capture on %s command stream:\n",
ee->engine->name);
@@ -1543,7 +1543,7 @@ bool intel_guc_capture_is_matching_engine(struct intel_gt *gt,
if (!gt || !ce || !engine)
return false;
- guc = >->uc.guc;
+ guc = gt_to_guc(gt);
if (!guc->capture)
return false;
@@ -1573,7 +1573,7 @@ void intel_guc_capture_get_matching_node(struct intel_gt *gt,
if (!gt || !ee || !ce)
return;
- guc = >->uc.guc;
+ guc = gt_to_guc(gt);
if (!guc->capture)
return;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
index cc9569af7f0c..b67a15f74276 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
@@ -111,7 +111,7 @@ static bool has_table(struct drm_i915_private *i915)
static int guc_hwconfig_init(struct intel_gt *gt)
{
struct intel_hwconfig *hwconfig = >->info.hwconfig;
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
int ret;
if (!has_table(gt->i915))
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 04f8377fd7a3..4f51cc5f1604 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -391,7 +391,7 @@ static inline void set_context_guc_id_invalid(struct intel_context *ce)
static inline struct intel_guc *ce_to_guc(struct intel_context *ce)
{
- return &ce->engine->gt->uc.guc;
+ return gt_to_guc(ce->engine->gt);
}
static inline struct i915_priolist *to_priolist(struct rb_node *rb)
@@ -1233,7 +1233,7 @@ static void __get_engine_usage_record(struct intel_engine_cs *engine,
static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)
{
struct intel_engine_guc_stats *stats = &engine->stats.guc;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u32 last_switch, ctx_id, total;
lockdep_assert_held(&guc->timestamp.lock);
@@ -1298,7 +1298,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now)
struct intel_engine_guc_stats stats_saved, *stats = &engine->stats.guc;
struct i915_gpu_error *gpu_error = &engine->i915->gpu_error;
struct intel_gt *gt = engine->gt;
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
u64 total, gt_stamp_saved;
unsigned long flags;
u32 reset_count;
@@ -1525,7 +1525,7 @@ static void guc_fini_engine_stats(struct intel_guc *guc)
void intel_guc_busyness_park(struct intel_gt *gt)
{
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
if (!guc_submission_initialized(guc))
return;
@@ -1552,7 +1552,7 @@ void intel_guc_busyness_park(struct intel_gt *gt)
void intel_guc_busyness_unpark(struct intel_gt *gt)
{
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
unsigned long flags;
ktime_t unused;
@@ -2130,7 +2130,7 @@ static bool need_tasklet(struct intel_guc *guc, struct i915_request *rq)
static void guc_submit_request(struct i915_request *rq)
{
struct i915_sched_engine *sched_engine = rq->engine->sched_engine;
- struct intel_guc *guc = &rq->engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(rq->engine->gt);
unsigned long flags;
/* Will be called from irq-context when using foreign fences. */
@@ -2596,7 +2596,7 @@ static int __guc_context_set_context_policies(struct intel_guc *guc,
static int guc_context_policy_init_v70(struct intel_context *ce, bool loop)
{
struct intel_engine_cs *engine = ce->engine;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
struct context_policy policy;
u32 execution_quantum;
u32 preemption_timeout;
@@ -2672,7 +2672,7 @@ static u32 map_guc_prio_to_lrc_desc_prio(u8 prio)
static void prepare_context_registration_info_v69(struct intel_context *ce)
{
struct intel_engine_cs *engine = ce->engine;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u32 ctx_id = ce->guc_id.id;
struct guc_lrc_desc_v69 *desc;
struct intel_context *child;
@@ -2741,7 +2741,7 @@ static void prepare_context_registration_info_v70(struct intel_context *ce,
struct guc_ctxt_registration_info *info)
{
struct intel_engine_cs *engine = ce->engine;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
u32 ctx_id = ce->guc_id.id;
GEM_BUG_ON(!engine->mask);
@@ -2804,7 +2804,7 @@ static int try_context_registration(struct intel_context *ce, bool loop)
{
struct intel_engine_cs *engine = ce->engine;
struct intel_runtime_pm *runtime_pm = engine->uncore->rpm;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
intel_wakeref_t wakeref;
u32 ctx_id = ce->guc_id.id;
bool context_registered;
@@ -4435,7 +4435,7 @@ static void guc_sched_engine_destroy(struct kref *kref)
int intel_guc_submission_setup(struct intel_engine_cs *engine)
{
struct drm_i915_private *i915 = engine->i915;
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
/*
* The setup relies on several assumptions (e.g. irqs always enabled)
@@ -5193,7 +5193,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
void intel_guc_find_hung_context(struct intel_engine_cs *engine)
{
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
struct intel_context *ce;
struct i915_request *rq;
unsigned long index;
@@ -5255,7 +5255,7 @@ void intel_guc_dump_active_requests(struct intel_engine_cs *engine,
struct i915_request *hung_rq,
struct drm_printer *m)
{
- struct intel_guc *guc = &engine->gt->uc.guc;
+ struct intel_guc *guc = gt_to_guc(engine->gt);
struct intel_context *ce;
unsigned long index;
unsigned long flags;
@@ -5707,7 +5707,7 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- guc = &siblings[0]->gt->uc.guc;
+ guc = gt_to_guc(siblings[0]->gt);
ve->base.i915 = siblings[0]->i915;
ve->base.gt = siblings[0]->gt;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index ba9e07fc2b57..9b5141b422e5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -384,7 +384,7 @@ int intel_huc_init(struct intel_huc *huc)
if (HAS_ENGINE(gt, GSC0)) {
struct i915_vma *vma;
- vma = intel_guc_allocate_vma(>->uc.guc, PXP43_HUC_AUTH_INOUT_SIZE * 2);
+ vma = intel_guc_allocate_vma(gt_to_guc(gt), PXP43_HUC_AUTH_INOUT_SIZE * 2);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
huc_info(huc, "Failed to allocate heci pkt\n");
@@ -488,7 +488,7 @@ int intel_huc_wait_for_auth_complete(struct intel_huc *huc,
int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type)
{
struct intel_gt *gt = huc_to_gt(huc);
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
int ret;
if (!intel_uc_fw_is_loaded(&huc->fw))
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 362639162ed6..6ba7a659d54a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -807,7 +807,7 @@ static int try_firmware_load(struct intel_uc_fw *uc_fw, const struct firmware **
static int check_mtl_huc_guc_compatibility(struct intel_gt *gt,
struct intel_uc_fw_file *huc_selected)
{
- struct intel_uc_fw_file *guc_selected = >->uc.guc.fw.file_selected;
+ struct intel_uc_fw_file *guc_selected = >_to_guc(gt)->fw.file_selected;
struct intel_uc_fw_ver *huc_ver = &huc_selected->ver;
struct intel_uc_fw_ver *guc_ver = &guc_selected->ver;
bool new_huc, new_guc;
@@ -1209,7 +1209,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
* since its GGTT offset will be GuC accessible.
*/
GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE);
- vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE);
+ vma = intel_guc_allocate_vma(gt_to_guc(gt), PAGE_SIZE);
if (IS_ERR(vma))
return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
index c900aac85adb..68feb55654f7 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
@@ -144,7 +144,7 @@ static int intel_guc_scrub_ctbs(void *arg)
static int intel_guc_steal_guc_ids(void *arg)
{
struct intel_gt *gt = arg;
- struct intel_guc *guc = >->uc.guc;
+ struct intel_guc *guc = gt_to_guc(gt);
int ret, sv, context_index = 0;
intel_wakeref_t wakeref;
struct intel_engine_cs *engine;
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v3 2/4] drm/i915/guc: Use the new gt_to_guc() wrapper
2023-12-06 20:46 ` Andi Shyti
(?)
@ 2023-12-21 9:20 ` Nirmoy Das
-1 siblings, 0 replies; 16+ messages in thread
From: Nirmoy Das @ 2023-12-21 9:20 UTC (permalink / raw)
To: Andi Shyti, John Harrison; +Cc: intel-gfx, dri-devel
On 12/6/2023 9:46 PM, Andi Shyti wrote:
> Get the guc reference from the gt using the gt_to_guc() helper.
>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 +--
> drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c | 3 +-
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +-
> .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 6 ++--
> .../gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 2 +-
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 28 +++++++++----------
> drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 +--
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +--
> drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +-
> 9 files changed, 28 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index e2e42b3e0d5d..3b69bc6616bd 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -298,7 +298,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> memcpy_toio(gsc->local_vaddr, src, gsc->fw.size);
> memset_io(gsc->local_vaddr + gsc->fw.size, 0, gsc->local->size - gsc->fw.size);
>
> - intel_guc_write_barrier(>->uc.guc);
> + intel_guc_write_barrier(gt_to_guc(gt));
>
> i915_gem_object_unpin_map(gsc->fw.obj);
>
> @@ -351,7 +351,7 @@ static int gsc_fw_query_compatibility_version(struct intel_gsc_uc *gsc)
> void *vaddr;
> int err;
>
> - err = intel_guc_allocate_and_map_vma(>->uc.guc, GSC_VER_PKT_SZ * 2,
> + err = intel_guc_allocate_and_map_vma(gt_to_guc(gt), GSC_VER_PKT_SZ * 2,
> &vma, &vaddr);
> if (err) {
> gt_err(gt, "failed to allocate vma for GSC version query\n");
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
> index 40817ebcca71..a7d5465655f9 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
> @@ -358,7 +358,8 @@ static int proxy_channel_alloc(struct intel_gsc_uc *gsc)
> void *vaddr;
> int err;
>
> - err = intel_guc_allocate_and_map_vma(>->uc.guc, GSC_PROXY_CHANNEL_SIZE,
> + err = intel_guc_allocate_and_map_vma(gt_to_guc(gt),
> + GSC_PROXY_CHANNEL_SIZE,
> &vma, &vaddr);
> if (err)
> return err;
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 63724e17829a..1ef470e64604 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -956,7 +956,7 @@ u32 intel_guc_engine_usage_offset(struct intel_guc *guc)
>
> struct iosys_map intel_guc_engine_usage_record_map(struct intel_engine_cs *engine)
> {
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> u8 guc_class = engine_class_to_guc_class(engine->class);
> size_t offset = offsetof(struct __guc_ads_blob,
> engine_usage.engines[guc_class][ilog2(engine->logical_mask)]);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> index a4da0208c883..84a8807391c5 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -1441,7 +1441,7 @@ int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf,
> if (!cap || !ee->engine)
> return -ENODEV;
>
> - guc = &ee->engine->gt->uc.guc;
> + guc = gt_to_guc(ee->engine->gt);
>
> i915_error_printf(ebuf, "global --- GuC Error Capture on %s command stream:\n",
> ee->engine->name);
> @@ -1543,7 +1543,7 @@ bool intel_guc_capture_is_matching_engine(struct intel_gt *gt,
> if (!gt || !ce || !engine)
> return false;
>
> - guc = >->uc.guc;
> + guc = gt_to_guc(gt);
> if (!guc->capture)
> return false;
>
> @@ -1573,7 +1573,7 @@ void intel_guc_capture_get_matching_node(struct intel_gt *gt,
> if (!gt || !ee || !ce)
> return;
>
> - guc = >->uc.guc;
> + guc = gt_to_guc(gt);
> if (!guc->capture)
> return;
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
> index cc9569af7f0c..b67a15f74276 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
> @@ -111,7 +111,7 @@ static bool has_table(struct drm_i915_private *i915)
> static int guc_hwconfig_init(struct intel_gt *gt)
> {
> struct intel_hwconfig *hwconfig = >->info.hwconfig;
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
> int ret;
>
> if (!has_table(gt->i915))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 04f8377fd7a3..4f51cc5f1604 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -391,7 +391,7 @@ static inline void set_context_guc_id_invalid(struct intel_context *ce)
>
> static inline struct intel_guc *ce_to_guc(struct intel_context *ce)
> {
> - return &ce->engine->gt->uc.guc;
> + return gt_to_guc(ce->engine->gt);
> }
>
> static inline struct i915_priolist *to_priolist(struct rb_node *rb)
> @@ -1233,7 +1233,7 @@ static void __get_engine_usage_record(struct intel_engine_cs *engine,
> static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)
> {
> struct intel_engine_guc_stats *stats = &engine->stats.guc;
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> u32 last_switch, ctx_id, total;
>
> lockdep_assert_held(&guc->timestamp.lock);
> @@ -1298,7 +1298,7 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now)
> struct intel_engine_guc_stats stats_saved, *stats = &engine->stats.guc;
> struct i915_gpu_error *gpu_error = &engine->i915->gpu_error;
> struct intel_gt *gt = engine->gt;
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
> u64 total, gt_stamp_saved;
> unsigned long flags;
> u32 reset_count;
> @@ -1525,7 +1525,7 @@ static void guc_fini_engine_stats(struct intel_guc *guc)
>
> void intel_guc_busyness_park(struct intel_gt *gt)
> {
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
>
> if (!guc_submission_initialized(guc))
> return;
> @@ -1552,7 +1552,7 @@ void intel_guc_busyness_park(struct intel_gt *gt)
>
> void intel_guc_busyness_unpark(struct intel_gt *gt)
> {
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
> unsigned long flags;
> ktime_t unused;
>
> @@ -2130,7 +2130,7 @@ static bool need_tasklet(struct intel_guc *guc, struct i915_request *rq)
> static void guc_submit_request(struct i915_request *rq)
> {
> struct i915_sched_engine *sched_engine = rq->engine->sched_engine;
> - struct intel_guc *guc = &rq->engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(rq->engine->gt);
> unsigned long flags;
>
> /* Will be called from irq-context when using foreign fences. */
> @@ -2596,7 +2596,7 @@ static int __guc_context_set_context_policies(struct intel_guc *guc,
> static int guc_context_policy_init_v70(struct intel_context *ce, bool loop)
> {
> struct intel_engine_cs *engine = ce->engine;
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> struct context_policy policy;
> u32 execution_quantum;
> u32 preemption_timeout;
> @@ -2672,7 +2672,7 @@ static u32 map_guc_prio_to_lrc_desc_prio(u8 prio)
> static void prepare_context_registration_info_v69(struct intel_context *ce)
> {
> struct intel_engine_cs *engine = ce->engine;
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> u32 ctx_id = ce->guc_id.id;
> struct guc_lrc_desc_v69 *desc;
> struct intel_context *child;
> @@ -2741,7 +2741,7 @@ static void prepare_context_registration_info_v70(struct intel_context *ce,
> struct guc_ctxt_registration_info *info)
> {
> struct intel_engine_cs *engine = ce->engine;
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> u32 ctx_id = ce->guc_id.id;
>
> GEM_BUG_ON(!engine->mask);
> @@ -2804,7 +2804,7 @@ static int try_context_registration(struct intel_context *ce, bool loop)
> {
> struct intel_engine_cs *engine = ce->engine;
> struct intel_runtime_pm *runtime_pm = engine->uncore->rpm;
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> intel_wakeref_t wakeref;
> u32 ctx_id = ce->guc_id.id;
> bool context_registered;
> @@ -4435,7 +4435,7 @@ static void guc_sched_engine_destroy(struct kref *kref)
> int intel_guc_submission_setup(struct intel_engine_cs *engine)
> {
> struct drm_i915_private *i915 = engine->i915;
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
>
> /*
> * The setup relies on several assumptions (e.g. irqs always enabled)
> @@ -5193,7 +5193,7 @@ int intel_guc_engine_failure_process_msg(struct intel_guc *guc,
>
> void intel_guc_find_hung_context(struct intel_engine_cs *engine)
> {
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> struct intel_context *ce;
> struct i915_request *rq;
> unsigned long index;
> @@ -5255,7 +5255,7 @@ void intel_guc_dump_active_requests(struct intel_engine_cs *engine,
> struct i915_request *hung_rq,
> struct drm_printer *m)
> {
> - struct intel_guc *guc = &engine->gt->uc.guc;
> + struct intel_guc *guc = gt_to_guc(engine->gt);
> struct intel_context *ce;
> unsigned long index;
> unsigned long flags;
> @@ -5707,7 +5707,7 @@ guc_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - guc = &siblings[0]->gt->uc.guc;
> + guc = gt_to_guc(siblings[0]->gt);
>
> ve->base.i915 = siblings[0]->i915;
> ve->base.gt = siblings[0]->gt;
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> index ba9e07fc2b57..9b5141b422e5 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> @@ -384,7 +384,7 @@ int intel_huc_init(struct intel_huc *huc)
> if (HAS_ENGINE(gt, GSC0)) {
> struct i915_vma *vma;
>
> - vma = intel_guc_allocate_vma(>->uc.guc, PXP43_HUC_AUTH_INOUT_SIZE * 2);
> + vma = intel_guc_allocate_vma(gt_to_guc(gt), PXP43_HUC_AUTH_INOUT_SIZE * 2);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> huc_info(huc, "Failed to allocate heci pkt\n");
> @@ -488,7 +488,7 @@ int intel_huc_wait_for_auth_complete(struct intel_huc *huc,
> int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type)
> {
> struct intel_gt *gt = huc_to_gt(huc);
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
> int ret;
>
> if (!intel_uc_fw_is_loaded(&huc->fw))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 362639162ed6..6ba7a659d54a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -807,7 +807,7 @@ static int try_firmware_load(struct intel_uc_fw *uc_fw, const struct firmware **
> static int check_mtl_huc_guc_compatibility(struct intel_gt *gt,
> struct intel_uc_fw_file *huc_selected)
> {
> - struct intel_uc_fw_file *guc_selected = >->uc.guc.fw.file_selected;
> + struct intel_uc_fw_file *guc_selected = >_to_guc(gt)->fw.file_selected;
> struct intel_uc_fw_ver *huc_ver = &huc_selected->ver;
> struct intel_uc_fw_ver *guc_ver = &guc_selected->ver;
> bool new_huc, new_guc;
> @@ -1209,7 +1209,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
> * since its GGTT offset will be GuC accessible.
> */
> GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE);
> - vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE);
> + vma = intel_guc_allocate_vma(gt_to_guc(gt), PAGE_SIZE);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> index c900aac85adb..68feb55654f7 100644
> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
> @@ -144,7 +144,7 @@ static int intel_guc_scrub_ctbs(void *arg)
> static int intel_guc_steal_guc_ids(void *arg)
> {
> struct intel_gt *gt = arg;
> - struct intel_guc *guc = >->uc.guc;
> + struct intel_guc *guc = gt_to_guc(gt);
> int ret, sv, context_index = 0;
> intel_wakeref_t wakeref;
> struct intel_engine_cs *engine;
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH v3 3/4] drm/i915: Use the new gt_to_guc() wrapper
2023-12-06 20:46 ` Andi Shyti
@ 2023-12-06 20:46 ` Andi Shyti
-1 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel, Nirmoy Das
Get the guc reference from the gt using the gt_to_guc() helper.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/i915_debugfs_params.c | 2 +-
drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c b/drivers/gpu/drm/i915/i915_debugfs_params.c
index 8bca02025e09..74b7f2fd8b57 100644
--- a/drivers/gpu/drm/i915/i915_debugfs_params.c
+++ b/drivers/gpu/drm/i915/i915_debugfs_params.c
@@ -43,7 +43,7 @@ static int notify_guc(struct drm_i915_private *i915)
for_each_gt(gt, i915, i) {
if (intel_uc_uses_guc_submission(>->uc))
- ret = intel_guc_global_policies_update(>->uc.guc);
+ ret = intel_guc_global_policies_update(gt_to_guc(gt));
}
return ret;
diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
index 2990dd4d4a0d..d9d8f0336702 100644
--- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
+++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
@@ -65,7 +65,7 @@ int intel_selftest_modify_policy(struct intel_engine_cs *engine,
if (!intel_engine_uses_guc(engine))
return 0;
- err = intel_guc_global_policies_update(&engine->gt->uc.guc);
+ err = intel_guc_global_policies_update(gt_to_guc(engine->gt));
if (err)
intel_selftest_restore_policy(engine, saved);
@@ -84,7 +84,7 @@ int intel_selftest_restore_policy(struct intel_engine_cs *engine,
if (!intel_engine_uses_guc(engine))
return 0;
- return intel_guc_global_policies_update(&engine->gt->uc.guc);
+ return intel_guc_global_policies_update(gt_to_guc(engine->gt));
}
int intel_selftest_wait_for_rq(struct i915_request *rq)
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 3/4] drm/i915: Use the new gt_to_guc() wrapper
@ 2023-12-06 20:46 ` Andi Shyti
0 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, Andi Shyti, dri-devel, Nirmoy Das
Get the guc reference from the gt using the gt_to_guc() helper.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/i915_debugfs_params.c | 2 +-
drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c b/drivers/gpu/drm/i915/i915_debugfs_params.c
index 8bca02025e09..74b7f2fd8b57 100644
--- a/drivers/gpu/drm/i915/i915_debugfs_params.c
+++ b/drivers/gpu/drm/i915/i915_debugfs_params.c
@@ -43,7 +43,7 @@ static int notify_guc(struct drm_i915_private *i915)
for_each_gt(gt, i915, i) {
if (intel_uc_uses_guc_submission(>->uc))
- ret = intel_guc_global_policies_update(>->uc.guc);
+ ret = intel_guc_global_policies_update(gt_to_guc(gt));
}
return ret;
diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
index 2990dd4d4a0d..d9d8f0336702 100644
--- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
+++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
@@ -65,7 +65,7 @@ int intel_selftest_modify_policy(struct intel_engine_cs *engine,
if (!intel_engine_uses_guc(engine))
return 0;
- err = intel_guc_global_policies_update(&engine->gt->uc.guc);
+ err = intel_guc_global_policies_update(gt_to_guc(engine->gt));
if (err)
intel_selftest_restore_policy(engine, saved);
@@ -84,7 +84,7 @@ int intel_selftest_restore_policy(struct intel_engine_cs *engine,
if (!intel_engine_uses_guc(engine))
return 0;
- return intel_guc_global_policies_update(&engine->gt->uc.guc);
+ return intel_guc_global_policies_update(gt_to_guc(engine->gt));
}
int intel_selftest_wait_for_rq(struct i915_request *rq)
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v3 3/4] drm/i915: Use the new gt_to_guc() wrapper
2023-12-06 20:46 ` Andi Shyti
(?)
@ 2023-12-21 9:21 ` Nirmoy Das
-1 siblings, 0 replies; 16+ messages in thread
From: Nirmoy Das @ 2023-12-21 9:21 UTC (permalink / raw)
To: Andi Shyti, John Harrison; +Cc: intel-gfx, dri-devel
On 12/6/2023 9:46 PM, Andi Shyti wrote:
> Get the guc reference from the gt using the gt_to_guc() helper.
>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs_params.c | 2 +-
> drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c | 4 ++--
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c b/drivers/gpu/drm/i915/i915_debugfs_params.c
> index 8bca02025e09..74b7f2fd8b57 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs_params.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs_params.c
> @@ -43,7 +43,7 @@ static int notify_guc(struct drm_i915_private *i915)
>
> for_each_gt(gt, i915, i) {
> if (intel_uc_uses_guc_submission(>->uc))
> - ret = intel_guc_global_policies_update(>->uc.guc);
> + ret = intel_guc_global_policies_update(gt_to_guc(gt));
> }
>
> return ret;
> diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
> index 2990dd4d4a0d..d9d8f0336702 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
> @@ -65,7 +65,7 @@ int intel_selftest_modify_policy(struct intel_engine_cs *engine,
> if (!intel_engine_uses_guc(engine))
> return 0;
>
> - err = intel_guc_global_policies_update(&engine->gt->uc.guc);
> + err = intel_guc_global_policies_update(gt_to_guc(engine->gt));
> if (err)
> intel_selftest_restore_policy(engine, saved);
>
> @@ -84,7 +84,7 @@ int intel_selftest_restore_policy(struct intel_engine_cs *engine,
> if (!intel_engine_uses_guc(engine))
> return 0;
>
> - return intel_guc_global_policies_update(&engine->gt->uc.guc);
> + return intel_guc_global_policies_update(gt_to_guc(engine->gt));
> }
>
> int intel_selftest_wait_for_rq(struct i915_request *rq)
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH v3 4/4] drm/i915/guc: Use the ce_to_guc() wrapper whenever possible
2023-12-06 20:46 ` Andi Shyti
@ 2023-12-06 20:46 ` Andi Shyti
-1 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel, Nirmoy Das
Get the guc reference from the ce using the ce_to_guc() helper.
Just a leftover from previous cleanups.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 4f51cc5f1604..3c7821ae9f0d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -3513,7 +3513,7 @@ static inline void sub_context_inflight_prio(struct intel_context *ce,
static inline void update_context_prio(struct intel_context *ce)
{
- struct intel_guc *guc = &ce->engine->gt->uc.guc;
+ struct intel_guc *guc = ce_to_guc(ce);
int i;
BUILD_BUG_ON(GUC_CLIENT_PRIORITY_KMD_HIGH != 0);
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 4/4] drm/i915/guc: Use the ce_to_guc() wrapper whenever possible
@ 2023-12-06 20:46 ` Andi Shyti
0 siblings, 0 replies; 16+ messages in thread
From: Andi Shyti @ 2023-12-06 20:46 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, Andi Shyti, dri-devel, Nirmoy Das
Get the guc reference from the ce using the ce_to_guc() helper.
Just a leftover from previous cleanups.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 4f51cc5f1604..3c7821ae9f0d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -3513,7 +3513,7 @@ static inline void sub_context_inflight_prio(struct intel_context *ce,
static inline void update_context_prio(struct intel_context *ce)
{
- struct intel_guc *guc = &ce->engine->gt->uc.guc;
+ struct intel_guc *guc = ce_to_guc(ce);
int i;
BUILD_BUG_ON(GUC_CLIENT_PRIORITY_KMD_HIGH != 0);
--
2.43.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v3 4/4] drm/i915/guc: Use the ce_to_guc() wrapper whenever possible
2023-12-06 20:46 ` Andi Shyti
(?)
@ 2023-12-21 12:18 ` Nirmoy Das
-1 siblings, 0 replies; 16+ messages in thread
From: Nirmoy Das @ 2023-12-21 12:18 UTC (permalink / raw)
To: Andi Shyti, John Harrison; +Cc: intel-gfx, dri-devel, Nirmoy Das
On 12/6/2023 9:46 PM, Andi Shyti wrote:
> Get the guc reference from the ce using the ce_to_guc() helper.
> Just a leftover from previous cleanups.
>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 4f51cc5f1604..3c7821ae9f0d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -3513,7 +3513,7 @@ static inline void sub_context_inflight_prio(struct intel_context *ce,
>
> static inline void update_context_prio(struct intel_context *ce)
> {
> - struct intel_guc *guc = &ce->engine->gt->uc.guc;
> + struct intel_guc *guc = ce_to_guc(ce);
> int i;
>
> BUILD_BUG_ON(GUC_CLIENT_PRIORITY_KMD_HIGH != 0);
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add gt_to_guc() helper
2023-12-06 20:46 ` Andi Shyti
` (4 preceding siblings ...)
(?)
@ 2023-12-07 0:35 ` Patchwork
-1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2023-12-07 0:35 UTC (permalink / raw)
To: Andi Shyti; +Cc: intel-gfx
== Series Details ==
Series: Add gt_to_guc() helper
URL : https://patchwork.freedesktop.org/series/127455/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 16+ messages in thread* [Intel-gfx] ✗ Fi.CI.BAT: failure for Add gt_to_guc() helper
2023-12-06 20:46 ` Andi Shyti
` (5 preceding siblings ...)
(?)
@ 2023-12-07 0:53 ` Patchwork
-1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2023-12-07 0:53 UTC (permalink / raw)
To: Andi Shyti; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4575 bytes --]
== Series Details ==
Series: Add gt_to_guc() helper
URL : https://patchwork.freedesktop.org/series/127455/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13990 -> Patchwork_127455v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_127455v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_127455v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/index.html
Participating hosts (37 -> 35)
------------------------------
Missing (2): bat-mtlp-8 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_127455v1:
### IGT changes ###
#### Possible regressions ####
* igt@kms_pipe_crc_basic@read-crc:
- bat-adlp-11: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc.html
Known issues
------------
Here are the changes found in Patchwork_127455v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][2] ([i915#9197]) +3 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-5:
- bat-adlp-11: [PASS][3] -> [DMESG-FAIL][4] ([i915#6868])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13990/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-5.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-5.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9: [INCOMPLETE][5] ([i915#9275]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13990/bat-dg2-9/igt@gem_exec_suspend@basic-s0@lmem0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/bat-dg2-9/igt@gem_exec_suspend@basic-s0@lmem0.html
* igt@kms_flip@basic-flip-vs-dpms@d-dp6:
- bat-adlp-11: [DMESG-FAIL][7] ([i915#6868]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13990/bat-adlp-11/igt@kms_flip@basic-flip-vs-dpms@d-dp6.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-dpms@d-dp6.html
* igt@kms_flip@basic-flip-vs-modeset@d-dp6:
- bat-adlp-11: [DMESG-WARN][9] -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13990/bat-adlp-11/igt@kms_flip@basic-flip-vs-modeset@d-dp6.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-modeset@d-dp6.html
* igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][11] ([IGT#3]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13990/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/fi-kbl-guc/igt@kms_hdmi_inject@inject-audio.html
[IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
Build changes
-------------
* Linux: CI_DRM_13990 -> Patchwork_127455v1
CI-20190529: 20190529
CI_DRM_13990: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_127455v1: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
29003fdef5a9 drm/i915/guc: Use the ce_to_guc() wrapper whenever possible
79c36de90d97 drm/i915: Use the new gt_to_guc() wrapper
04be755ef1df drm/i915/guc: Use the new gt_to_guc() wrapper
5fdb5c907d9e drm/i915/gt: Create the gt_to_guc() wrapper
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127455v1/index.html
[-- Attachment #2: Type: text/html, Size: 5456 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread