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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"De Marchi, Lucas" <lucas.demarchi@intel.com>
Subject: Re: [PATCH] drm/i915/tgl: add support to one DP-MST stream
Date: Mon, 28 Oct 2019 17:28:20 +0000	[thread overview]
Message-ID: <404a68fcf890cb4607f982c74c8e5fe97051bad5.camel@intel.com> (raw)
In-Reply-To: <20191028170457.6982-1-lucas.demarchi@intel.com>

On Mon, 2019-10-28 at 10:04 -0700, Lucas De Marchi wrote:
> This is the minimum change to support 1 (and only 1) DP-MST monitor
> connected on Tiger Lake. This change was isolated from previous patch
> from José. In order to support more streams we will need to create a
> master-slave relation on the transcoders and that is currently not
> working yet.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h          | 3 +++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 281594bcbfae..32d9c74c5838 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1905,6 +1905,10 @@ intel_ddi_transcoder_func_reg_val_get(const
> struct intel_crtc_state *crtc_state)
>  	} else if (intel_crtc_has_type(crtc_state,
> INTEL_OUTPUT_DP_MST)) {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_MST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> +
> +		if (INTEL_GEN(dev_priv) >= 12)
> +			temp |= TRANS_DDI_MST_TRANSPORT_SELECT(
> +				crtc_state->cpu_transcoder);
>  	} else {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_SST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index dee3168efd86..e08c4ea3b747 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9550,6 +9550,9 @@ enum skl_power_gate {
>  #define  TRANS_DDI_EDP_INPUT_A_ONOFF	(4 << 12)
>  #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5 << 12)
>  #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6 << 12)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_SHIFT	10
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK	REG_GENMASK(12, 10)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)	((trans) << 10)
>  #define  TRANS_DDI_HDCP_SIGNALLING	(1 << 9)
>  #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
>  #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"De Marchi, Lucas" <lucas.demarchi@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/tgl: add support to one DP-MST stream
Date: Mon, 28 Oct 2019 17:28:20 +0000	[thread overview]
Message-ID: <404a68fcf890cb4607f982c74c8e5fe97051bad5.camel@intel.com> (raw)
Message-ID: <20191028172820.LlvjPbSsYOjWuXxMoem_5wu0XD2Ai2i5Xchin6Fo6o0@z> (raw)
In-Reply-To: <20191028170457.6982-1-lucas.demarchi@intel.com>

On Mon, 2019-10-28 at 10:04 -0700, Lucas De Marchi wrote:
> This is the minimum change to support 1 (and only 1) DP-MST monitor
> connected on Tiger Lake. This change was isolated from previous patch
> from José. In order to support more streams we will need to create a
> master-slave relation on the transcoders and that is currently not
> working yet.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h          | 3 +++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 281594bcbfae..32d9c74c5838 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1905,6 +1905,10 @@ intel_ddi_transcoder_func_reg_val_get(const
> struct intel_crtc_state *crtc_state)
>  	} else if (intel_crtc_has_type(crtc_state,
> INTEL_OUTPUT_DP_MST)) {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_MST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> +
> +		if (INTEL_GEN(dev_priv) >= 12)
> +			temp |= TRANS_DDI_MST_TRANSPORT_SELECT(
> +				crtc_state->cpu_transcoder);
>  	} else {
>  		temp |= TRANS_DDI_MODE_SELECT_DP_SST;
>  		temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index dee3168efd86..e08c4ea3b747 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9550,6 +9550,9 @@ enum skl_power_gate {
>  #define  TRANS_DDI_EDP_INPUT_A_ONOFF	(4 << 12)
>  #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5 << 12)
>  #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6 << 12)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_SHIFT	10
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK	REG_GENMASK(12, 10)
> +#define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)	((trans) << 10)
>  #define  TRANS_DDI_HDCP_SIGNALLING	(1 << 9)
>  #define  TRANS_DDI_DP_VC_PAYLOAD_ALLOC	(1 << 8)
>  #define  TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1 << 7)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-10-28 17:28 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-28 17:04 [PATCH] drm/i915/tgl: add support to one DP-MST stream Lucas De Marchi
2019-10-28 17:04 ` [Intel-gfx] " Lucas De Marchi
2019-10-28 17:28 ` Souza, Jose [this message]
2019-10-28 17:28   ` Souza, Jose
2019-10-28 18:03 ` Ville Syrjälä
2019-10-28 18:03   ` [Intel-gfx] " Ville Syrjälä
2019-10-28 20:37 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-10-28 20:37   ` [Intel-gfx] " Patchwork
2019-10-28 20:58 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-28 20:58   ` [Intel-gfx] " Patchwork
2019-10-29  3:50 ` [PATCH v2] " Lucas De Marchi
2019-10-29  3:50   ` [Intel-gfx] " Lucas De Marchi
2019-10-29  4:38 ` ✗ Fi.CI.BAT: failure for drm/i915/tgl: add support to one DP-MST stream (rev2) Patchwork
2019-10-29  4:38   ` [Intel-gfx] " Patchwork
2019-10-29 14:19 ` ✓ Fi.CI.IGT: success for drm/i915/tgl: add support to one DP-MST stream Patchwork
2019-10-29 14:19   ` [Intel-gfx] " Patchwork
2019-10-30  0:19 ` ✓ Fi.CI.BAT: success for drm/i915/tgl: add support to one DP-MST stream (rev3) Patchwork
2019-10-30  0:19   ` [Intel-gfx] " Patchwork
2019-10-30 23:57 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-30 23:57   ` [Intel-gfx] " Patchwork

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