From: Andrew Lunn <andrew@lunn.ch>
To: David Yang <mmyangfl@gmail.com>
Cc: netdev@vger.kernel.org, Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/7] net: dsa: motorcomm: Split xMII and SERDES port masks
Date: Thu, 10 Sep 2026 22:59:47 +0200 [thread overview]
Message-ID: <40e425e2-7d0b-4e20-9880-41e46ff340c6@lunn.ch> (raw)
In-Reply-To: <20260909190541.466476-2-mmyangfl@gmail.com>
> #define YT921X_PORT_MASK_INTn(port) BIT(port)
> #define YT921X_PORT_MASK_INT0_n(n) GENMASK((n) - 1, 0)
> #define YT921X_PORT_MASK_EXT0 BIT(8)
I'm i right in says YT921X_PORT_MASK_EXT0 refers to port 8, because of
BIT(8)? And YT921X_PORT_MASK_EXT1 BIT(9) means port 9?
Andrew
next prev parent reply other threads:[~2026-09-10 20:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 19:05 [PATCH net-next 0/7] net: dsa: motorcomm: Add SerDes PCS David Yang
2026-09-09 19:05 ` [PATCH net-next 1/7] net: dsa: motorcomm: Split xMII and SERDES port masks David Yang
2026-09-10 20:59 ` Andrew Lunn [this message]
2026-09-10 21:37 ` David Yang
2026-09-11 11:46 ` Andrew Lunn
2026-09-11 12:32 ` David Yang
2026-09-09 19:05 ` [PATCH net-next 2/7] net: dsa: motorcomm: Check port type with runtime info David Yang
2026-09-09 19:05 ` [PATCH net-next 3/7] net: dsa: motorcomm: Fix port control/status register bit field names David Yang
2026-09-09 19:05 ` [PATCH net-next 4/7] net: dsa: motorcomm: Introduce yt921x_speed David Yang
2026-09-09 19:05 ` [PATCH net-next 5/7] net: dsa: motorcomm: Hoist port_to_priv helper into chip.h David Yang
2026-09-09 19:05 ` [PATCH net-next 6/7] net: dsa: motorcomm: Split MDIO bus module David Yang
2026-09-09 19:05 ` [PATCH net-next 7/7] net: dsa: motorcomm: Add SerDes PCS David Yang
2026-09-16 1:22 ` [PATCH net-next 0/7] " Jakub Kicinski
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