From: Pete Popov <ppopov@mvista.com>
To: G H <giles67@yahoo.com>
Cc: linux-mips@linux-mips.org
Subject: Re: do_ri failure in cache flushing routines
Date: Thu, 05 Aug 2004 11:09:01 -0700 [thread overview]
Message-ID: <411277BD.7070108@mvista.com> (raw)
In-Reply-To: <20040805180427.59029.qmail@web50806.mail.yahoo.com>
G H wrote:
> I've not had much response to this question so I would like to
> rephrase it :
>
> Can anyone think of any possible scenario where do_ri could occur in
> blast_icache32() ??
>
> Is this possibly a cache synchronisation problem ??
>
Could be a hardware memory glitch. I would use kgdb to put a breakpoint
there and see what the data in memory looks like when this happens --
look for memory corruption, etc.
Pete
> TIA
>
> >While testing out an amd au1500 based board I have been getting "
> do_ri " exceptions >that always occur in the cache flushing routines.
> More often than not in >blast_icache_32().
>
> >So far this has mainly happened after running the board for days on
> end while running >multiple telnet sessions to it. It has sometimes (
> quite rarely ) happened after a few >hours to a day of multiple telnet
> session use.
>
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next prev parent reply other threads:[~2004-08-05 18:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-08-05 18:04 do_ri failure in cache flushing routines G H
2004-08-05 18:09 ` Pete Popov [this message]
2004-08-05 18:13 ` Pete Popov
2004-08-05 20:16 ` G H
2004-08-05 22:31 ` Pete Popov
2004-08-05 18:11 ` Jun Sun
2004-08-05 20:25 ` G H
2004-08-05 20:25 ` G H
-- strict thread matches above, loose matches on Subject: below --
2004-08-03 16:19 G H
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