* [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)?
@ 2005-05-22 14:06 Peter Asemann
2005-05-22 18:06 ` Dan Malek
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Peter Asemann @ 2005-05-22 14:06 UTC (permalink / raw)
To: u-boot
I'm going to try booting u-boot on a custom MPC875 board.
It has flash at the boot memory bank (bank 0).
It has no circuit to pull up pin 7/8 of the MPC data bus at processor
start, so (the manual says) the IMMR/the internal memory is configured
to reside at 0x0.
I think this causes the internal memory to shadow the boot flash, which
should prevent the board from booting. At least the internal memory
shadows the boot memory bank in the debugger.
That's why I was planning to solder some circuit to the board to
configure the internal memory to be somewhere else at startup.
The board designer says he can't believe the MPC875 default
configuration is like that boards which use it can't boot.
So - does someone incidentally know something about MPC default
configurations and if MPCs can boot though the IMMR is at 0x0?
And if they can't, why the IMMR is at 0x0 by default?
Thanks for reading,
Peter Asemann
^ permalink raw reply [flat|nested] 4+ messages in thread* [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)?
2005-05-22 14:06 [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)? Peter Asemann
@ 2005-05-22 18:06 ` Dan Malek
2005-05-22 18:13 ` Yuli Barcohen
2005-05-22 19:58 ` Wolfgang Denk
2 siblings, 0 replies; 4+ messages in thread
From: Dan Malek @ 2005-05-22 18:06 UTC (permalink / raw)
To: u-boot
On May 22, 2005, at 10:06 AM, Peter Asemann wrote:
> I'm going to try booting u-boot on a custom MPC875 board.
> It has flash at the boot memory bank (bank 0).
> It has no circuit to pull up pin 7/8 of the MPC data bus at processor
> start, so (the manual says) the IMMR/the internal memory is configured
> to reside at 0x0.
The default configuration if you don't pull up any of the
configuration pins is IMMR at 0, rom boot vector at 0xfff00100,
and 32-bit flash (among other things you need to verify).
If this matches your hardware configuration, you can boot it,
and then the U-Boot relocates itself and IMMR to standard locations.
> The board designer says he can't believe the MPC875 default
> configuration is like that boards which use it can't boot.
I'd find a new designer because they obviously don't know
how this processor works.
Thanks.
-- Dan
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)?
2005-05-22 14:06 [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)? Peter Asemann
2005-05-22 18:06 ` Dan Malek
@ 2005-05-22 18:13 ` Yuli Barcohen
2005-05-22 19:58 ` Wolfgang Denk
2 siblings, 0 replies; 4+ messages in thread
From: Yuli Barcohen @ 2005-05-22 18:13 UTC (permalink / raw)
To: u-boot
>>>>> Peter Asemann writes:
Peter> I'm going to try booting u-boot on a custom MPC875 board. It
Peter> has flash at the boot memory bank (bank 0). It has no
Peter> circuit to pull up pin 7/8 of the MPC data bus at processor
Peter> start, so (the manual says) the IMMR/the internal memory is
Peter> configured to reside at 0x0.
Peter> I think this causes the internal memory to shadow the boot
Peter> flash, which should prevent the board from booting.
No, it does not. CS0 is initialised to allow access to any address in
entire 4GB address space so the boot flash (which should be 32-bit wide
to use the default configuration, BTW) can be accessed at any address
except zero which is shadowed by the IMMR. Since bit 1 of HRCW is zero,
interrupt vectors reside at 0xFFF00000 so there is no overlap with the
IMMR. If you burn the U-Boot at this address, it should work (it will
change the IMMR value to CFG_IMMR).
Peter> At least the internal memory shadows the boot memory bank in
Peter> the debugger.
Probably your debugger (incorrectly) initialises the memory controller
and causes the overlap.
Peter> That's why I was planning to solder some circuit to the board
Peter> to configure the internal memory to be somewhere else at
Peter> startup.
Peter> The board designer says he can't believe the MPC875 default
Peter> configuration is like that boards which use it can't boot.
Peter> So - does someone incidentally know something about MPC
Peter> default configurations and if MPCs can boot though the IMMR
Peter> is at 0x0? And if they can't, why the IMMR is at 0x0 by
Peter> default?
--
========================================================================
Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader
yuli at arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel
========================================================================
^ permalink raw reply [flat|nested] 4+ messages in thread* [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)?
2005-05-22 14:06 [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)? Peter Asemann
2005-05-22 18:06 ` Dan Malek
2005-05-22 18:13 ` Yuli Barcohen
@ 2005-05-22 19:58 ` Wolfgang Denk
2 siblings, 0 replies; 4+ messages in thread
From: Wolfgang Denk @ 2005-05-22 19:58 UTC (permalink / raw)
To: u-boot
In message <429091ED.2090202@web.de> you wrote:
> I'm going to try booting u-boot on a custom MPC875 board.
> It has flash at the boot memory bank (bank 0).
> It has no circuit to pull up pin 7/8 of the MPC data bus at processor
> start, so (the manual says) the IMMR/the internal memory is configured
> to reside at 0x0.
>
> I think this causes the internal memory to shadow the boot flash, which
Only in this address range.
> should prevent the board from booting. At least the internal memory
> shadows the boot memory bank in the debugger.
So just configure the board for high-boot, i. e. to use 0xFFF00100 as
boot vector.
> So - does someone incidentally know something about MPC default
> configurations and if MPCs can boot though the IMMR is at 0x0?
Yes,it can.
> And if they can't, why the IMMR is at 0x0 by default?
0 is as good a value as any other.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
A day without sunshine is like night.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2005-05-22 14:06 [U-Boot-Users] Can MPC processors boot though the IMMR is at 0x0 (default configuration)? Peter Asemann
2005-05-22 18:06 ` Dan Malek
2005-05-22 18:13 ` Yuli Barcohen
2005-05-22 19:58 ` Wolfgang Denk
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