Re: [PATCH v6 5/9] x86/resctrl: Parse ACPI CMRC table

["Chen, Yu C" <yu.c.chen@intel.com>]

Hi Reinette,

On 8/25/2026 11:39 PM, Reinette Chatre wrote:
> Hi Chenyu,
> 
> On 8/25/26 2:19 AM, Chen, Yu C wrote:
>> On 8/20/2026 7:06 AM, Reinette Chatre wrote:
>>> On 7/25/26 2:23 AM, Chen Yu wrote:
>   
>>> Actually, looks like the original
>>> MSR based scale obtained via CPUID.(EAX=0FH,ECX=1H) is 32 bits while this new scale value
>>> from CMRC is 64 bits. The existing code can thus not accommodate the new values and need to
>>> be updated?
>>>
>>
>> Yes, the legacy CPUID reports it as 32 bits, while CMRC is declared as 64 bits.
>>
>> In theory, we should change the scale type from unsigned int to u64 to accommodate
>> both the legacy CPUID and CMRC. However, it seems unlikely that the scale would
>> exceed 32 bits. If the scale were 32 bits, the L3 occupancy would be at least
>> 2^32 − 1, which is about 4 GB. We have not yet seen platform with 4 GB of L3 cache.
>> So perhaps we can keep erdt_scale as unsigned int for now IMO.
> 
> 
> It sounds like you are saying that the spec you are enabling should not be using 64 bits for
> this value. It is unexpected to me that work on enabling of a spec adds such constraint without
> clear motivation. If you find that the spec is not correct then I think it would be better to have
> it changed there instead of building what appears to be unsupported assumptions into resctrl.
> 

OK, let me check with the team.

thanks,
Chenyu