PC87591x

PC87591x

[Enrico Bartky]

Hello,

I read (and try to understand) the PC87591x spec. 
(http://www.national.com/ds.cgi/PC/PC87591E.pdf). The problem is, the 
temperature is only readable through the whole pc87591x memory. And in 
some versions the ADC controller for temp. readings is disabled. To 
enable this, it is neccessary to set a bit.

But how to read/write the pc87591x memory?
It is possible to map the memory to a address of the bios memory ( 
0xFFE0 0000 - 0xFFFF FFFF ) through the LDN 0x0F and the register 0xF4.

If the mapping is activated, how to read the address 0xFFE0 0000 ???? 
cat /proc/iomem says 0xFF80 0000 - 0xFFFF FFFF is reserved. I also tried 
it with ioremap.

Is anybody working on this? Or can help?

EnricoB

PC87591x

[Rudolf Marek]

Hi enrico.

i think this might help you

10:19 < ruik> look to page 408
10:20 < ruik> you will see IO register map
10:20 < ruik> that has also "our" devices
10:20 < Khali> true
10:20 < ruik> this is risc processor
10:20 < ruik> so adress write is IO write
10:20 < Khali> but what do I do with these 16-bit register addresses?
10:20 < ruik> registers are mapped to memory
10:20 < ruik> of controller
10:20 < ruik> and now we must find out way
10:21 < Khali> but memory of controller is different from host memory,
right?
10:21 < ruik> how to access this memory space
10:21 < ruik> yes it is
10:21 < ruik> maybe on page 313
10:21 < ruik> is such interface
10:22 < ruik> or somewhere near
10:22 < ruik> it is simply the question of finding some registers
10:22 < ruik> that we write that Address from datasheet and wait for
results
10:23 < ruik> Host Bus to Core Bus Access Translation
10:23 < ruik> I think this is what we want
10:23 < Khali> page?
10:26 < ruik> 5.3.3 Indirect Memory Read and Write Transaction
10:26 < ruik> 300
10:27 < Khali> aha
10:27 < Khali> interresting...
10:28 < Khali> that makes sense
10:28 < ruik> Yes the locking between domains
10:28 < ruik> lock access for microprocessor inside the chip
10:29 < ruik> and classic CPU access on page 300
10:30 < Khali> now, where are these 5 registers? ;)
10:31 < ruik> Shared Memory Host Register Map ?
10:31 < ruik> this ?
10:31 < Khali> logical device 0xf ?
10:32 < ruik> Shared Memory Host
10:32 < ruik> The base address is defined by LDN 0F16 (Section 5.3.8 on
page 303).
10:32 < ruik> yep
10:32 < ruik> (from page 421)
10:32 < Khali> ok
10:32 < Khali> I get it now...
10:32 < Khali> so we would have to grab logical device 0xf
10:32 < Khali> read the base address
10:32 < Khali> go there
10:32 < Khali> and use the 5 registers at this address to read/write all
the rest?
10:33 < ruik> if you mean  Shared Memory Host Register
10:33 < ruik> than yes
10:33 < Khali> that's all clear to me now
10:33 < Khali> thanks :)

Regards

Rudolf

[lm-sensors] PC87591x

[Enrico Bartky]

Hi,

I have (new?) information about the PC87591x Super-I/O Chip. I have 
talked to Winbond and they said, the only way to access this chip is 
through the PowerManagement channels. The problem is, there exists 
verious firmware implementations, so (I think) there exists different 
commands through these channels.

To support this chip, there are 2 possibilities. The first is we need to 
develope a firmware. The second is to analyze the firmware. On the 
Uniwill website, there is a reader/writer for this chip 
(http://www.uniwill.com/UserDownload/N243S/N243S2.htm), included in the 
BIOS Update archive and is called ecf11t.exe. And on National's page 
there is a programming reference for the core of the chip (CR16B). The 
datasheet is available at 
http://www.national.com/appinfo/compactrisc/pdf/cr16b-prog-ref.pdf.

Have anyone an idea, how to proceed the support? I know, none of these 
possibilities are easy to manage.

EnricoB

[lm-sensors] PC87591x

[Mark Studebaker]

unless the FW is implementing a standard IPMI-BMC or there is a 
published interface for the firmware, it sounds like
going through ACPI is the only solution.

Enrico Bartky wrote:
> Hi,
> 
> I have (new?) information about the PC87591x Super-I/O Chip. I have 
> talked to Winbond and they said, the only way to access this chip is 
> through the PowerManagement channels. The problem is, there exists 
> verious firmware implementations, so (I think) there exists different 
> commands through these channels.
> 
> To support this chip, there are 2 possibilities. The first is we need to 
> develope a firmware. The second is to analyze the firmware. On the 
> Uniwill website, there is a reader/writer for this chip 
> (http://www.uniwill.com/UserDownload/N243S/N243S2.htm), included in the 
> BIOS Update archive and is called ecf11t.exe. And on National's page 
> there is a programming reference for the core of the chip (CR16B). The 
> datasheet is available at 
> http://www.national.com/appinfo/compactrisc/pdf/cr16b-prog-ref.pdf.
> 
> Have anyone an idea, how to proceed the support? I know, none of these 
> possibilities are easy to manage.
> 
> EnricoB
> 
> 
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