Re: [Qemu-devel] Pending MIPS patches

[Fabrice Bellard <fabrice@bellard.org>]

Dirk Behme wrote:
> Hi,
> 
> just fyi below my list of pending MIPS patches. Not sure if all patches 
> are ready for inclusion, but maybe they are helpful for somebody. I try 
> to track which patches are already applied and which not. Please feel 
> free to add, comment, discuss etc anything.
> 
> Best regards
> 
> Dirk
> 
> Pending MIPS patches (bugs & improvements):
> ===========================================
> 
> 1. [PATCH] Huge TLB performance improvement
> http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00034.html

Need to verify that it does not slow down x86 target.

> 2. [PATCH][MIPS] add "lwu" instruction
> http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00326.html

On which MIPS CPU is it defined ? Need to track instruction sets exactly 
to be able to select a given MIPS CPU at compile time or dynamically.

> 3. [PATCH] Add special MIPS multiply instructions
> http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00375.html

Same remark.

> 4. [PATCH][MIPS] Enforce aligned pc
> http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00484.html

Can it happen on a real MIPS ? If not, an assert should be used for example.

> 5.[PATCH 5-6/8] Mips improvements

OK. Maybe expanding only the performance critical CP0 insn would have 
sufficed ?

> http://lists.gnu.org/archive/html/qemu-devel/2006-05/msg00314.html
> http://lists.gnu.org/archive/html/qemu-devel/2006-05/msg00315.html
> 
> Note: Patch 7/8 was eaten by list.
> 
> 6. [PATCH] Fix initial value for MIPS CP0 Config Register
> http://lists.gnu.org/archive/html/qemu-devel/2006-05/msg00372.html

Already done.

> 7. [PATCH] Restructure MIPS r4k code
> http://lists.gnu.org/archive/html/qemu-devel/2006-05/msg00429.html
> Note: Pending until additional MIPS machines are added. Comment from
> Fabrice: I prefer to wait until there is another mips machine (e.g. Malta).
> Currently I see no reason to move the mips code as it is very small.
> 
> 8. [PATCH] Add mips-user signal handling
> http://lists.gnu.org/archive/html/qemu-devel/2006-06/msg00319.html

OK. Need to check the handling of "env->PC += 4" in linux-user/main.c. I 
want to be sure there is not a better solution. Adding setup_rt_frame 
would be good too.

> 9. [PATCH] Update MIPS status register with EXL and ERL bits at exception
> http://lists.gnu.org/archive/html/qemu-devel/2006-06/msg00329.html

OK but the following lines are suspicious:

          } else {
              env->CP0_ErrorEPC = env->PC;
          }
-        env->hflags = MIPS_HFLAG_ERL;
+        env->hflags |= MIPS_HFLAG_ERL;
+       env->CP0_Status &= (1 << CP0St_ERL);
          pc = 0xBFC00000;


Fabrice.