[parisc-linux] How hp implemented 'undefined instruction'?

[Joel Soete <soete.joel@scarlet.be>]

Hello all,

In cpu books (parisc2.0.pdf or pa11_acd.pdf), in some well defined conditions, an insn can be an 'undefined instruction'.

Those books said about this:
--- snip ---
Within each major opcode, there may be undefined opcode extensions and
modifiers (these are undefined instructions). Interpretation of these opcodes
is left to the implementor, but system integrity is not compromised.
An undefined instruction, or sequence of undefined instructions, executed at a
given privilege level has no effect on system state other than what would have
been produced by a sequence of defined instructions running at the same
privilege level. This limits the possible side-effects that could
result from undefined instructions.

Undefined operations are equivalently specified. These result from normally
defined instructions but with operands or specifiers that are explicitly
disallowed.
--- snip ---

In "Interpretation of these opcodes is left to the implementor", I understand HP's integration of those cpu n their system?

But the text make me thought they aren't trap?

Does system behave like it's some kind of nop?

TIA,
	Joel
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