[PATCH] sparc32: max_cache_size fallback

["Krzysztof Helt" <krzysztof.h1@wp.pl>]

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From: Krzysztof Helt (krzysztof.h1@wp.pl)

It adds a fallback for CPU cache size detection. According to Sun
documentation, it is possible to have SMP system with SM40 modules.

Signed-off-by: Krzysztof Helt (krzysztof.h1@wp.pl)
---

It is added after sparc64 architecture.

Regards,
Krzysztof

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diff -urp linux-2.6.17/arch/sparc/kernel/smp.c linux-new/arch/sparc/kernel/smp.c
--- linux-2.6.17/arch/sparc/kernel/smp.c	2006-08-10 08:58:31.000000000 +0200
+++ linux-new/arch/sparc/kernel/smp.c	2006-08-12 19:11:20.000000000 +0200
@@ -79,6 +78,9 @@ void __cpuinit smp_store_cpu_info(int id
 		cache_nlines = 0x8000;
 		cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
 		max_cache_size = cache_line * cache_nlines;
+		/* this is for SM40 SuperSparc modules */
+		if (max_cache_size == 0)
+			max_cache_size = 36 * 1024;
 	}
 	if (cpu_data(id).mid < 0)
 		panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);